Analog Devices Inc. LTC2052CS#PBF
- Part No.:
- LTC2052CS#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LTC2052CS#PBF.pdf
- Description:
- IC OPAMP ZERO-DRIFT 4 CIRC 14SO
- Quantity:
- Payment:

- Shipping:

Inventory:1,628
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC2052CS#PBF from Analog Devices (formerly Linear Technology) is a quad zero-drift operational amplifier in a 14-lead SOIC package, delivering ultra-low input offset voltage (±3 μV max), near-zero drift (30 nV/°C max), and rail-to-rail output swing. It operates from single 2.7 V or dual ±5 V supplies and supports high-precision DC-coupled applications including thermocouple amplification, strain gauge signal conditioning, and medical instrumentation front-ends.
For engineers reviewing the LTC2052CS#PBF datasheet, LTC2052CS#PBF pinout, LTC2052CS#PBF application, or LTC2052CS#PBF equivalent, key selection criteria include guaranteed 0°C to 70°C operation, 3 MHz gain-bandwidth product, 1.5 μVP-P (0.01 Hz–10 Hz) input-referred noise, and verified CMRR/PSRR >125 dB across supply and common-mode ranges.
Technical Context
The LTC2052CS#PBF employs autozeroing architecture with a 7.5 kHz internal sampling clock to continuously correct input offset and drift. Its chopper-stabilized core achieves <1 μV typical offset and <10 nV/°C typical drift while maintaining DC accuracy over temperature, supply, and common-mode voltage variations.
It features extended input common-mode range (V– to V+ – 1.3 V), rail-to-rail output stage capable of driving 2 kΩ loads to both rails, and shutdown functionality (not implemented in SO-14 package). The device exhibits 140 dB typical open-loop gain and 130 dB typical PSRR/CMRR at DC, enabling stable high-gain precision configurations without external trimming.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Offset Voltage | ±3 μV maximum - ensures sub-10 μV total error in low-gain sensor interfaces without calibration |
| Offset Drift | 30 nV/°C maximum - enables stable DC performance over industrial temperature range without thermal compensation |
| Noise (0.01–10 Hz) | 1.5 μVP-P typical - supports high-resolution data acquisition down to 18+ bits in DC-coupled systems |
| Gain-Bandwidth Product | 3 MHz - allows stable closed-loop gains up to ~300 at 10 kHz for anti-alias filtering or active RC filter design |
| Supply Current per Amp | 1.0 mA typical at 3 V - balances ultra-precision performance with moderate power in multi-channel systems |
| CMRR / PSRR | ≥125 dB typical - rejects supply ripple and common-mode interference in noisy industrial environments |
| Output Swing | Rail-to-rail into 10 kΩ - maximizes dynamic range when interfacing with 16-bit ADCs or low-voltage logic |
Pinout & Package
Package: 14-lead plastic SOIC (S14), 0.150-inch width, JEDEC MS-012 compliant. Body dimensions: 8.64 mm × 3.91 mm × 1.75 mm.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | OUT A | Amplifier A output - drives external load or next-stage input; rail-to-rail capable |
| 2 | –IN A | Inverting input of Amp A - high-impedance node; sensitive to layout-induced clock feedthrough |
| 3 | +IN A | Non-inverting input of Amp A - matched to –IN A for optimal CMRR; ESD-sensitive |
| 4 | V+ | Positive supply rail - decoupling capacitor required within 1 cm for stability and noise suppression |
| 5 | +IN B | Non-inverting input of Amp B - electrically identical to +IN A; shares same substrate region |
| 6 | –IN B | Inverting input of Amp B - paired with +IN B; requires symmetric trace routing for best matching |
| 7 | OUT B | Amplifier B output - independent channel; no internal crosstalk above 100 dB at DC |
| 8 | OUT D | Amplifier D output - fourth channel; pin 8 is not NC - critical for quad-channel designs |
| 9 | –IN D | Inverting input of Amp D - matches –IN A/B/C; validated for <1 μV inter-channel offset mismatch |
| 10 | +IN D | Non-inverting input of Amp D - fully characterized for common-mode rejection at full rail range |
| 11 | V– | Negative supply rail - connects to ground in single-supply mode; return path for all four amps |
| 12 | +IN C | Non-inverting input of Amp C - third channel input; layout symmetry recommended vs. other inputs |
| 13 | –IN C | Inverting input of Amp C - validated for <30 nV/°C drift tracking with other channels |
| 14 | OUT C | Amplifier C output - completes quad configuration; supports independent gain-setting per channel |
Key Features
| Feature | Design Value |
|---|---|
| Zero-drift autozeroing architecture | Eliminates manual nulling and thermal drift compensation circuits in precision analog front-ends |
| 1.5 μVP-P (0.01–10 Hz) input noise | Enables 18-bit effective resolution in 100 ms settling time for weigh scale and medical sensor applications |
| Rail-to-rail output swing into 2 kΩ | Preserves full ADC input range when driving SAR or sigma-delta converters directly |
| 130 dB PSRR/CMRR at DC | Rejects power supply ripple and board-level common-mode noise without additional filtering |
| Extended input common-mode range | Accepts signals from V– to V+ – 1.3 V - supports direct connection to bridge sensors referenced to mid-supply |
Applications
| Thermocouple Amplifiers | Electronic Scales |
|---|---|
Use Scenario: Cold-junction compensation and microvolt-level thermocouple signal amplification in industrial temperature controllers. IC Role / Device Role / Timing Role: Primary front-end amplifier providing DC-coupled gain, offset correction, and noise filtering before ADC digitization. Use Value: ±3 μV max offset and 30 nV/°C drift enable <0.1°C measurement uncertainty over 0–100°C without software calibration. | Use Scenario: Strain gauge bridge signal conditioning in platform scales and load cells with 2000:1 dynamic range. IC Role / Device Role / Timing Role: Instrumentation-grade differential amplifier with programmable gain and ultra-low drift. Use Value: 1.5 μVP-P low-frequency noise and rail-to-rail output maximize SNR when interfacing with 24-bit ΣΔ ADCs. |
| Medical Instrumentation | Strain Gauge Amplifiers |
Use Scenario: Biopotential signal acquisition (ECG, EEG) requiring DC stability and minimal baseline wander. IC Role / Device Role / Timing Role: High-input-impedance, low-noise amplifier in first-stage patient-connected circuitry. Use Value: 130 dB CMRR and 140 dB open-loop gain ensure accurate differential measurement despite electrode offset mismatches. | Use Scenario: Full-bridge Wheatstone amplifier in structural health monitoring systems operating at –40°C to 85°C. IC Role / Device Role / Timing Role: Precision gain block with integrated offset cancellation for millivolt-level bridge outputs. Use Value: Guaranteed 0°C to 70°C operation and 3 MHz bandwidth support fast transient response in impact testing applications. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar zero-drift op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2052CGN#PBF | 16-pin SSOP package; includes NC pins; identical electrical specs; θJA = 110°C/W vs. 110°C/W for SO-14 | Preferred for space-constrained PCBs where 16-pin SSOP footprint fits tighter layouts than SO-14 | Select LTC2052CGN#PBF when board area is limited and SSOP assembly capability exists. |
| LTC2052HVCS#PBF | Supports ±5V and ±12V operation (vs. ±5V only); otherwise identical pinout and DC specs | Required for high-voltage sensor interfaces (e.g., piezoelectric transducers) needing >10 V output swing | Choose LTC2052HVCS#PBF only if dual ±12V supply is used; otherwise LTC2052CS#PBF is optimal for 3V/5V systems. |
Compared with LTC2052CGN#PBF and LTC2052HVCS#PBF, the LTC2052CS#PBF offers the lowest-cost SOIC solution for standard 3V/5V precision applications, with identical DC performance but simpler board routing and broader distributor availability than SSOP or HV variants.
Availability
LTC2052CS#PBF is available at Aetrix Electronics and suitable for thermocouple amplifiers, electronic scales, and medical instrumentation requiring stable component supply across industrial and test equipment production cycles.
Supply support for LTC2052CS#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full technical and manufacturing continuity for the LTC portfolio.
The LTC2052CS#PBF belongs to Linear's precision zero-drift op amp family, engineered specifically for DC-accurate signal conditioning in sensor interfaces where offset, drift, and low-frequency noise dominate error budgets.
FAQ
What is the maximum operating temperature range for the LTC2052CS#PBF?
The LTC2052CS#PBF is specified for 0°C to 70°C ambient operation. While the underlying silicon is rated for –40°C to 125°C junction temperature, the 'C' grade suffix confirms factory characterization and guarantee only across the commercial temperature range. For extended temperature use, select LTC2052IS#PBF (–40°C to 85°C) or LTC2052HS#PBF (–40°C to 125°C).
Does the LTC2052CS#PBF include a shutdown pin?
No, the LTC2052CS#PBF in the 14-lead SOIC package does not implement a shutdown function. Shutdown capability is available only in MSOP packages (e.g., LTC2052CMS10) with dedicated SHDN pins. The LTC2052CS#PBF draws continuous quiescent current - 1.0 mA per amplifier at 3 V - and cannot be placed into low-power sleep mode.
What is the input common-mode voltage range of the LTC2052CS#PBF?
The LTC2052CS#PBF accepts input voltages from V– to V+ – 1.3 V across its full operating temperature and supply range. At 5 V single supply, this means inputs can range from 0 V to 3.7 V; at ±5 V dual supply, inputs operate from –5 V to +3.7 V. This extended range supports direct connection to resistive bridges biased at mid-supply without level-shifting circuitry.
How does clock feedthrough affect system design with the LTC2052CS#PBF?
The LTC2052CS#PBF uses a 7.5 kHz autozeroing clock, resulting in two forms of clock feedthrough: input-referred residue (<1 μVRMS) and impedance-dependent charge injection. To minimize impact, keep source impedances below 10 kΩ and use feedback capacitors to limit closed-loop bandwidth. Layout best practices include short, symmetric traces and local 0.1 μF bypassing at V+ and V– pins.
Can the LTC2052CS#PBF drive a 10kΩ load to the rails?
Yes - the LTC2052CS#PBF delivers rail-to-rail output swing into 10 kΩ loads, with typical high-side swing of V+ – 2 mV and low-side swing of V– + 2 mV at room temperature. This performance is maintained across the full 0°C to 70°C range and enables direct interface with 16-bit and higher-resolution ADCs without output attenuation or level-shifting networks.
LTC2052CS#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Chopper (Zero-Drift)
- Number of Circuits:
- 4
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 2V/µs
- Gain Bandwidth Product:
- 3 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 90 pA
- Voltage - Input Offset:
- 1 µV
- Current - Supply:
- 1mA (x4 Channels)
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 2.7 V
- Voltage - Supply Span (Max):
- 5.5 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SO
LTC2052CS#PBF FAQ
1.How can I place an order for LTC2052CS#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2052CS#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2052CS#PBF reliable?
The price and inventory of LTC2052CS#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2052CS#PBF is usually 5 days.
3.What payment methods are accepted for LTC2052CS#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2052CS#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2052CS#PBF?
LTC2052CS#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2052CS#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2052CS#PBF?
For technical support, including LTC2052CS#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2052CS#PBF requirements.
6.How does Aetrix verify that LTC2052CS#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2052CS#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2052CS#PBF meets industry standards.
7.What is the process for return or replacement of LTC2052CS#PBF?
All LTC2052CS#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2052CS#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2052CS#PBF part is unused and in its original packaging.
Return procedure for LTC2052CS#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC2052CS#PBF Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

