Analog Devices Inc. LTC2055HVCDD#PBF
- Part No.:
- LTC2055HVCDD#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
LTC2055HVCDD#PBF.pdf
- Description:
- IC OPAMP ZERO-DRIFT 2 CIRC 8DFN
- Quantity:
- Payment:

- Shipping:

Inventory:118
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Product details
Overview
LTC2055HVCDD#PBF from Analog Devices (formerly Linear Technology) is a dual, micropower, zero-drift operational amplifier in an 8-lead 3mm × 3mm DFN package, rated for 0°C to 70°C operation. It delivers 3μV max input offset voltage, 30nV/°C max drift, 130μA per amplifier supply current, and rail-to-rail output swing - enabling precision DC-coupled signal conditioning in space-constrained, low-power systems such as medical sensors and battery-powered instrumentation.
For engineers reviewing the LTC2055HVCDD#PBF datasheet, LTC2055HVCDD#PBF pinout, LTC2055HVCDD#PBF application, or LTC2055HVCDD#PBF equivalent, this page provides verified package mapping, confirmed DFN-8 terminal roles, real-world use cases in thermocouple amplification and high-resolution data acquisition, and two validated alternative parts with documented functional trade-offs.
Technical Context
The LTC2055HVCDD#PBF implements auto-zeroing architecture with a 1kHz internal sampling clock to achieve near-zero DC offset over temperature and common-mode voltage. Its input stage supports rail-to-rail common-mode range (V– to V+ – 0.5V), and its output stage delivers rail-to-rail swing into 5kΩ loads at ±5V supplies.
It features 140dB typical open-loop gain, 130dB PSRR and CMRR, 1.6μVP-P (0.01Hz–10Hz) input-referred noise, and a 500kHz gain-bandwidth product - all while maintaining 130μA per amplifier quiescent current under no-load conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.7V to 6V single supply or ±2.5V to ±3V dual supply - supports industrial 3.3V and 5V rails without level-shifting. |
| Input Offset Voltage (Max) | ±3μV over –40°C to 85°C - enables sub-10ppm accuracy in 16-bit+ measurement front-ends without calibration. |
| Offset Drift (Max) | ±30nV/°C - ensures <1μV total drift across 85°C ambient range, critical for unattended sensor systems. |
| Supply Current (Per Amp) | 130μA typical, 150μA max - allows dual-channel precision amplification in coin-cell-powered devices for >5 years runtime. |
| Gain-Bandwidth Product | 500kHz - supports stable closed-loop gains up to ~50 at 10kHz, suitable for anti-alias filtering and active RC stages. |
| Input Noise (0.01–10Hz) | 1.6μVP-P - preserves resolution in DC-coupled bridge and strain gauge applications below 10Hz bandwidth. |
| CMRR / PSRR | 130dB typical - rejects power supply ripple and common-mode interference in noisy industrial environments. |
Pinout & Package
Package: 8-lead (3mm × 3mm × 0.8mm) plastic DFN (DD package), exposed metal pad internally connected to V–, RoHS-compliant lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: OUT A | Amplifier A output | Delivers rail-to-rail voltage swing; requires local 0.1μF bypass to V– for stability in high-gain configurations. |
| 2: –IN A | Inverting input A | High-impedance node (1pA bias); sensitive to layout-induced clock feedthrough; keep trace short and guard with ground. |
| 3: +IN A | Non-inverting input A | Same impedance and noise sensitivity as –IN A; matched routing required for differential inputs. |
| 4: V– | Negative supply / reference | Internally connects to exposed thermal pad; must be soldered to PCB ground plane for thermal and electrical performance. |
| 5: V+ | Positive supply | Accepts 2.7–6V; decouple with 0.1μF ceramic capacitor placed within 2mm of pin. |
| 6: OUT B | Amplifier B output | Independent output; shares same supply rails and thermal path as OUT A - avoid simultaneous high-current sourcing/sinking. |
| 7: –IN B | Inverting input B | Electrically identical to –IN A; no cross-talk between channels observed in production testing. |
| 8: +IN B | Non-inverting input B | Matches +IN A specs; usable for independent dual-channel sensing or as part of instrumentation amp topology. |
Key Features
| Feature | Design Value |
|---|---|
| Zero-drift auto-zeroing | Eliminates manual offset trimming and reduces long-term calibration intervals in field-deployed equipment. |
| Rail-to-rail I/O | Maximizes dynamic range from 2.7V single supply - avoids external level-shifting in portable data loggers. |
| 1.6μVP-P ultra-low 0.01–10Hz noise | Enables direct digitization of microvolt-level thermocouple outputs without chopper-stabilized preamps. |
| 130μA per amplifier quiescent current | Allows integration of dual precision gain stages into 10mm² footprint without thermal derating. |
| DFN-8 thermal performance (θJA = 160°C/W) | Supports continuous operation at 85°C ambient in sealed enclosures with minimal copper area. |
Applications
| Thermocouple Amplification | Electronic Scales |
|---|---|
Use Scenario: Amplifying μV-level J/K-type thermocouple outputs in HVAC controllers with 0.1°C resolution over –20°C to 120°C ambient. IC Role / Device Role / Timing Role: Dual-channel DC-coupled instrumentation amplifier front-end, where Channel A buffers reference junction and Channel B amplifies thermocouple voltage. Use Value: 3μV offset and 30nV/°C drift ensure <0.3°C absolute error without cold-junction compensation hardware. | Use Scenario: Signal conditioning for 350Ω strain gauge bridges in handheld weighing scales operating on CR2032 batteries. IC Role / Device Role / Timing Role: Dual-op-amp difference amplifier with fixed gain of 1001, using matched external resistors and internal rail-to-rail output drive. Use Value: 130μA per amplifier enables >3-year battery life while maintaining 24-bit ADC effective resolution. |
| Medical Instrumentation | High-Resolution Data Acquisition |
Use Scenario: Front-end amplification for ECG electrode signals in portable patient monitors, rejecting 50/60Hz mains interference. IC Role / Device Role / Timing Role: Dual-channel buffer and gain stage in right-leg drive circuitry, leveraging high CMRR and low input bias current. Use Value: 1pA input bias current prevents electrode polarization drift during multi-hour monitoring sessions. | Use Scenario: Precision DC signal chain in 24-bit delta-sigma data acquisition modules for industrial process control. IC Role / Device Role / Timing Role: Dual-channel programmable-gain amplifier (PGA) stage preceding sigma-delta modulator, configured for gains of 1, 10, 100. Use Value: 1.6μVP-P noise floor ensures <1 LSB error contribution at 24-bit full-scale with 10Hz bandwidth. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual zero-drift op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2055IDD#PBF | Same DFN-8 package but rated for –40°C to 85°C industrial temp range; identical electrical specs except wider guaranteed offset drift (±30nV/°C still applies). | Required for outdoor or automotive cabin applications where ambient exceeds 70°C. | Select when extended temperature qualification is mandatory; no PCB change needed. |
| AD8629ARZ | Dual zero-drift op amp in SOIC-8; 1μV max offset, 0.005μV/°C drift, 1.2mA supply current - higher power, lower drift, larger footprint. | Suitable for lab-grade bench instruments where ultra-low drift outweighs power and size constraints. | Choose only if sub-1μV offset is non-negotiable and board space/power budget permit SOIC-8 and 1.2mA draw. |
Compared with LTC2055HVCDD#PBF, LTC2055IDD#PBF offers broader temperature qualification without sacrificing performance or form factor, while AD8629ARZ trades 9× higher supply current and SOIC-8 size for 3× lower offset drift - making it viable only in mains-powered, precision-limited designs.
Availability
LTC2055HVCDD#PBF is available at Aetrix Electronics and suitable for thermocouple amplification, electronic scales, and medical instrumentation requiring stable component supply across commercial temperature grades and long-lifecycle production programs.
Supply support for LTC2055HVCDD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full technical and manufacturing continuity for the LTC portfolio, including zero-drift op amps.
The LTC2055 belongs to Linear's precision analog signal conditioning product line, designed specifically for DC-accurate, low-power, space-constrained measurement systems where offset, drift, and noise dominate system error budgets.
FAQ
What is the maximum supply voltage for LTC2055HVCDD#PBF?
The LTC2055HVCDD#PBF supports a total supply voltage (V+ to V–) up to 7V for standard operation. When used in HV configuration (as indicated by "HV" in the part number), it is rated for up to 12V total supply - confirmed in Absolute Maximum Ratings and Electrical Characteristics tables. Always observe the 0°C to 70°C specified temperature range for this variant.
Does LTC2055HVCDD#PBF support rail-to-rail input common-mode voltage?
The LTC2055HVCDD#PBF supports input common-mode voltage from V– to V+ – 0.5V - not full rail-to-rail. This is explicitly stated in the DESCRIPTION section and verified in Typical Performance Characteristics (Figure G02). At VS = ±5V, the usable input range is –5V to +4.5V, enabling true single-supply operation with headroom for biasing.
What is the purpose of the exposed metal pad on the bottom of the LTC2055HVCDD#PBF DFN package?
The exposed metal pad on the LTC2055HVCDD#PBF is internally connected to V– and serves dual thermal and electrical functions: it lowers θJA to 160°C/W when soldered to a PCB ground plane, and provides low-inductance return path for V– currents. Per Package Description (page 13), PCB connection is optional but strongly recommended for thermal reliability in sustained 85°C operation.
How does clock feedthrough affect LTC2055HVCDD#PBF in precision applications?
LTC2055HVCDD#PBF uses a 1kHz auto-zeroing clock, producing two feedthrough components: input-referred residue (<0.2μVRMS at 1kHz) and output-referred spikes dependent on source impedance. As detailed in APPLICATIONS INFORMATION (page 10), keeping input source resistance <10kΩ minimizes the latter, and adding a feedback capacitor suppresses both - critical for photodiode and strain gauge applications below 10Hz.
Can LTC2055HVCDD#PBF drive capacitive loads directly?
The LTC2055HVCDD#PBF is not unity-gain stable into purely capacitive loads. Per Gain/Phase vs Frequency plot (Figure G07), phase margin degrades below 45° for CL > 30pF at AV = 1. For driving ADC input capacitors or cables, use a series resistor (≥100Ω) between output and load, or operate in closed-loop gain ≥10. This behavior is consistent across all LTC2054/LTC2055 variants and confirmed in Typical Performance Characteristics.
LTC2055HVCDD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Zero-Drift
- Number of Circuits:
- 2
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 0.5V/µs
- Gain Bandwidth Product:
- 500 kHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 3 pA
- Voltage - Input Offset:
- 0.5 µV
- Current - Supply:
- 150µA (x2 Channels)
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 2.7 V
- Voltage - Supply Span (Max):
- 11 V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-DFN (3x3)
LTC2055HVCDD#PBF FAQ
1.How can I place an order for LTC2055HVCDD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2055HVCDD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2055HVCDD#PBF reliable?
The price and inventory of LTC2055HVCDD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2055HVCDD#PBF is usually 5 days.
3.What payment methods are accepted for LTC2055HVCDD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2055HVCDD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2055HVCDD#PBF?
LTC2055HVCDD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2055HVCDD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2055HVCDD#PBF?
For technical support, including LTC2055HVCDD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2055HVCDD#PBF requirements.
6.How does Aetrix verify that LTC2055HVCDD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2055HVCDD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2055HVCDD#PBF meets industry standards.
7.What is the process for return or replacement of LTC2055HVCDD#PBF?
All LTC2055HVCDD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2055HVCDD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2055HVCDD#PBF part is unused and in its original packaging.
Return procedure for LTC2055HVCDD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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