Analog Devices Inc. LTC2057IMS#PBF
- Part No.:
- LTC2057IMS#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
LTC2057IMS#PBF.pdf
- Description:
- IC OPAMP ZERO-DRIFT 1CIRC 10MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,562
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC2057IMS#PBF from Analog Devices (formerly Linear Technology) is a high-voltage, low-noise, zero-drift operational amplifier in a 10-lead MSOP package, delivering 4μV max input offset voltage, 0.015μV/°C max drift, and 200nVP-P DC–10Hz input noise. It operates from ±2.375V to ±18V supply (4.75V–36V total), features rail-to-rail output, V–-rail–inclusive input common-mode range, and shutdown mode - ideal for precision thermocouple amplification and high-resolution data acquisition.
For engineers reviewing the LTC2057IMS#PBF datasheet, LTC2057IMS#PBF pinout, LTC2057IMS#PBF application, or LTC2057IMS#PBF equivalent, this page delivers verified specifications, real-world timing and noise performance, package-specific terminal mapping, and validated alternative options for instrumentation-grade analog signal conditioning.
Technical Context
The LTC2057IMS#PBF employs auto-zeroing with internal chopper stabilization at 100kHz to suppress 1/f noise and offset drift. Its architecture includes dual-stage correction: continuous-time input stage with periodic nulling, enabling true zero-drift behavior over time and temperature without idle tones above specification limits.
It integrates dedicated shutdown control (SD/SDCOM pins) with defined thresholds (0.8V low, 2.0V high), supports unity-gain stability, and maintains 150dB typical open-loop gain and 160dB PSRR across its full 4.75V–36V supply range - critical for rejecting supply ripple in battery-powered or industrial sensor front-ends.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Offset Voltage | 4μV maximum - enables sub-16-bit error floor in 24-bit ADC systems without calibration. |
| Offset Drift | 0.015μV/°C max - ensures <1μV total drift over –40°C to 125°C, eliminating thermal recalibration. |
| DC–10Hz Noise | 200nVP-P typical - supports ultra-low-frequency measurements like strain gauge or pH sensing. |
| Gain Bandwidth | 1.5MHz typical - sufficient for closed-loop gains up to 100 at 15kHz while maintaining phase margin. |
| Slew Rate | 0.45V/μs typical falling, 1.3V/μs rising - accommodates fast step recovery in overload conditions. |
| PSRR / CMRR | 160dB / 150dB typical - rejects power supply and common-mode interference in noisy industrial environments. |
| Supply Range | ±2.375V to ±18V (4.75V–36V total) - compatible with single-supply 5V/12V and dual-supply ±5V/±15V systems. |
Pinout & Package
10-lead plastic MSOP package (MS) with exposed pad connected to V–; θJA = 160°C/W; operating junction temperature up to 150°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GRD (Pin 1) | Guard Ring | No internal connection; ties to PCB guard trace to reduce leakage and capacitive coupling. |
| –IN (Pin 2) | Inverting Input | Differential input node with 3pF differential capacitance; accepts signals down to V– – 0.1V. |
| +IN (Pin 3) | Non-Inverting Input | Differential input node with 3pF common-mode capacitance; supports rail-to-rail common-mode range. |
| GRD (Pin 4) | Guard Ring | No internal connection; identical function to Pin 1 for symmetric guarding. |
| V– (Pin 5) | Negative Supply | Main negative rail connection; exposed pad (Pin 9) is internally bonded to this pin. |
| OUT (Pin 6) | Amplifier Output | Rail-to-rail capable output driving ≥1kΩ load with <100mV saturation at 5mA sink/source. |
| NC (Pin 7) | No Connection | Floating terminal; must remain unconnected per datasheet to avoid parasitic coupling. |
| SDCOM (Pin 8) | Shutdown Reference | Reference node for SD pin; must be tied to V– or mid-supply to enable proper shutdown threshold detection. |
| SD (Pin 10) | Shutdown Control | Active-high logic input; asserts shutdown when SD–SDCOM > 2.0V, reducing supply current to ≤9μA. |
| V+ (Pin 8) | Positive Supply | Main positive rail connection; supplies internal bias and output stage. |
Key Features
| Feature | Design Value |
|---|---|
| Zero-drift architecture | Auto-zero + chopper hybrid eliminates 1/f noise and long-term offset drift - no system-level recalibration needed. |
| Rail-to-rail output | Swings within 100mV of rails at 5mA load - maximizes dynamic range in low-voltage precision systems. |
| V–-rail–inclusive input | Accepts common-mode voltages as low as V– – 0.1V - enables direct low-side current sensing without level-shifting. |
| Shutdown mode | Reduces quiescent current to ≤9μA while preserving state - extends battery life in portable instrumentation. |
| High PSRR/CMRR | 160dB PSRR and 150dB CMRR maintain accuracy in electrically noisy environments (e.g., motor drives, PLCs). |
Applications
| Thermocouple Amplification | High-Resolution Data Acquisition |
|---|---|
Use Scenario: Amplifying µV-level Seebeck voltages from K-type thermocouples across –200°C to +1350°C with cold-junction compensation. IC Role / Device Role / Timing Role: Precision DC-coupled gain stage with ultra-low offset and drift to preserve absolute temperature accuracy. Use Value: 4μV max offset contributes <0.1°C error at 41µV/°C sensitivity - meets Class 1 thermocouple accuracy standards. | Use Scenario: Front-end conditioning for 24-bit delta-sigma ADCs in weigh scales and analytical instruments. IC Role / Device Role / Timing Role: Low-noise, low-drift buffer and programmable-gain amplifier preceding digitization. Use Value: 200nVP-P DC–10Hz noise ensures >110dB SNR in 10Hz bandwidth - exceeds 20-bit ENOB requirement. |
| Reference Buffering | Low-Side Current Sense |
Use Scenario: Driving high-impedance DAC references or ADC voltage references in precision power supplies. IC Role / Device Role / Timing Role: Unity-gain stable buffer isolating reference from load variations and PCB leakage. Use Value: 150dB open-loop gain and 0.015μV/°C drift prevent reference droop and thermal drift-induced output error. | Use Scenario: Measuring load current via shunt resistor placed between load and ground in motor controllers or battery monitors. IC Role / Device Role / Timing Role: Single-supply op-amp with V–-rail–inclusive input amplifying mV-level shunt voltage. Use Value: Input common-mode range extending to V– – 0.1V allows direct connection to grounded shunt - no level-shifter IC required. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2057HMS#PBF | Same die, rated for –40°C to 125°C operating range (vs. –40°C to 85°C for LTC2057IMS#PBF); otherwise identical specs and pinout. | Required for under-hood automotive or industrial ambient >85°C; same PCB layout and firmware. | Select when extended temperature operation is mandatory; no design changes needed. |
| AD8628ARZ | Lower supply range (2.7V–5.5V), lower GBW (2.5MHz), higher input bias current (100pA typ), no shutdown pin. | Targeted at low-voltage, low-power portable devices - not suitable for 36V industrial rails or shutdown-controlled systems. | Choose only for 3.3V/5V battery-powered designs where shutdown and high-voltage operation are unnecessary. |
Compared with LTC2057HMS#PBF, the LTC2057IMS#PBF trades extended temperature rating for cost and qualification scope, while AD8628ARZ offers higher bandwidth at the expense of supply flexibility, noise, and feature set - making LTC2057IMS#PBF optimal for wide-supply, low-drift, industrial-grade signal chains.
Availability
LTC2057IMS#PBF is available at Aetrix Electronics and suitable for high-resolution data acquisition, thermocouple amplification, and reference buffering requiring stable component supply across industrial, test & measurement, and medical OEM programs.
Supply support for LTC2057IMS#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its precision analog portfolio, renowned for low-noise, low-drift, and high-reliability signal conditioning ICs.
The LTC2057 series belongs to Linear's zero-drift op-amp product line, engineered specifically for DC-precision applications demanding nanovolt-level stability in harsh thermal and electrical environments.
FAQ
What is the maximum input offset voltage specification for the LTC2057IMS#PBF?
The LTC2057IMS#PBF has a guaranteed maximum input offset voltage of 4μV over the full –40°C to 85°C operating temperature range. This value is specified in the Electrical Characteristics table under VOS (Input Offset Voltage) and applies to all grades including the I-grade (industrial) version denoted by the 'I' in LTC2057IMS#PBF. The typical value is 0.5μV, but system design must accommodate the 4μV worst-case for precision applications.
Does the LTC2057IMS#PBF support rail-to-rail input operation?
The LTC2057IMS#PBF does not support full rail-to-rail input - its input common-mode range extends from V– – 0.1V to V+ – 1.5V. While it accepts signals down to 0.1V below the negative rail (enabling true low-side sensing), it cannot accept inputs within 1.5V of the positive rail. This asymmetry is intentional to optimize input stage headroom and offset performance in high-voltage precision applications.
What is the function of the GRD pins (1 and 4) on the LTC2057IMS#PBF MSOP-10 package?
The GRD pins (1 and 4) on the LTC2057IMS#PBF are guard ring terminals with no internal connection. They are designed to be tied to a clean, low-impedance guard trace surrounding the sensitive input nodes (–IN and +IN) on the PCB. This guard reduces leakage current and capacitive coupling from adjacent traces or planes, preserving the ultra-low input bias current (<30pA) and minimizing offset errors in high-impedance sensor interfaces.
Can the LTC2057IMS#PBF operate from a single 5V supply?
Yes, the LTC2057IMS#PBF can operate from a single 5V supply (V+ = 5V, V– = 0V), as its minimum total supply voltage is 4.75V. In this configuration, the input common-mode range spans 0V to 3.5V (V– – 0.1V to V+ – 1.5V), and the output swings rail-to-rail (0V to ~4.9V). However, note that PSRR and CMRR degrade slightly at minimum supply, and shutdown functionality remains fully operational with SDCOM referenced to ground.
How does the shutdown feature of the LTC2057IMS#PBF work, and what is its impact on supply current?
The LTC2057IMS#PBF uses a differential shutdown interface: SD and SDCOM pins define a threshold window. When SD – SDCOM exceeds 2.0V (typ), the amplifier enters shutdown, reducing supply current to ≤9μA (max at 125°C). SDCOM must be biased - typically to V– or mid-supply - to establish a valid reference. During shutdown, the output becomes high-impedance, and the device retains its offset calibration state, enabling fast wake-up (<100µs) without re-stabilization delay.
LTC2057IMS#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Zero-Drift
- Number of Circuits:
- 1
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 0.45V/µs
- Gain Bandwidth Product:
- 1.5 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 30 pA
- Voltage - Input Offset:
- 0.5 µV
- Current - Supply:
- 900µA
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 4.75 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-MSOP
LTC2057IMS#PBF FAQ
1.How can I place an order for LTC2057IMS#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2057IMS#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2057IMS#PBF reliable?
The price and inventory of LTC2057IMS#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2057IMS#PBF is usually 5 days.
3.What payment methods are accepted for LTC2057IMS#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2057IMS#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2057IMS#PBF?
LTC2057IMS#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2057IMS#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2057IMS#PBF?
For technical support, including LTC2057IMS#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2057IMS#PBF requirements.
6.How does Aetrix verify that LTC2057IMS#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2057IMS#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2057IMS#PBF meets industry standards.
7.What is the process for return or replacement of LTC2057IMS#PBF?
All LTC2057IMS#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2057IMS#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2057IMS#PBF part is unused and in its original packaging.
Return procedure for LTC2057IMS#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC2057IMS#PBF Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

