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Analog Devices Inc. LTC2140CUP-14#PBF
- Part No.:
- LTC2140CUP-14#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 64-WFQFN Exposed Pad
- Datasheet:
-
LTC2140CUP-14#PBF.pdf
- Description:
- IC ADC 14BIT PIPELINED 64QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,101
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Product details
Overview
LTC2140CUP-14#PBF from Analog Devices (formerly Linear Technology) is a 14-bit, 25Msps dual-channel simultaneous-sampling analog-to-digital converter optimized for high-dynamic-range signal digitization in communications and instrumentation. It delivers 72.7dB SNR, 90dB SFDR, and ultralow 0.10psRMS jitter at 70MHz input, operating from a single 1.8V supply with CMOS/DDR CMOS/DDR LVDS output options in a 64-pin QFN package.
For engineers reviewing the LTC2140CUP-14#PBF datasheet, LTC2140CUP-14#PBF pinout, LTC2140CUP-14#PBF application, or LTC2140CUP-14#PBF equivalent, key selection criteria include its 25Msps sampling rate, ±1LSB INL, 750MHz full-power bandwidth, low 50mW total power consumption, and support for differential or single-ended encode inputs with optional duty cycle stabilization.
Technical Context
The LTC2140CUP-14#PBF implements two independent 14-bit ADC cores sharing a common sample-and-hold with 750MHz full-power bandwidth and 0.10psRMS acquisition jitter in differential encode mode. Its architecture supports simultaneous sampling across both channels with ±1.5mV offset matching and ±0.2%FS gain matching to preserve channel coherence in I/Q or multi-channel systems.
Digital interface flexibility includes full-rate CMOS, DDR CMOS, or DDR LVDS outputs with separate OVDD supply (1.1–1.9V), configurable input range (1–2VP-P), and serial SPI configuration. Optional features include data randomizer, clock duty cycle stabilizer, nap mode (10mW), and sleep mode (1mW) - all controllable via PAR/SER-selectable programming modes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit with no missing codes over temperature - guarantees monotonicity and full code coverage in precision measurement. |
| Sampling Rate | 25Msps - fixed maximum rate for LTC2140 variant; enables baseband and low-IF digitization up to ~12.5MHz Nyquist. |
| SNR @ 70MHz | 72.7dBFS - defines usable dynamic range for 70MHz IF signals in cellular or SDR receivers. |
| SFDR @ 70MHz | 90dBc - limits spurious content in multi-tone environments like LTE or WCDMA base stations. |
| Total Power | 50mW at 25Msps with CMOS outputs - enables portable or thermally constrained medical imaging and test equipment. |
| Input Bandwidth | 750MHz full-power - supports undersampling of RF/IF signals up to 140MHz without amplitude roll-off. |
| Jitter (Differential) | 0.10psRMS - directly determines aperture uncertainty limiting SNR at high input frequencies. |
Pinout & Package
64-pin (9mm × 9mm) plastic QFN package with exposed thermal pad (Pin 65 = GND). Requires soldering exposed pad to PCB ground plane for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (1,16,17,64) | Analog supply | 1.7–1.9V analog core supply; bypass each group with 0.1μF ceramic capacitor. |
| AIN1+/AIN1– (4,5) | Channel 1 differential input | Accepts 1–2VP-P differential signal; biased by VCM1 (Pin 2) at VDD/2. |
| ENC+/ENC– (18,19) | Encode clock input | Rising/falling edge-triggered; ENC– tied to GND enables single-ended mode. |
| PAR/SER (11) | Programming mode select | Ground = serial SPI mode; VDD = parallel logic mode for simplified control. |
| D1_0–D1_13 / D2_0–D2_13 (25–32, 45–58, 38–39, etc.) | Data outputs | Configurable as CMOS (full/DDR) or DDR LVDS; output voltage swing set by OVDD (Pin 42). |
| OVDD (42) | Digital output supply | 1.1–1.9V for CMOS; 1.7–1.9V for LVDS - sets output swing and termination impedance. |
| SENSE (63) | Reference configuration | Connect to VDD for ±1V input range; to GND for ±0.5V; enables external reference (0.625–1.3V). |
| VREF (62) | Internal reference output | 1.25V ±25ppm/°C; requires 2.2μF ceramic bypass for stable ADC reference. |
Key Features
| Feature | Design Value |
|---|---|
| Simultaneous sampling dual ADC | Preserves phase coherence between channels for I/Q demodulation and beamforming applications. |
| 750MHz full-power bandwidth | Enables direct RF sampling of L-band and S-band signals without external amplification or filtering. |
| 0.10psRMS jitter (differential) | Supports >72dB SNR at 70MHz input - critical for high-order QAM and OFDM demodulation. |
| Configurable output interface | CMOS/DDR CMOS/DDR LVDS selection allows optimization for board layout, noise immunity, and FPGA interface compatibility. |
| Low-power nap/sleep modes | Reduces power to 10mW (nap) or 1mW (sleep) during idle periods - extends battery life in portable instruments. |
| Serial SPI + parallel programming | Flexible configuration: SPI for fine-grained register control; parallel mode for simple GPIO-based setup in production systems. |
Applications
| Cellular Base Stations | Portable Medical Imaging |
|---|---|
Use Scenario: Digitizing I/Q downconverted signals in macrocell and small-cell transceivers operating in LTE/FDD/TDD bands. IC Role / Device Role / Timing Role: Dual-channel simultaneous ADC capturing in-phase and quadrature components with matched gain/offset for coherent demodulation. Use Value: 90dB SFDR suppresses adjacent-channel interference; 25Msps rate supports 20MHz LTE channel bandwidth with oversampling margin. | Use Scenario: Signal acquisition in handheld ultrasound or Doppler imaging devices requiring low power and high SNR. IC Role / Device Role / Timing Role: High-fidelity analog front-end digitizer for echo return signals with minimal added noise or distortion. Use Value: 72.7dB SNR preserves weak tissue reflections; 50mW total power enables battery operation for >4 hours per charge. |
| Multi-Channel Data Acquisition | Nondestructive Testing |
Use Scenario: Synchronized sampling across multiple sensor channels in industrial vibration monitoring or seismic arrays. IC Role / Device Role / Timing Role: Simultaneous sampling dual ADC providing time-aligned digital data streams for real-time FFT and spectral analysis. Use Value: ±1.5mV offset matching and ±0.2%FS gain matching ensure <0.01° phase error between channels at 1kHz. | Use Scenario: Pulse-echo signal digitization in portable ultrasonic flaw detectors scanning welds or composite materials. IC Role / Device Role / Timing Role: High-speed digitizer capturing short-duration return pulses with wide dynamic range to distinguish surface vs. subsurface defects. Use Value: 750MHz bandwidth captures fast-rising pulse edges; 14-bit resolution resolves microsecond-scale time-of-flight differences. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, 14-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9249BCPZ-65 | 14-bit, 65Msps, JESD204B output, higher power (1.2W), wider temp range (–40°C to +85°C) | Targets high-speed backhaul and radar where serialization and higher throughput are required | Select when system demands >25Msps sampling or FPGA with JESD204B interface; not drop-in due to different pinout and protocol. |
| LTC2141CUP-14#PBF | Same family, 40Msps, 67mW total power, identical pinout and feature set | Used where higher sampling rate is needed but 25Msps is insufficient - e.g., wider IF bandwidth in SDR | Drop-in replacement with no PCB change; upgrade path for same footprint when higher speed is validated in design. |
Compared with LTC2141CUP-14#PBF and AD9249BCPZ-65, the LTC2140CUP-14#PBF offers the lowest power (50mW) and tightest thermal envelope for space-constrained portable systems, while retaining full feature parity with other LTC214x-14 variants except sampling rate and associated power scaling.
Availability
LTC2140CUP-14#PBF is available at Aetrix Electronics and suitable for cellular infrastructure, portable medical imaging, and industrial data acquisition requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for LTC2140CUP-14#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC2140CUP-14#PBF belongs to the LTC214x-14 family of dual, simultaneous-sampling ADCs designed specifically for demanding communications, instrumentation, and medical imaging applications requiring high SNR, low jitter, and flexible digital interfacing.
FAQ
What is the maximum sampling rate supported by the LTC2140CUP-14#PBF?
The LTC2140CUP-14#PBF is rated for a maximum sampling rate of 25Msps. This is the fixed speed grade for the LTC2140 variant within the LTC214x-14 family, distinct from the 40Msps LTC2141CUP-14#PBF and 65Msps LTC2142CUP-14#PBF. Operation above 25Msps is not guaranteed and may degrade AC performance metrics such as SNR and SFDR.
Does the LTC2140CUP-14#PBF support external reference voltage?
Yes, the LTC2140CUP-14#PBF supports external reference via the SENSE pin (Pin 63). Applying a voltage between 0.625V and 1.3V to SENSE selects external reference mode, enabling custom full-scale ranges. The internal reference remains active unless explicitly disabled, and VREF (Pin 62) continues to output 1.25V regardless of SENSE state.
What output interface options does the LTC2140CUP-14#PBF provide?
The LTC2140CUP-14#PBF supports three digital output modes: full-rate CMOS, double-data-rate (DDR) CMOS, and DDR LVDS. Mode selection is controlled via the PAR/SER pin and internal registers. CMOS outputs use OVDD (Pin 42) for swing control (1.1–1.8V); LVDS mode requires OVDD = 1.7–1.9V and enables on-chip 100Ω termination.
How is simultaneous sampling ensured between the two channels of the LTC2140CUP-14#PBF?
The LTC2140CUP-14#PBF uses a shared sample-and-hold circuit preceding two independent 14-bit ADC cores, ensuring true simultaneous sampling with <1ps inter-channel skew. Gain matching (±0.2%FS) and offset matching (±1.5mV) are factory-characterized and maintained over temperature, enabling coherent I/Q processing without post-acquisition calibration.
What power-saving modes are available on the LTC2140CUP-14#PBF?
The LTC2140CUP-14#PBF provides two low-power states: Nap mode (10mW) and Sleep mode (1mW). Both are entered via SPI register write or parallel control pins (SDI/SDO combination). In Nap mode, the analog core remains biased but clocks are gated; Sleep mode fully powers down the ADC core while retaining register contents for fast wake-up.
LTC2140CUP-14#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 64-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 25M
- Number of Inputs:
- 2
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel, Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 64-QFN (9x9)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2140CUP-14#PBF FAQ
1.How can I place an order for LTC2140CUP-14#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2140CUP-14#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2140CUP-14#PBF reliable?
The price and inventory of LTC2140CUP-14#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2140CUP-14#PBF is usually 5 days.
3.What payment methods are accepted for LTC2140CUP-14#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2140CUP-14#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2140CUP-14#PBF?
LTC2140CUP-14#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2140CUP-14#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2140CUP-14#PBF?
For technical support, including LTC2140CUP-14#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2140CUP-14#PBF requirements.
6.How does Aetrix verify that LTC2140CUP-14#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2140CUP-14#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2140CUP-14#PBF meets industry standards.
7.What is the process for return or replacement of LTC2140CUP-14#PBF?
All LTC2140CUP-14#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2140CUP-14#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2140CUP-14#PBF part is unused and in its original packaging.
Return procedure for LTC2140CUP-14#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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