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Analog Devices Inc. LTC2143CUP-14

Part No.:
LTC2143CUP-14
Manufacturer:
Analog Devices Inc.
Category:
Analog to Digital Converters (ADC)
Package:
64-WFQFN Exposed Pad
Datasheet:
AetrixLTC2143CUP-14.pdf
Description:
IC ADC 14BIT PIPELINED 64QFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,614

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Product details

Overview

LTC2143CUP-14 from Analog Devices (formerly Linear Technology) is a 14-bit, 80Msps dual-channel simultaneous-sampling analog-to-digital converter optimized for high-dynamic-range signal digitization in communications and instrumentation. It delivers 72.9dB SNR, 90dB SFDR, 750MHz full-power bandwidth, ±1LSB INL (typ), and operates from a single 1.8V supply with 113mW total power consumption. It serves as the front-end ADC in portable medical imaging and multi-channel data acquisition systems.

For engineers reviewing the LTC2143CUP-14 datasheet, LTC2143CUP-14 pinout, LTC2143CUP-14 application, or LTC2143CUP-14 equivalent, key selection criteria include its 80Msps sampling rate, dual-channel simultaneity, CMOS/DDR CMOS/DDR LVDS output flexibility, 1.8V single-supply operation, and support for 1VP-P to 2VP-P selectable input ranges - all in a 64-pin QFN package.

Technical Context

The LTC2143CUP-14 implements two independent 14-bit SAR-based ADC cores with shared clocking and synchronized sample-and-hold circuits, enabling true simultaneous sampling across channels. Its ultralow 0.10psRMS jitter (differential encode) supports undersampling of IF signals up to 140MHz while maintaining 72.9dB SNR at 70MHz input.

Digital interface options include full-rate CMOS, DDR CMOS, or DDR LVDS outputs, with separate OVDD supply (1.1–1.9V) allowing output swing control. Configuration is managed via a serial SPI port or parallel logic inputs, and features include optional clock duty cycle stabilizer, data output randomizer, shutdown and nap modes, and internal/external reference selection via the SENSE pin.

Key Specifications

ParameterValue and Actual Design Meaning
Resolution14-bit with no missing codes over temperature - guarantees monotonicity and full code coverage in precision measurement.
Sampling Rate80Msps - defines maximum real-time bandwidth for baseband or IF sampling in software-defined radios and NDT equipment.
SNR72.9dB at 70MHz input, –1dBFS - enables detection of low-level signals buried in noise for ultrasound and spectrum analysis.
SFDR90dB at 70MHz input - suppresses spurious content critical for multi-tone communication channel separation.
Power Consumption113mW total at 80Msps, 1.8V - allows thermal-constrained deployment in portable medical and field-deployable instrumentation.
Input Bandwidth750MHz full-power - supports wideband RF/IF digitization without external amplification or filtering degradation.
INL±1LSB (typ) - ensures accurate amplitude linearity for calibrated sensor interfaces and metrology applications.

Pinout & Package

64-pin (9mm × 9mm) plastic QFN package with exposed thermal pad (Pin 65 = GND). Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.

Pin/TerminalCircuit RoleDesign Meaning
VDD (Pins 1, 16, 17, 64)Analog supply input1.7–1.9V analog core power; requires local 0.1μF ceramic bypass per group.
AIN1+/AIN1– (Pins 4, 5)Differential analog input, Channel 1Accepts 1–2VP-P differential signal; common-mode biased by VCM1.
AIN2+/AIN2– (Pins 12, 13)Differential analog input, Channel 2Independent, simultaneously sampled input path with identical specs to Channel 1.
ENC+/ENC– (Pins 18, 19)Differential encode clock inputStarts conversion on rising/falling edge; supports PECL/LVDS/TTL/CMOS; ENC– tied to GND for single-ended mode.
PAR/SER (Pin 11)Programming mode selectGround = serial SPI mode; VDD = parallel logic mode - determines CS/SCK/SDI functionality.
D1_0–D1_13 / D2_0–D2_13 (Pins 45–58, 25–32, etc.)Digital data outputsConfigurable as full-rate CMOS, DDR CMOS, or DDR LVDS; output format selected via SPI or parallel control.
SENSE (Pin 63)Reference and input range programmingSelects ±0.5V (GND), ±1V (VDD), or ±0.8×VSENSE (external 0.625–1.3V) input range.
VREF (Pin 62)Internal reference output1.25V ±25ppm/°C reference; requires 2.2μF ceramic bypass for stability.

Key Features

FeatureDesign Value
Simultaneous dual-channel samplingEliminates inter-channel skew for phase-coherent measurements in beamforming and differential sensor arrays.
Configurable digital outputsCMOS/DDR CMOS/DDR LVDS selection enables direct interfacing to FPGAs, ASICs, or memory controllers without level-shifting.
Optional clock duty cycle stabilizerCompensates for >40%–60% input clock duty cycle variation, preserving timing margin in noisy clock distribution networks.
Low-power nap and shutdown modesReduces power to 16mW (nap) or 1mW (sleep) - extends battery life in portable diagnostic and handheld test equipment.
Serial SPI configuration interfaceEnables runtime reconfiguration of output format, randomizer, and power modes without hardware changes.

Applications

Portable Medical ImagingMulti-Channel Data Acquisition

Use Scenario: Ultrasound beamformer digitizing echo return signals from phased-array transducers.

IC Role / Device Role / Timing Role: Dual-channel simultaneous ADC capturing time-aligned I/Q samples at 80Msps for real-time beam synthesis.

Use Value: 72.9dB SNR and 90dB SFDR preserve weak tissue boundary reflections amid strong near-field clutter.

Use Scenario: High-channel-count vibration monitoring system for industrial predictive maintenance.

IC Role / Device Role / Timing Role: Simultaneous sampling of 2 analog sensor channels (e.g., accelerometer + microphone) per device in distributed node architecture.

Use Value: ±1LSB INL and 750MHz bandwidth ensure accurate amplitude and phase correlation across mechanical resonance frequencies.

Nondestructive Testing (NDT)Software Defined Radios (SDR)

Use Scenario: Pulsed eddy-current inspection system analyzing conductivity variations in aircraft skin.

IC Role / Device Role / Timing Role: Digitizing fast-rising transient responses from pulsed excitation coils with precise timing alignment.

Use Value: 0.10psRMS jitter enables sub-picosecond time-of-flight resolution for defect depth localization.

Use Scenario: Wideband IF receiver in cognitive radio platform operating in 70–140MHz band.

IC Role / Device Role / Timing Role: Undersampling dual IF signals using 80Msps rate with 750MHz input bandwidth.

Use Value: 90dB SFDR prevents adjacent-channel interference during dynamic spectrum access.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel 14-bit ADC applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
AD9253BCPZ-8080Msps, 14-bit, dual-channel; 73.5dB SNR, 88dB SFDR; 1.8V supply; JESD204B output option.Requires JESD204B FPGA IP; lacks internal reference programmability via SENSE pin.Preferred when high-speed serial interface and tighter SNR are required, and FPGA supports JESD204B.
LTC2263IUJ-8080Msps, 14-bit, single-channel; 73.2dB SNR, 90dB SFDR; same 1.8V supply and QFN package.Single-channel only; no simultaneous sampling capability; lower power (95mW).Applicable where channel count is reduced and board space is constrained, but dual-channel simultaneity is not needed.

Compared with AD9253BCPZ-80, LTC2143CUP-14 offers simpler parallel/serial digital interfacing and flexible reference programming, while LTC2263IUJ-80 trades dual-channel capability for lower power and smaller footprint - making LTC2143CUP-14 optimal for phase-coherent dual-sensor systems requiring analog configurability.

Availability

LTC2143CUP-14 is available at Aetrix Electronics and suitable for portable medical imaging, multi-channel data acquisition, and nondestructive testing requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for LTC2143CUP-14 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.

The LTC2143CUP-14 belongs to the LTC214x family of dual-channel, low-power, high-SFDR ADCs designed specifically for demanding communications, instrumentation, and medical imaging applications requiring simultaneous sampling and wide input bandwidth.

FAQ

What is the maximum sampling rate supported by the LTC2143CUP-14?

The LTC2143CUP-14 supports a maximum sampling rate of 80Msps, as specified in its ordering part number suffix and confirmed in the DC and dynamic accuracy specifications tables. This rate applies to both channels simultaneously, with pipeline latency of 6.5 cycles in DDR output modes. Operation above 80Msps is not characterized or guaranteed and may result in degraded SNR or SFDR performance.

Does the LTC2143CUP-14 support differential analog input configurations?

Yes, the LTC2143CUP-14 is designed for differential analog input operation on both channels (AIN1+/AIN1– and AIN2+/AIN2–), with specified performance including 72.9dB SNR and ±1LSB INL under differential drive conditions. Common-mode bias is provided internally via VCM1 and VCM2 pins, and the full 750MHz bandwidth is validated with differential inputs.

How does the SENSE pin affect the input range of the LTC2143CUP-14?

The SENSE pin on the LTC2143CUP-14 directly configures the full-scale input range: tying SENSE to GND selects ±0.5V, to VDD selects ±1V, and applying an external voltage between 0.625V and 1.3V sets a range of ±0.8×VSENSE. This allows precise matching to sensor output levels without external gain stages, and all configurations maintain the same 14-bit resolution and linearity specs.

Can the LTC2143CUP-14 operate with a 1.2V OVDD supply for CMOS outputs?

Yes, the LTC2143CUP-14 supports OVDD from 1.1V to 1.9V, including 1.2V, for CMOS output modes. At 1.2V OVDD, the VOH is guaranteed ≥1.185V and VOL ≤0.010V under 500μA load, enabling direct interfacing with 1.2V logic families. Output current drive and timing specs remain valid across this range, as confirmed in the Digital Inputs and Outputs section.

What power-saving modes are available on the LTC2143CUP-14, and how much power do they consume?

The LTC2143CUP-14 provides Nap Mode (16mW) and Sleep Mode (1mW), both accessible via SPI register writes or parallel control pins. Nap Mode retains register settings and reference bias while disabling ADC cores and outputs; Sleep Mode powers down nearly all circuitry except wake-up logic. These modes are fully characterized over temperature and support rapid resumption (<1μs wake-up time) for burst-mode acquisition systems.

LTC2143CUP-14 Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
-
Package/Case:
64-WFQFN Exposed Pad
Packaging:
Tube
Product Status:
Obsolete
Number of Bits:
14
Sampling Rate (Per Second):
80M
Number of Inputs:
2
Input Type:
Differential
Data Interface:
Parallel
Configuration:
S/H-ADC
Ratio - S/H:ADC:
1:1
Number of A/D Converters:
2
Architecture:
Pipelined
Reference Type:
External, Internal
Voltage - Supply, Analog:
1.7V ~ 1.9V
Voltage - Supply, Digital:
1.7V ~ 1.9V
Features:
Simultaneous Sampling
Operating Temperature:
0°C ~ 70°C
Supplier Device Package:
64-QFN (9x9)
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-

LTC2143CUP-14 FAQ

1.How can I place an order for LTC2143CUP-14 through Aetrix?

Please submit a Request for Quotation (RFQ) for LTC2143CUP-14 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LTC2143CUP-14 reliable?

The price and inventory of LTC2143CUP-14 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2143CUP-14 is usually 5 days.

3.What payment methods are accepted for LTC2143CUP-14?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2143CUP-14 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LTC2143CUP-14?

LTC2143CUP-14 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LTC2143CUP-14 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LTC2143CUP-14?

For technical support, including LTC2143CUP-14 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2143CUP-14 requirements.

6.How does Aetrix verify that LTC2143CUP-14 is sourced from the original manufacturer or authorized distributors?

All LTC2143CUP-14 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2143CUP-14 meets industry standards.

7.What is the process for return or replacement of LTC2143CUP-14?

All LTC2143CUP-14 units undergo pre-shipment inspection (PSI). If there is an issue with LTC2143CUP-14, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LTC2143CUP-14 part is unused and in its original packaging.

Return procedure for LTC2143CUP-14:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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