Analog Devices Inc. LTC2143CUP-14#PBF

Overview

LTC2143CUP-14#PBF from Analog Devices (formerly Linear Technology) is a 14-bit, dual-channel simultaneous-sampling analog-to-digital converter optimized for 80Msps operation in communications and instrumentation systems. It delivers 72.9dB SNR, 90dB SFDR, 750MHz full-power bandwidth, ±1LSB INL, and operates from a single 1.8V supply with CMOS/DDR-CMOS/DDR-LVDS output options - enabling high-fidelity digitization of IF signals in portable medical imaging and multi-channel data acquisition.

For engineers reviewing the LTC2143CUP-14#PBF datasheet, LTC2143CUP-14#PBF pinout, LTC2143CUP-14#PBF application, or LTC2143CUP-14#PBF equivalent, key selection criteria include sampling rate vs. power trade-off (113mW total), differential input common-mode range (0.7–1.25V), clock jitter tolerance (0.10psRMS), and support for internal/external reference configuration via SENSE pin.

Technical Context

This ADC employs a two-channel interleaved sample-and-hold architecture with independent analog front-ends per channel, supporting true simultaneous sampling critical for phase-coherent I/Q demodulation. Its 750MHz full-power bandwidth and ultralow aperture jitter (0.10psRMS in differential encode mode) enable undersampling of 70MHz+ IF signals while maintaining 72.9dB SNR at –1dBFS.

Digital interface flexibility includes full-rate CMOS, DDR-CMOS, or DDR-LVDS outputs with separate OVDD supply (1.1–1.9V), configurable via PAR/SER pin. Internal reference (1.25V ±25ppm/°C) or external reference (0.625–1.3V) selection is controlled by the SENSE pin, directly setting input range to ±0.5V, ±1V, or ±0.8·V_SENSE.

Key Specifications

Pinout & Package

64-pin (9mm × 9mm) plastic QFN package with exposed thermal pad (Pin 65 = GND). Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel 14-bit ADC applications.

Compared with AD9253BCPZ-80 and LTC2263IUJ-80#PBF, the LTC2143CUP-14#PBF provides native dual-channel simultaneity, integrated reference with programmable range, and lower power - simplifying design for phase-coherent applications where channel matching and thermal footprint are critical.

Availability

LTC2143CUP-14#PBF is available at Aetrix Electronics and suitable for portable medical imaging, multi-channel data acquisition, nondestructive testing, and software defined radios requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for LTC2143CUP-14#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains its high-performance analog IC portfolio, emphasizing precision signal chain solutions for demanding industrial and communications markets.

The LTC2143CUP-14#PBF belongs to the LTC214x family of dual-channel, low-power, high-speed ADCs designed specifically for undersampling applications in communications infrastructure, test equipment, and portable instrumentation where simultaneity, SNR, and power efficiency are critical.

FAQ

What is the maximum sampling rate supported by the LTC2143CUP-14#PBF?

The LTC2143CUP-14#PBF is rated for a maximum sampling rate of 80Msps - this is the fixed speed grade for the LTC2143 variant within the LTC214x family. It cannot operate at the 105Msps or 125Msps rates specified for the LTC2144 or LTC2145 variants, respectively. The device maintains full AC performance (72.9dB SNR, 90dB SFDR) at this rate under specified conditions (1.8V supply, 2VP-P input, differential encode).

How does the SENSE pin configure input range on the LTC2143CUP-14#PBF?

The SENSE pin on the LTC2143CUP-14#PBF directly determines full-scale input range: connecting to VDD selects ±1V, grounding selects ±0.5V, and applying an external voltage (0.625–1.3V) sets range to ±0.8·V_SENSE. This hardware-selectable configuration eliminates need for external gain switches or programmable amplifiers, and is validated across the 0°C to 70°C operating range for the LTC2143C grade.

Does the LTC2143CUP-14#PBF support simultaneous sampling across both channels?

Yes, the LTC2143CUP-14#PBF implements true simultaneous sampling using two independent sample-and-hold circuits and ADC cores. This architecture ensures zero inter-channel skew (<1ps typical), which is essential for I/Q signal processing and phase-coherent multi-channel applications. Channel matching specifications (±0.2% gain, ±1.5mV offset) are guaranteed only because of this simultaneous architecture.

What output interface options are available for the LTC2143CUP-14#PBF?

The LTC2143CUP-14#PBF supports three digital output modes: full-rate CMOS, double-data-rate (DDR) CMOS, and DDR LVDS - selected via configuration registers accessed through the SPI port or parallel control pins. Output supply OVDD (Pin 42) must be set to 1.1–1.9V for CMOS modes or 1.7–1.9V for LVDS; on-chip 100Ω LVDS termination is enabled automatically when LVDS mode is selected.

What is the power consumption of the LTC2143CUP-14#PBF in active and low-power modes?

In active operation at 80Msps with CMOS outputs, the LTC2143CUP-14#PBF consumes 113mW total (57mW per channel). In Nap mode, power drops to 16mW while retaining register state and enabling fast wake-up; Sleep mode reduces consumption to 1mW with full shutdown of analog and digital circuitry. These values are measured at VDD = OVDD = 1.8V, sine-wave input, and include all internal circuitry - no external drivers or buffers required.