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Analog Devices Inc. LTC2155CUP-14#PBF
- Part No.:
- LTC2155CUP-14#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 64-WFQFN Exposed Pad
- Datasheet:
-
LTC2155CUP-14#PBF.pdf
- Description:
- IC ADC 14BIT PIPELINED 64QFN
- Quantity:
- Payment:
- Shipping:
Inventory:108
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Product details
Overview
LTC2155CUP-14#PBF from Analog Devices (formerly Linear Technology) is a dual-channel, 14-bit, 170Msps analog-to-digital converter optimized for undersampling wideband RF signals in communications infrastructure. It delivers 70dB SNR, 90dB SFDR, and 1.25GHz full-power bandwidth with single 1.8V supply operation and DDR LVDS outputs. It serves as the digitization front-end in cellular basestations and software-defined radios.
For engineers reviewing the LTC2155CUP-14#PBF datasheet, LTC2155CUP-14#PBF pinout, LTC2155CUP-14#PBF application, or LTC2155CUP-14#PBF equivalent, key selection criteria include its 170Msps sampling rate, 14-bit resolution with no missing codes, 1.5VP-P easy-to-drive input range, low 567mW total power consumption, and compatibility with 64-pin QFN PCB layouts.
Technical Context
The LTC2155CUP-14#PBF implements a pipelined ADC architecture with integrated sample-and-hold (S/H) featuring 1.25GHz full-power bandwidth and 0.15psRMS acquisition jitter. Its digital interface uses double-data-rate LVDS outputs with programmable 1.75mA/3.5mA current modes and on-chip 100Ω termination.
Configuration is managed via a 3-wire SPI port supporting serial programming mode (PAR/SER = GND) or parallel logic control (PAR/SER = VDD). An optional clock duty cycle stabilizer enables robust timing across non-50% duty-cycle clocks, and low-power Nap (184mW) and Sleep (<5mW) modes support dynamic power management.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit with guaranteed no missing codes over temperature - ensures monotonicity and precision in high-dynamic-range signal capture. |
| Sampling Rate | 170Msps maximum - supports Nyquist-sampled IF signals up to 85MHz or undersampled RF bands beyond 1GHz. |
| SNR / SFDR | 70dB SNR and 90dB SFDR at 15MHz input - enables high-fidelity digitization of weak signals in presence of strong interferers. |
| Analog Input Range | 1.5VP-P differential - simplifies anti-alias filter and driver amplifier design with relaxed common-mode requirements. |
| Power Consumption | 567mW total at 170Msps (3.5mA LVDS mode) - balances performance and thermal budget in dense RF card designs. |
| Full-Power Bandwidth | 1250MHz - allows direct RF sampling of L-band and S-band signals without external track-and-hold. |
| Pipeline Latency | 6 clock cycles - enables deterministic timing alignment in real-time digital downconversion (DDC) pipelines. |
Pinout & Package
64-lead (9mm × 9mm) plastic QFN package with exposed thermal pad (Pin 65 = GND), requiring soldering to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AINA+/AINA–, AINB+/AINB– | Differential analog inputs (Ch A & Ch B) | Accept 1.5VP-P differential signal; common-mode biased by internal VCM (~0.783V at VDD=1.8V). |
| ENC+/ENC– | Differential encode clock inputs | Trigger conversion on both edges; support sine wave, LVDS, PECL, TTL, or CMOS drive; duty cycle stabilizer optional. |
| DA0_1+/- to DA12_13+/-, DB0_1+/- to DB12_13+/- | DDR LVDS data outputs (Ch A & Ch B) | Each pair carries two time-multiplexed bits per clock edge; 100Ω on-chip termination enabled by default. |
| CLKOUT+/CLKOUT– | DDR output clock | Synchronizes LVDS data; phase programmable relative to data for timing margin optimization. |
| PAR/SER, CS, SCK, SDI, SDO | Mode configuration interface | Serial (3-wire SPI) or parallel logic control of LVDS current, duty cycle stabilizer, Nap/Sleep modes, and output format. |
| SENSE, VREF, VCM | Reference and bias control | SENSE selects internal (±0.75V) or external (±0.6×VSENSE) input range; VREF = 1.25V ±25mV; VCM = 0.435×VDD ±18mV. |
Key Features
| Feature | Design Value |
|---|---|
| Dual simultaneous sampling | Enables coherent I/Q digitization without interleaving artifacts or channel skew - critical for zero-IF and direct-conversion receivers. |
| 1.25GHz full-power bandwidth | Supports direct RF sampling of 900MHz cellular, 2.4GHz Wi-Fi, and 3.5GHz 5G NR bands without external S/H or amplifiers. |
| Programmable LVDS output current | 1.75mA or 3.5mA per differential pair - allows trade-off between signal integrity, EMI, and power in high-density routing. |
| 6-cycle deterministic latency | Permits precise timing closure in FPGA-based DDC and beamforming logic with fixed, known pipeline delay. |
| Low-power Nap and Sleep modes | Nap mode draws 184mW during idle periods; Sleep mode draws <5mW - extends uptime in burst-mode or TDD systems. |
Applications
| Cellular Basestation Receiver | Software Defined Radio (SDR) |
|---|---|
Use Scenario: Digitizing 70MHz–380MHz LTE/5G NR IF or RF signals in macrocell remote radio heads. IC Role / Device Role / Timing Role: Dual-channel ADC front-end providing synchronized I/Q sampling with 170Msps rate and 1.25GHz bandwidth. Use Value: Enables direct RF sampling architecture, eliminating analog mixers and filters while maintaining 70dB SNR for high-order QAM demodulation. |
Use Scenario: Reconfigurable wideband receiver in military comms or spectrum monitoring equipment. IC Role / Device Role / Timing Role: High-dynamic-range digitizer supporting multi-band, multi-standard operation via programmable sample rate and input range. Use Value: 90dB SFDR suppresses harmonics and intermodulation products when capturing multiple simultaneous signals across 1GHz bandwidth. |
| Medical Ultrasound Beamformer | High-Speed Test Equipment |
Use Scenario: Channel digitization in portable ultrasound systems requiring compact, low-power, high-SNR signal capture. IC Role / Device Role / Timing Role: Dual 14-bit ADC capturing echo return signals from phased-array transducers at up to 170Msps. Use Value: 1.5VP-P input range simplifies analog front-end design with low-noise op-amps; 567mW total power enables battery-operated form factors. |
Use Scenario: Real-time waveform acquisition in 1GS/s-class oscilloscopes and vector signal analyzers. IC Role / Device Role / Timing Role: High-fidelity digitizer for time-domain analysis with low transition noise (1.82LSBRMS) and minimal missing codes. Use Value: ±0.85LSB INL and ±0.25LSB DNL ensure accurate amplitude fidelity and harmonic distortion measurement below –90dBc. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, 14-bit, high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9680BCPZ-500 | Higher 500Msps sampling rate; JESD204B serial interface instead of DDR LVDS; 1.25V supply; larger 72-lead LFCSP package. | Better suited for wideband radar and mmWave test where >200Msps is required; requires FPGA with JESD204B PHY. | Select AD9680BCPZ-500 when system demands higher sample rate and has JESD204B infrastructure; avoid if LVDS interface or 64-QFN footprint is mandatory. |
| LTC2268-14IUP#PBF | Single-channel 14-bit 125Msps ADC; identical 64-QFN package and 1.8V supply; lower 350mW power; 1.3GHz bandwidth. | Applicable where dual-channel correlation is unnecessary and board space or cost must be minimized. | Choose LTC2268-14IUP#PBF for cost-sensitive, single-path applications like legacy IF digitizers; not suitable for I/Q or MIMO systems requiring simultaneous sampling. |
Compared with AD9680BCPZ-500 and LTC2268-14IUP#PBF, the LTC2155CUP-14#PBF uniquely balances 170Msps dual-channel performance, DDR LVDS simplicity, 64-QFN footprint, and sub-600mW power - making it optimal for space-constrained, mixed-signal RF cards where JESD204B complexity is unwarranted.
Availability
LTC2155CUP-14#PBF is available at Aetrix Electronics and suitable for cellular basestation receiver modules, software-defined radio platforms, medical ultrasound beamformers, and high-speed test instrumentation requiring stable component supply across production lifecycles.
Supply support for LTC2155CUP-14#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and RF ICs, serving aerospace, communications, industrial, and healthcare markets with precision signal chain solutions.
The LTC2155CUP-14#PBF belongs to the LTC215x-14 family of ultra-low-jitter, dual-channel, high-speed ADCs designed specifically for demanding RF/IF digitization in wireless infrastructure and instrumentation where SNR, SFDR, and undersampling capability are critical.
FAQ
What is the maximum sampling rate supported by the LTC2155CUP-14#PBF?
The LTC2155CUP-14#PBF supports a maximum sampling rate of 170Msps. This is confirmed in the "CONVERTER CHARACTERISTICS" table under the fS parameter for the LTC2155-14 variant, with typical operation specified at 170MHz and minimum guaranteed rate of 10MHz. The device maintains full AC performance-including 70dB SNR and 90dB SFDR-at this maximum rate.
Does the LTC2155CUP-14#PBF support external reference voltage?
Yes, the LTC2155CUP-14#PBF supports external reference voltage via the SENSE pin. When an external voltage between 1.200V and 1.300V is applied to SENSE, the input range becomes ±0.6 × VSENSE (e.g., ±0.72V for 1.2V). This is documented in the ANALOG INPUT section and PIN FUNCTIONS description, enabling flexible scaling for custom signal chains.
What are the power supply requirements for the LTC2155CUP-14#PBF?
The LTC2155CUP-14#PBF requires two independent 1.8V supplies: VDD (pins 1, 2, 15, 16, 17, 64) for analog circuitry and OVDD (pins 32, 49) for LVDS output drivers. Both must be regulated between 1.7V and 1.9V. Total power dissipation is 567mW at 170Msps in 3.5mA LVDS mode, with separate IVDD (274mA) and IOVDD (43mA) current specs provided in the POWER REQUIREMENTS table.
How is the LTC2155CUP-14#PBF configured for operation?
The LTC2155CUP-14#PBF is configured via a 3-wire SPI interface (CS, SCK, SDI, SDO) when PAR/SER is tied to GND, or via parallel logic inputs (CS, SCK, SDI) when PAR/SER is tied to VDD. Configuration options include LVDS output current (1.75mA or 3.5mA), clock duty cycle stabilizer enable/disable, and Nap/Sleep mode entry-detailed in the TIMING CHARACTERISTICS and PIN FUNCTIONS sections.
What is the function of the OF+/OF– pins on the LTC2155CUP-14#PBF?
The OF+ and OF– pins on the LTC2155CUP-14#PBF provide a differential over/underflow flag indicating when the analog input exceeds the valid full-scale range. OF+ goes high during overflow or underflow events, with multiplexed detection for both Channel A and Channel B. This real-time saturation indicator aids in automatic gain control (AGC) loop implementation and signal integrity monitoring.
LTC2155CUP-14#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 64-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 170M
- Number of Inputs:
- 2
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 64-QFN (9x9)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2155CUP-14#PBF FAQ
1.How can I place an order for LTC2155CUP-14#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2155CUP-14#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2155CUP-14#PBF reliable?
The price and inventory of LTC2155CUP-14#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2155CUP-14#PBF is usually 5 days.
3.What payment methods are accepted for LTC2155CUP-14#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2155CUP-14#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2155CUP-14#PBF?
LTC2155CUP-14#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2155CUP-14#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2155CUP-14#PBF?
For technical support, including LTC2155CUP-14#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2155CUP-14#PBF requirements.
6.How does Aetrix verify that LTC2155CUP-14#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2155CUP-14#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2155CUP-14#PBF meets industry standards.
7.What is the process for return or replacement of LTC2155CUP-14#PBF?
All LTC2155CUP-14#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2155CUP-14#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2155CUP-14#PBF part is unused and in its original packaging.
Return procedure for LTC2155CUP-14#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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