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Analog Devices Inc. LTC2155IUP-12#PBF
- Part No.:
- LTC2155IUP-12#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 64-WFQFN Exposed Pad
- Datasheet:
-
LTC2155IUP-12#PBF.pdf
- Description:
- IC ADC 12BIT PIPELINED 64QFN
- Quantity:
- Payment:
- Shipping:
Inventory:4,341
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Product details
Overview
LTC2155IUP-12#PBF from Analog Devices (formerly Linear Technology) is a dual-channel, 12-bit, 170Msps analog-to-digital converter optimized for high-dynamic-range signal digitization in communications infrastructure. It delivers 68.3dB SNR, 90dB SFDR, and 1.25GHz full-power bandwidth with single 1.8V supply operation and DDR LVDS outputs. It serves as the front-end ADC in cellular basestations and software-defined radios requiring undersampling capability.
For engineers reviewing the LTC2155IUP-12#PBF datasheet, LTC2155IUP-12#PBF pinout, LTC2155IUP-12#PBF application, or LTC2155IUP-12#PBF equivalent, this page provides verified technical context, package mapping, real-world use scenarios, and validated alternative options for RF receiver chain design, high-speed data acquisition, and wideband spectrum analysis systems.
Technical Context
The LTC2155IUP-12#PBF implements a pipelined ADC architecture with integrated sample-and-hold (S/H) and correction logic per channel. Its 1.25GHz input bandwidth enables high-IF and direct-RF sampling up to 907MHz while maintaining ≤0.30LSB DNL and ±0.30LSB INL over temperature.
Dual DDR LVDS output interfaces operate at 3.5mA or 1.75mA current levels, with programmable on-chip 100Ω termination and configurable CLKOUT phase delay. Serial SPI configuration supports sleep/napping modes, clock duty cycle stabilization, and PAR/SER programming mode selection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes across –40°C to +85°C operating range |
| Sampling Rate | 170Msps maximum - defines Nyquist zone width and real-time bandwidth capture capability |
| SNR | 68.3dBFS at 70MHz input - determines minimum detectable signal level in noise-limited receivers |
| SFDR | 90dBFS at 70MHz input - ensures clean spectral separation of adjacent channels in dense RF environments |
| Full-Power Bandwidth | 1250MHz - enables undersampling of L-band and S-band signals without external filtering |
| Power Dissipation | 545mW total at 170Msps (1.75mA LVDS mode) - supports thermal management in densely packed RF modules |
| Input Range | 1.5VP-P differential - simplifies interface with baluns and RF amplifiers without gain adjustment |
Pinout & Package
64-lead (9mm × 9mm) plastic QFN package with exposed thermal pad (Pin 65 = GND), requiring soldering to PCB ground plane for thermal and electrical integrity. Dual supply domains: VDD (analog) and OVDD (output drivers), each bypassed with 0.1µF ceramic capacitors.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AINA+/AINA–, AINB+/AINB– | Differential analog inputs (Ch A & Ch B) | Accept 1.5VP-P signal with common-mode bias set by internal VCM (0.435•VDD) |
| ENC+/ENC– | Differential encode clock inputs | Trigger conversion on both edges; support sine wave, LVDS, PECL, TTL, or CMOS drive |
| DA0_1+ to DA10_11+, DB0_1+ to DB10_11+ | DDR LVDS data outputs (Ch A & Ch B) | Each pair carries two time-multiplexed bits synchronized to CLKOUT+ rising/falling edges |
| CLKOUT+/CLKOUT– | DDR output clock | Phase-adjustable clock for timing alignment with external FPGA/ASIC capture logic |
| PAR/SER, CS, SCK, SDI, SDO | Configuration interface | Select serial (SPI) or parallel programming mode; control sleep, nap, LVDS current, and duty cycle stabilizer |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent 12-bit ADC cores | Enables simultaneous I/Q sampling or parallel channel processing without interleaving artifacts |
| 1.25GHz full-power bandwidth | Supports direct RF sampling of 3G/4G LTE and WiMAX carriers up to 2.6GHz second Nyquist zone |
| 68.3dB SNR / 90dB SFDR @ 70MHz | Meets dynamic range requirements for multi-carrier base station receivers with >100dB spurious-free operation |
| Programmable DDR LVDS output current | 3.5mA or 1.75mA selection allows optimization of signal integrity vs. power in FPGA-connected systems |
| Integrated clock duty cycle stabilizer | Compensates for input clock asymmetry-critical for maintaining timing margin at 170Msps sampling rate |
| SPI-configurable low-power modes | Sleep mode (<5mW) and Nap mode (154mW) enable rapid power-state transitions in burst-mode receivers |
Applications
| Cellular Basestation Receiver | Software Defined Radio (SDR) |
|---|---|
|
Use Scenario: Digitizing multi-carrier LTE signals in macrocell remote radio heads with IF frequencies up to 180MHz. IC Role / Device Role / Timing Role: Dual-channel ADC captures I/Q baseband or high-IF signals with 170Msps sustained throughput and <6-cycle pipeline latency. Use Value: 1250MHz bandwidth enables direct sampling of 3rd Nyquist zone signals, eliminating image-reject filters and reducing BOM count. |
Use Scenario: Wideband spectrum monitoring across 10MHz–6GHz using tunable RF front-end and digital downconversion. IC Role / Device Role / Timing Role: High-SFDR ADC front-end providing clean digitization for real-time FFT and modulation analysis. Use Value: 90dB SFDR ensures accurate detection of weak signals adjacent to strong interferers in crowded spectrum environments. |
| Medical Ultrasound Beamformer | Test & Measurement Instrumentation |
|
Use Scenario: Digitizing 5–15MHz echo return signals from phased-array transducers with precise time-of-flight resolution. IC Role / Device Role / Timing Role: Low-jitter (0.15psRMS) S/H and deterministic 6-cycle latency enable coherent channel summation. Use Value: 68.3dB SNR preserves contrast resolution in B-mode imaging; 0.54LSBRMS transition noise minimizes speckle artifacts. |
Use Scenario: High-fidelity waveform capture in vector signal analyzers and oscilloscopes targeting >100MHz instantaneous bandwidth. IC Role / Device Role / Timing Role: Dual-channel ADC core supporting interleaved or independent acquisition modes for differential measurement. Use Value: Pin-compatible family scaling (LTC2155/LTC2156/LTC2157) allows shared PCB layout across 170/210/250Msps performance tiers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, 12-bit, high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9233BCPZ-170 | Single-channel 12-bit 170Msps ADC; 69.5dB SNR; 1.1GHz bandwidth; CMOS outputs | Requires two devices for dual-channel operation; lacks DDR LVDS and integrated duty cycle stabilizer | Select when board space permits discrete channel routing and lower power per channel is prioritized over integration |
| LTC2156IUP-12#PBF | Same pinout, 210Msps sampling rate, 68.5dB SNR, 592mW power at 210Msps | Higher speed variant within same family; identical footprint and register map | Choose for upgraded throughput where system clock allows 210Msps and thermal budget supports +47mW dissipation |
Compared with LTC2155IUP-12#PBF, AD9233BCPZ-170 requires duplication for dual-channel use and lacks key RF features like duty cycle stabilization, while LTC2156IUP-12#PBF offers a drop-in speed upgrade with identical layout and firmware compatibility.
Availability
LTC2155IUP-12#PBF is available at Aetrix Electronics and suitable for cellular basestations, software-defined radios, and medical ultrasound systems requiring stable component supply, long-term obsolescence planning, and traceable sourcing.
Supply support for LTC2155IUP-12#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance signal chain portfolio, emphasizing precision, speed, and reliability in data conversion and power management ICs.
The LTC2155IUP-12#PBF belongs to the LTC215x-12 family of dual high-speed ADCs designed specifically for demanding RF and communications applications where wide input bandwidth, low distortion, and low power are critical.
FAQ
What is the guaranteed operating temperature range for the LTC2155IUP-12#PBF?
The LTC2155IUP-12#PBF is rated for industrial operation from –40°C to +85°C, as confirmed by the "I" grade designation in its part number and validated across all DC and AC specifications in the datasheet's converter characteristics tables.
Does the LTC2155IUP-12#PBF support internal or external voltage reference configurations?
Yes, the LTC2155IUP-12#PBF supports both: connecting SENSE to VDD enables the internal 1.25V reference and ±0.75V input range, while applying 1.20–1.30V to SENSE selects an external reference and scales input range to ±0.6 × VSENSE-verified in the Analog Input section of the datasheet.
How many LVDS data pairs does the LTC2155IUP-12#PBF provide per channel?
The LTC2155IUP-12#PBF provides six differential LVDS output pairs per channel (DA0_1 through DA10_11 for Channel A; DB0_1 through DB10_11 for Channel B), each carrying two time-multiplexed 12-bit data bits in DDR format-confirmed in the PIN FUNCTIONS and TIMING DIAGRAMS sections.
Can the LTC2155IUP-12#PBF be used in sleep mode during idle periods?
Yes, the LTC2155IUP-12#PBF supports a sleep mode drawing less than 5mW when the encode clock is disabled, as specified in the POWER REQUIREMENTS table-enabling significant power savings in burst-mode or time-division duplexed systems.
Is the LTC2155IUP-12#PBF pin-compatible with other members of the LTC215x-12 family?
Yes, the LTC2155IUP-12#PBF shares identical 64-lead QFN packaging, pin assignment, and register map with LTC2156IUP-12#PBF and LTC2157IUP-12#PBF-explicitly stated in the FEATURES list as "Pin Compatible 14-Bit Versions" and confirmed in the ORDER INFORMATION table.
LTC2155IUP-12#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 64-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 170M
- Number of Inputs:
- 2
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 64-QFN (9x9)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2155IUP-12#PBF FAQ
1.How can I place an order for LTC2155IUP-12#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2155IUP-12#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2155IUP-12#PBF reliable?
The price and inventory of LTC2155IUP-12#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2155IUP-12#PBF is usually 5 days.
3.What payment methods are accepted for LTC2155IUP-12#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2155IUP-12#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2155IUP-12#PBF?
LTC2155IUP-12#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2155IUP-12#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2155IUP-12#PBF?
For technical support, including LTC2155IUP-12#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2155IUP-12#PBF requirements.
6.How does Aetrix verify that LTC2155IUP-12#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2155IUP-12#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2155IUP-12#PBF meets industry standards.
7.What is the process for return or replacement of LTC2155IUP-12#PBF?
All LTC2155IUP-12#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2155IUP-12#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2155IUP-12#PBF part is unused and in its original packaging.
Return procedure for LTC2155IUP-12#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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