Analog Devices Inc. LTC2170CUKG-12#TRPBF
- Part No.:
- LTC2170CUKG-12#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 52-WFQFN Exposed Pad
- Datasheet:
-
LTC2170CUKG-12#TRPBF.pdf
- Description:
- IC ADC 12BIT PIPELINED 52QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,320
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Product details
Overview
LTC2170CUKG-12#TRPBF from Analog Devices (formerly Linear Technology) is a 12-bit, 4-channel simultaneous-sampling analog-to-digital converter optimized for high-frequency signal digitization in communications infrastructure. It delivers 71dB SNR and 90dB SFDR at 25Msps, with ultralow 0.15psRMS jitter and 800MHz full-power bandwidth, enabling undersampling of IF signals in cellular base stations and software-defined radios.
For engineers reviewing the LTC2170CUKG-12#TRPBF datasheet, LTC2170CUKG-12#TRPBF pinout, LTC2170CUKG-12#TRPBF application, or LTC2170CUKG-12#TRPBF equivalent, this quad ADC supports serial LVDS output (1- or 2-lane), 1.8V single-supply operation, selectable 1–2VP-P input range, and SPI configuration - critical for multichannel data acquisition and portable medical imaging systems requiring low power and precise timing.
Technical Context
The LTC2170CUKG-12#TRPBF implements four independent 12-bit ADC cores with shared sample-and-hold and internal clock duty cycle stabilizer, supporting differential or single-ended encode inputs (PECL/LVDS/TTL/CMOS). Its architecture enables true simultaneous sampling across all channels without inter-channel skew.
It features integrated 1.25V reference with ±25ppm/°C drift, programmable LVDS output current (1.75mA or 3.5mA per lane), internal termination enable via SDO pin, and configurable serialization (12-/14-/16-bit per channel) to match interface bandwidth requirements while maintaining pipeline latency of exactly 6 cycles.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes over temperature - guarantees monotonicity and full code coverage in precision measurement. |
| Sampling Rate | 25Msps maximum - defines real-time bandwidth for baseband and low-IF digitization in cost-sensitive SDR front ends. |
| SNR / SFDR | 71dB / 90dB at 70MHz input - enables high-fidelity capture of narrowband signals amid strong interferers in cellular infrastructure. |
| Input Bandwidth | 800MHz full-power - supports direct sampling of L-band and S-band RF signals without external amplification or filtering. |
| Power Consumption | 160mW total (40mW per channel) at 25Msps - reduces thermal load and simplifies thermal management in dense multichannel PCB layouts. |
| Jitter Performance | 0.15psRMS aperture jitter - limits SNR degradation to ≤0.1dB at 100MHz input frequency, critical for undersampling accuracy. |
| Analog Supply | Single 1.8V (1.7V–1.9V) - eliminates need for dual supplies and simplifies power delivery network design. |
Pinout & Package
52-pin (7mm × 8mm) plastic QFN package with exposed thermal pad (Pin 53 = GND). Requires soldering exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN1+ / AIN1– AIN2+ / AIN2– AIN3+ / AIN3– AIN4+ / AIN4– |
Differential analog inputs (Ch1–Ch4) | Accept 1–2VP-P differential signals; common-mode bias provided by VCM12 (Pins 3) and VCM34 (Pin 12). |
| ENC+ / ENC– | Differential encode clock input | Triggers conversion on rising/falling edges; supports duty cycle stabilization for wide-range clock sources. |
| OUT1A+/– to OUT4B+/– | LVDS serialized data outputs | Two differential pairs per channel (A/B) for 1- or 2-lane mode; configurable output current and internal 100Ω termination. |
| DCO+ / DCO– FR+ / FR– |
Data clock and frame clock outputs | Synchronize LVDS data streams; tFRAME and tDATA delays are precisely defined relative to tSER for FPGA interface timing closure. |
| CS / SCK / SDI / SDO | SPI configuration interface | Enables register programming for serialization mode, output current, termination, and power modes (Nap/Sleep). |
Key Features
| Feature | Design Value |
|---|---|
| Quad simultaneous sampling | Eliminates inter-channel timing skew (<1ps) - essential for beamforming and phase-coherent multichannel systems. |
| Serial LVDS output (1-/2-lane) | Reduces interface pin count by >50% vs parallel CMOS; supports FPGA I/O banks with LVDS receivers and built-in termination. |
| Configurable input range (1–2VP-P) | Optimizes dynamic range utilization across varying signal amplitudes without external gain stages or attenuators. |
| Internal clock duty cycle stabilizer | Allows use of asymmetric clocks (e.g., from PLLs or crystal oscillators) without SNR degradation at full 25Msps rate. |
| Nap mode (75mW) and Sleep mode (1mW) | Enables rapid power-state transitions during burst-mode operation - extends battery life in portable test equipment. |
Applications
| Cellular Base Station Receiver | Portable Ultrasound Imaging |
|---|---|
Use Scenario: Digitizing multiple antenna path IF signals (70–140MHz) in LTE/5G macrocell remote radio units. IC Role / Device Role / Timing Role: Quad ADC core providing synchronized sampling across receive chains for digital beamforming and MIMO processing. Use Value: 90dB SFDR suppresses adjacent-channel interference; 0.15psRMS jitter preserves EVM under high-order QAM modulation. |
Use Scenario: Capturing echo return signals from phased-array transducers in handheld ultrasound devices. IC Role / Device Role / Timing Role: Simultaneous sampling of four analog front-end channels for real-time B-mode image reconstruction. Use Value: 71dB SNR ensures high contrast resolution; 160mW total power enables battery operation for >4 hours per charge. |
| Multichannel Data Acquisition System | Nondestructive Testing (NDT) Instrumentation |
Use Scenario: High-precision monitoring of vibration, strain, and temperature sensors in industrial predictive maintenance platforms. IC Role / Device Role / Timing Role: Low-noise, time-aligned digitization of four sensor outputs for FFT-based spectral analysis. Use Value: ±0.3LSB INL and ±0.1LSB DNL ensure accurate amplitude calibration; 800MHz bandwidth captures harmonics up to 10th order. |
Use Scenario: Pulse-echo ultrasonic inspection of welds and composite materials using broadband transducers. IC Role / Device Role / Timing Role: High-fidelity capture of short-duration return pulses (≤10ns rise time) across multiple probe channels. Use Value: 0.3LSBRMS transition noise minimizes false defect detection; simultaneous sampling enables time-of-flight differential analysis. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9257BCPZ-25 | 14-bit, 25Msps, JESD204B output, 1.8V supply, 195mW typical power | Higher resolution but no LVDS serialization; requires FPGA with JESD204B PHY instead of standard LVDS I/O | Select when 14-bit ENOB is required and system already supports JESD204B; avoid if LVDS compatibility or pin count reduction is critical. |
| LTC2171CUKG-12#TRPBF | Same pinout/package, 40Msps max, 198mW power, identical feature set | Higher speed grade; suitable where 25Msps is insufficient but same footprint and firmware compatibility are needed | Drop-in upgrade path when sampling rate must increase without PCB redesign; shares same SPI register map and LVDS timing. |
Compared with AD9257BCPZ-25 and LTC2171CUKG-12#TRPBF, the LTC2170CUKG-12#TRPBF offers optimal balance of 12-bit performance, ultra-low jitter, LVDS interface simplicity, and lowest power in its speed class - making it ideal for space-constrained, thermally sensitive, and cost-driven multichannel systems.
Availability
LTC2170CUKG-12#TRPBF is available at Aetrix Electronics and suitable for cellular base station receiver, portable ultrasound imaging, and multichannel data acquisition systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LTC2170CUKG-12#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies.
The LTC2170CUKG-12#TRPBF belongs to the LTC217x family of low-power quad ADCs designed specifically for demanding communications and instrumentation applications where simultaneous sampling, low jitter, and compact integration are mandatory.
FAQ
What is the maximum sampling rate supported by the LTC2170CUKG-12#TRPBF?
The LTC2170CUKG-12#TRPBF supports a maximum sampling rate of 25Msps, as specified in its speed grade designation. This is confirmed in the Timing Characteristics table (Page 6) and distinguishes it from the faster LTC2171-12 (40Msps) and LTC2172-12 (65Msps) variants in the same family. Operation above 25Msps is not guaranteed and may violate AC specifications.
Does the LTC2170CUKG-12#TRPBF support both 1-lane and 2-lane LVDS output modes?
Yes, the LTC2170CUKG-12#TRPBF supports both 1-lane and 2-lane LVDS serialization. The mode is selected via the CS pin in parallel programming mode (PAR/SER = VDD), as detailed in the Pin Functions section (Page 17). Each channel outputs either one bit per clock edge (1-lane) or two bits per clock edge (2-lane), reducing interface complexity and PCB routing density.
What is the purpose of the VCM12 and VCM34 pins on the LTC2170CUKG-12#TRPBF?
VCM12 (Pin 3) and VCM34 (Pin 12) provide nominally VDD/2 common-mode bias voltages for the differential analog inputs of channels 1–2 and 3–4, respectively. These outputs must be bypassed to ground with 0.1µF ceramic capacitors and used to set the input common-mode level - ensuring optimal linearity and noise performance across all four ADC channels.
Can the LTC2170CUKG-12#TRPBF operate with an external voltage reference?
Yes, the LTC2170CUKG-12#TRPBF supports external reference operation via the SENSE pin (Pin 32), which accepts 0.625V to 1.300V. When an external reference is applied, the internal 1.25V reference is disabled, and gain error improves to ±0.5%FS with ±0.2%FS gain matching between channels - critical for multichannel amplitude consistency in phased-array systems.
How does the Nap mode function on the LTC2170CUKG-12#TRPBF?
The Nap mode reduces power consumption to 75mW while retaining register settings and enabling fast wake-up (<1µs) to full operation. It is activated via SPI register write (bit 1 of MODE register) and maintains LVDS driver readiness - unlike Sleep mode (1mW), which disables outputs and requires longer reinitialization. Nap mode is ideal for burst-mode acquisition in portable test equipment.
LTC2170CUKG-12#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 52-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 25M
- Number of Inputs:
- 4
- Input Type:
- Differential
- Data Interface:
- LVDS - Serial
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 4
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 52-QFN (7x8)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2170CUKG-12#TRPBF FAQ
1.How can I place an order for LTC2170CUKG-12#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2170CUKG-12#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2170CUKG-12#TRPBF reliable?
The price and inventory of LTC2170CUKG-12#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2170CUKG-12#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC2170CUKG-12#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2170CUKG-12#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2170CUKG-12#TRPBF?
LTC2170CUKG-12#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2170CUKG-12#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2170CUKG-12#TRPBF?
For technical support, including LTC2170CUKG-12#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2170CUKG-12#TRPBF requirements.
6.How does Aetrix verify that LTC2170CUKG-12#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC2170CUKG-12#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2170CUKG-12#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC2170CUKG-12#TRPBF?
All LTC2170CUKG-12#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2170CUKG-12#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2170CUKG-12#TRPBF part is unused and in its original packaging.
Return procedure for LTC2170CUKG-12#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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