Analog Devices Inc. LTC2170IUKG-14#PBF
- Part No.:
- LTC2170IUKG-14#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 52-WFQFN Exposed Pad
- Datasheet:
-
LTC2170IUKG-14#PBF.pdf
- Description:
- IC ADC 14BIT PIPELINED 52QFN
- Quantity:
- Payment:

- Shipping:

Inventory:614
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Product details
Overview
LTC2170IUKG-14#PBF from Analog Devices (formerly Linear Technology) is a 14-bit, quad-channel simultaneous-sampling analog-to-digital converter optimized for high-dynamic-range signal digitization at 25Msps. It delivers 73.4dB SNR and 90dB SFDR at 70MHz input, features ultralow 0.15psRMS aperture jitter, operates from a single 1.8V supply, and targets demanding communications and portable medical imaging systems.
For engineers reviewing the LTC2170IUKG-14#PBF datasheet, LTC2170IUKG-14#PBF pinout, LTC2170IUKG-14#PBF application, or LTC2170IUKG-14#PBF equivalent, this page provides verified specifications, package mapping, functional pin roles, real-world use cases, and validated alternative options - all aligned to the I-grade (–40°C to +85°C) variant of the LTC2170-14 family.
Technical Context
The LTC2170IUKG-14#PBF implements four independent 14-bit ADC cores with shared clocking and sample-and-hold, enabling true simultaneous sampling across all channels. Its 800MHz full-power bandwidth supports undersampling of IF signals up to 140MHz while maintaining 73.4dB SNR and 90dB SFDR performance.
It uses serial LVDS outputs in configurable 1-lane or 2-lane mode (1 or 2 bits per channel), with programmable output current (1.75mA/3.5mA) and on-chip 100Ω termination. The ENC+/ENC– interface accepts differential or single-ended clocks, and an internal duty cycle stabilizer ensures consistent timing performance across wide duty cycle ranges.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit with no missing codes over temperature - guarantees monotonicity and full code coverage in precision measurement. |
| Sampling Rate | 25Msps - fixed speed grade for the LTC2170-14 variant, enabling deterministic latency and power budgeting. |
| SNR @ 70MHz | 73.4dBFS - enables high-fidelity digitization of narrowband RF/IF signals in SDR and base station front-ends. |
| SFDR @ 70MHz | 90dBFS - suppresses harmonic distortion critical for multi-tone communication standards like LTE and 5G NR. |
| Aperture Jitter | 0.15psRMS - minimizes sampling uncertainty, preserving ENOB when undersampling >100MHz signals. |
| Power Dissipation | 162mW total (75mW sleep, 1mW nap) - supports battery-powered portable medical and test equipment. |
| Analog Input Range | Selectable 1VP-P to 2VP-P via SENSE pin - allows optimization for signal chain dynamic range without external gain staging. |
Pinout & Package
52-pin (7mm × 8mm) plastic QFN package with exposed thermal pad (Pin 53 = GND). Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN1+ / AIN1– (Pins 1, 2) | Channel 1 differential analog input | Accepts ±0.5V to ±1V differential signal; common-mode biased by VCM12 (Pin 3). |
| VCM12 (Pin 3) | Common-mode bias output for Ch1/Ch2 | Nominally VDD/2 (0.9V); must be bypassed to GND with 0.1µF capacitor for noise rejection. |
| REFH / REFL (Pins 6–9) | ADC reference voltage terminals | High/low reference pair; requires 2.2µF + 0.1µF decoupling for stable 1.25V internal reference operation. |
| ENC+ / ENC– (Pins 17, 18) | Differential encode clock inputs | Trigger conversion on rising/falling edges; support PECL/LVDS/TTL/CMOS; include duty cycle stabilizer. |
| OUT1A+/OUT1A– (Pins 35, 36) | LVDS data output pair for Channel 1 | Serial 1- or 2-lane mode; configurable 1.75mA/3.5mA drive strength; internal 100Ω termination optional. |
| PAR/SER (Pin 47) | Programming mode select | Ground = serial SPI control; VDD = parallel logic control (CS/SCK/SDI/SDO repurposed as mode pins). |
| SENSE (Pin 50) | Reference and input range programming | Connect to VDD → ±1V range; to GND → ±0.5V range; to 0.625–1.3V → ±0.8×VSENSE range. |
Key Features
| Feature | Design Value |
|---|---|
| Quad simultaneous sampling | Enables phase-coherent acquisition across four channels for beamforming, ultrasound echo processing, and MIMO antenna arrays. |
| Ultralow 0.15psRMS jitter | Preserves ENOB above 100MHz input frequencies, eliminating need for external low-jitter clock cleaners in IF sampling architectures. |
| Configurable LVDS serialization | Reduces interface pin count by 50% vs parallel CMOS - supports 1-lane (1-bit) or 2-lane (2-bit) modes with adjustable drive strength. |
| Internal 1.25V reference with ±25ppm/°C drift | Eliminates external reference IC and associated layout complexity while meeting <±0.5% gain error spec over temperature. |
| Shutdown and Nap modes | Reduces power to 1mW (Nap) or 75mW (Shutdown) - extends battery life in portable diagnostic and handheld test instruments. |
Applications
| Cellular Base Station Receiver | Portable Ultrasound Imaging |
|---|---|
|
Use Scenario: Digitizing multiple 70–140MHz IF signals from quadrature downconverters in LTE/5G macrocell receivers. IC Role / Device Role / Timing Role: Simultaneous 4-channel ADC capturing phase-aligned I/Q pairs with 90dB SFDR to resolve adjacent channel interference. Use Value: Enables direct IF sampling without analog filtering stages, reducing BOM cost and board area while maintaining EVM compliance. |
Use Scenario: Acquiring time-aligned RF echo returns from four transducer elements in handheld ultrasound probes. IC Role / Device Role / Timing Role: Quad-channel synchronous sampling with <1ps inter-channel skew for precise beamforming delay calculation. Use Value: Supports real-time synthetic aperture imaging at 25Msps with 73.4dB SNR, improving contrast resolution in deep-tissue scans. |
| Software Defined Radio (SDR) | Multichannel Data Acquisition |
|
Use Scenario: Front-end digitization in wideband SDR platforms requiring tunable IF sampling from 5–140MHz. IC Role / Device Role / Timing Role: High-SFDR ADC with 800MHz bandwidth and programmable input range for adaptive signal chain configuration. Use Value: Delivers consistent 90dB SFDR across frequency bands, enabling single-hardware platform support for multiple wireless standards. |
Use Scenario: High-precision capture of synchronized sensor outputs (e.g., vibration, strain, temperature) in industrial condition monitoring systems. IC Role / Device Role / Timing Role: Simultaneous 14-bit sampling across four channels with ±1LSB INL and ±0.3LSB DNL for calibrated measurement accuracy. Use Value: Eliminates inter-channel timing errors in FFT-based spectral analysis, improving fault detection sensitivity by >3dB. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-channel, 14-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS52J90IRGCT | 14-bit, 65Msps quad ADC with JESD204B interface; higher power (1.2W), no internal reference. | Requires FPGA with JESD204B PHY; better suited for high-throughput backhaul links than portable systems. | Choose for systems needing >25Msps throughput and FPGA-based digital downconversion; avoid if 1.8V-only supply or low-power operation is required. |
| LTC2264IUKG-14#PBF | 14-bit, 25Msps quad ADC with identical QFN-52 package and pin-compatible layout; same 1.8V supply, but lower SFDR (85dB vs 90dB). | Valid drop-in replacement where 5dB SFDR margin is acceptable (e.g., non-critical test instrumentation). | Choose for legacy design reuse or cost-sensitive applications where 90dB SFDR is not mandatory; verify SNR degradation at 70MHz in final layout. |
Compared with ADS52J90IRGCT and LTC2264IUKG-14#PBF, the LTC2170IUKG-14#PBF uniquely balances ultra-low jitter (0.15psRMS), integrated reference, and 162mW power at 25Msps - making it optimal for size- and battery-constrained RF and medical systems where signal fidelity and simplicity are prioritized over raw speed or interface flexibility.
Availability
LTC2170IUKG-14#PBF is available at Aetrix Electronics and suitable for cellular infrastructure, portable medical imaging, software-defined radio, and multichannel data acquisition systems requiring stable component supply across extended temperature ranges (–40°C to +85°C).
Supply support for LTC2170IUKG-14#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and DSP solutions, serving aerospace, industrial, automotive, and communications markets.
The LTC2170IUKG-14#PBF belongs to Linear's high-speed, low-power ADC product line - engineered specifically for communications and portable instrumentation applications demanding simultaneous multi-channel sampling, low jitter, and minimal power-per-channel.
FAQ
What is the maximum input frequency supported by the LTC2170IUKG-14#PBF?
The LTC2170IUKG-14#PBF features an 800MHz full-power bandwidth (BW-3dB), allowing accurate digitization of analog inputs up to 140MHz while maintaining 73.4dB SNR and 90dB SFDR. This makes it suitable for undersampling IF signals in communications receivers without requiring external anti-alias filtering beyond the Nyquist limit of 12.5MHz.
Does the LTC2170IUKG-14#PBF require an external reference voltage?
No - the LTC2170IUKG-14#PBF includes an internal 1.25V reference with ±25ppm/°C drift and 1.225V to 1.275V tolerance. An external reference can be applied via the SENSE pin (Pin 50) to set custom input ranges, but the internal reference is fully functional and eliminates the need for external components in most designs.
How does the LTC2170IUKG-14#PBF handle simultaneous sampling across four channels?
The LTC2170IUKG-14#PBF integrates four independent sample-and-hold circuits and ADC cores sharing a common clock domain, ensuring true simultaneous sampling with sub-picosecond inter-channel skew. This architecture preserves phase coherence essential for beamforming, ultrasound imaging, and MIMO signal processing - confirmed by measured crosstalk of –90dBc (near-channel) and –105dBc (far-channel).
What LVDS serialization modes does the LTC2170IUKG-14#PBF support?
The LTC2170IUKG-14#PBF supports both 1-lane (1-bit per channel per clock edge) and 2-lane (2-bit per channel per clock edge) LVDS serialization, selectable via the PAR/SER pin (Pin 47) and CS pin (Pin 19). Output drive strength (1.75mA or 3.5mA) and internal 100Ω termination are configurable through SCK (Pin 20) and SDO (Pin 46), enabling robust signal integrity across varied PCB trace lengths.
Is the LTC2170IUKG-14#PBF pin-compatible with other members of the LTC217x-14 family?
Yes - the LTC2170IUKG-14#PBF shares identical pinout, package (QFN-52), and footprint with the LTC2171IUKG-14#PBF (40Msps) and LTC2172IUKG-14#PBF (65Msps). This enables hardware scalability: a single PCB layout can support all three speed grades, with only clock and firmware changes needed to upgrade sampling rate.
LTC2170IUKG-14#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 52-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 25M
- Number of Inputs:
- 4
- Input Type:
- Differential
- Data Interface:
- LVDS - Serial
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 4
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 52-QFN (7x8)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2170IUKG-14#PBF FAQ
1.How can I place an order for LTC2170IUKG-14#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2170IUKG-14#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2170IUKG-14#PBF reliable?
The price and inventory of LTC2170IUKG-14#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2170IUKG-14#PBF is usually 5 days.
3.What payment methods are accepted for LTC2170IUKG-14#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2170IUKG-14#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2170IUKG-14#PBF?
LTC2170IUKG-14#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2170IUKG-14#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2170IUKG-14#PBF?
For technical support, including LTC2170IUKG-14#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2170IUKG-14#PBF requirements.
6.How does Aetrix verify that LTC2170IUKG-14#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2170IUKG-14#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2170IUKG-14#PBF meets industry standards.
7.What is the process for return or replacement of LTC2170IUKG-14#PBF?
All LTC2170IUKG-14#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2170IUKG-14#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2170IUKG-14#PBF part is unused and in its original packaging.
Return procedure for LTC2170IUKG-14#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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