Analog Devices Inc. LTC2172IUKG-14#PBF

Overview

LTC2172IUKG-14#PBF from Analog Devices (acquired Linear Technology) is a 14-bit, 65Msps quad simultaneous-sampling analog-to-digital converter optimized for high-dynamic-range signal digitization in communications systems. It delivers 73.7dB SNR, 90dB SFDR, and 0.15psRMS jitter at full speed, with 800MHz full-power bandwidth and single 1.8V supply operation - enabling undersampling of IF signals in cellular base stations and SDRs.

For engineers reviewing the LTC2172IUKG-14#PBF datasheet, LTC2172IUKG-14#PBF pinout, LTC2172IUKG-14#PBF application, or LTC2172IUKG-14#PBF equivalent, key selection criteria include guaranteed ±1LSB INL over –40°C to +85°C, serial LVDS output configurability (1-/2-lane), differential input range selection (1–2VP-P), and integrated clock duty cycle stabilization for robust timing integrity across wide input duty cycles.

Technical Context

The LTC2172IUKG-14#PBF implements four independent 14-bit ADC cores with shared sample-and-hold and internal reference, supporting true simultaneous sampling across all channels. Its architecture includes an on-chip PLL-free encode path with ultralow aperture jitter (0.15psRMS), enabling high-fidelity undersampling of RF/IF signals up to 140MHz without external jitter-cleaning circuitry.

Digital interface flexibility is provided via serial LVDS outputs with selectable 1-bit or 2-bit serialization per channel, configurable output current (1.75mA/3.5mA), and optional internal 100Ω termination. Configuration is managed through either SPI port (serial mode) or parallel logic inputs (parallel mode), with dedicated pins for VCM bias generation (VCM12/VCM34) and external reference programming (SENSE).

Key Specifications

Pinout & Package

52-pin (7mm × 8mm) plastic QFN package with exposed thermal pad (Pin 53 = GND). Requires soldering of exposed pad to PCB ground plane for thermal and electrical performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad 14-bit ADC applications.

Compared with AD9257BSTZ-65, LTC2172IUKG-14#PBF offers simpler LVDS interfacing and lower power but lacks JESD204B; compared with LTC2171IUKG-14#PBF, it provides 65Msps headroom for future bandwidth scaling while sharing footprint and configuration compatibility.

Availability

LTC2172IUKG-14#PBF is available at Aetrix Electronics and suitable for cellular infrastructure, software-defined radio, portable medical imaging, multichannel data acquisition, and nondestructive testing requiring stable component supply and industrial temperature grade (–40°C to +85°C).

Supply support for LTC2172IUKG-14#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.

The LTC2172IUKG-14#PBF belongs to ADI's high-speed precision ADC product line, engineered specifically for demanding communications and instrumentation applications requiring simultaneous multi-channel sampling, ultra-low jitter, and flexible digital interfacing.

FAQ

What is the operating temperature range for the LTC2172IUKG-14#PBF?

The LTC2172IUKG-14#PBF is rated for industrial temperature operation from –40°C to +85°C, as confirmed by its "I" grade designation and Absolute Maximum Ratings table. This range is validated across all specified AC and DC performance parameters including SNR, SFDR, INL, and DNL, making it suitable for outdoor base stations and field-deployable test equipment where ambient conditions vary widely.

Does the LTC2172IUKG-14#PBF support external reference operation?

Yes, the LTC2172IUKG-14#PBF supports external reference operation via the SENSE pin. Applying a voltage between 0.625V and 1.3V to SENSE configures the input range to ±0.8 × VSENSE, enabling precise scaling for custom reference sources. The device also specifies ±0.2% gain matching and ±3mV offset matching across all four channels under external reference mode, ensuring channel-to-channel consistency in multichannel systems.

How many LVDS data lanes does the LTC2172IUKG-14#PBF support per channel?

The LTC2172IUKG-14#PBF supports two LVDS serialization modes per channel: 1-lane (1-bit per clock cycle) and 2-lane (2-bits per clock cycle), selected via the CS pin in parallel programming mode. In 2-lane mode at 65Msps, each channel outputs two bits simultaneously on complementary pairs (e.g., OUT1A+/– and OUT1B+/–), reducing required clock frequency and easing timing closure in FPGA designs.

What is the purpose of the VCM12 and VCM34 pins on the LTC2172IUKG-14#PBF?

The VCM12 and VCM34 pins on the LTC2172IUKG-14#PBF provide internally generated common-mode bias voltages (~VDD/2) for differential analog inputs. VCM12 biases channels 1 and 2; VCM34 biases channels 3 and 4. Each must be bypassed to ground with a 0.1µF ceramic capacitor to maintain low-noise operation and ensure proper ADC core functionality - omission degrades SNR and increases harmonic distortion.

Can the LTC2172IUKG-14#PBF operate with a single-ended encode clock?

Yes, the LTC2172IUKG-14#PBF supports single-ended encode clock operation by tying ENC– to ground and driving ENC+ with TTL, CMOS, or PECL logic. The datasheet specifies VIH = 1.2V and VIL = 0.6V at VDD = 1.8V for this mode, and confirms full AC performance (73.7dB SNR, 90dB SFDR) is maintained. Internal termination and input capacitance (3.5pF) are optimized for clean edge transitions in both differential and single-ended configurations.