Analog Devices Inc. LTC2173CUKG-14#TRPBF
- Part No.:
- LTC2173CUKG-14#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 52-WFQFN Exposed Pad
- Datasheet:
-
LTC2173CUKG-14#TRPBF.pdf
- Description:
- IC ADC 14BIT PIPELINED 52QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2173CUKG-14#TRPBF from Analog Devices (formerly Linear Technology) is a 14-bit, 80Msps quad-channel simultaneous-sampling analog-to-digital converter optimized for high-dynamic-range signal digitization in communications and instrumentation systems. It delivers 72.9dB SNR at 70MHz input, 88dB SFDR, ultralow 0.15psRMS jitter, ±1LSB INL (typ), and operates from a single 1.8V supply with serial LVDS outputs in 1- or 2-lane mode.
For engineers reviewing the LTC2173CUKG-14#TRPBF datasheet, LTC2173CUKG-14#TRPBF pinout, LTC2173CUKG-14#TRPBF application, or LTC2173CUKG-14#TRPBF equivalent, this page provides verified technical context, package mapping, real-world use cases, and validated alternative options for multichannel IF/RF sampling designs requiring low power and high AC performance.
Technical Context
The LTC2173CUKG-14#TRPBF implements four independent 14-bit ADC cores with shared sample-and-hold (800MHz full-power bandwidth) and integrated clock duty cycle stabilizer. Its serial LVDS interface supports configurable 1-bit or 2-bit per channel output serialization, selectable internal/external reference, and programmable input range (1–2VP-P).
It features dedicated differential analog inputs per channel (AIN1± to AIN4±), dual common-mode bias outputs (VCM12, VCM34), and flexible encode input support (differential or single-ended ENC+/ENC–). Power management includes Nap (85mW) and Shutdown (1mW) modes, with total dissipation of 376mW at 80Msps in 2-lane, 1.75mA LVDS mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit with no missing codes over temperature - guarantees monotonicity and full code coverage in precision measurement. |
| Sampling Rate | 80Msps maximum - enables baseband and IF sampling up to ~40MHz Nyquist, suitable for wideband receivers. |
| SNR @ 70MHz | 72.9dBFS (typ) - ensures high-fidelity digitization of demanding RF/IF signals with minimal quantization noise. |
| SFDR @ 70MHz | 88dBFS (2nd/3rd harmonic) - suppresses spurious content critical for spectral purity in SDR and cellular infrastructure. |
| Jitter (tJITTER) | 0.15psRMS - enables undersampling of high-frequency IFs (e.g., 70–140MHz) without significant aperture uncertainty degradation. |
| Power Dissipation | 376mW total at 80Msps (2-lane, 1.75mA) - reduces thermal load and simplifies PCB cooling in dense multichannel systems. |
| Analog Supply | Single 1.8V (VDD), ±0.1V tolerance - compatible with modern low-voltage FPGA/ASIC I/O domains and simplifies power rail design. |
Pinout & Package
52-pin (7mm × 8mm) plastic QFN package with exposed pad (Pin 53 = GND). Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN1+ / AIN1– AIN2+ / AIN2– AIN3+ / AIN3– AIN4+ / AIN4– |
Differential analog inputs (Ch 1–4) | Accept 1–2VP-P differential signals; require matched routing and termination to preserve CMRR (>80dB) and SFDR. |
| VCM12 / VCM34 | Common-mode bias outputs | Provide VDD/2 reference (±25mV) to bias AIN pairs; must be bypassed with 0.1µF ceramic capacitors to GND. |
| REFH / REFL | ADC reference voltage terminals | Support internal or external reference; require 2.2µF + 0.1µF decoupling between pins and to GND for stable conversion accuracy. |
| ENC+ / ENC– | Differential encode clock inputs | Trigger sampling on rising/falling edges; accept PECL/LVDS/TTL/CMOS; internal duty cycle stabilizer enables robust timing at full speed. |
| OUT1A± / OUT1B± OUT2A± / OUT2B± OUT3A± / OUT3B± OUT4A± / OUT4B± |
LVDS serialized data outputs | 2-lane mode: two bits per channel per clock edge; 1-lane mode: one bit per channel; configurable 1.75mA/3.5mA drive strength. |
| DCO± / FR± | Data clock and frame clock outputs | DCO aligns with serialized data edges; FR marks start of new sample frame; both are LVDS and phase-locked to ENC. |
| PAR/SER | Programming mode select | Ground = serial SPI interface (CS/SCK/SDI/SDO); VDD = parallel control (CS/SCK/SDI/SDO as logic inputs for basic configuration). |
| VDD / OVDD / GND / OGND | Analog/digital power and grounds | VDD (pins 15,16,51,52) and OVDD (pin 34) require individual 0.1µF ceramic bypassing; OGND (pin 33) must connect to ground plane via low-inductance path. |
Key Features
| Feature | Design Value |
|---|---|
| Quad simultaneous sampling | Enables coherent multichannel acquisition for beamforming, MIMO, and time-of-flight measurements without inter-channel skew. |
| Ultralow 0.15psRMS jitter | Preserves SNR when undersampling IF frequencies up to 140MHz, eliminating need for ultra-low-jitter external clocks. |
| Configurable LVDS serialization | Reduces PCB trace count by 50% vs parallel interfaces - 2-lane mode uses 8 differential pairs (vs 56 for 14-bit × 4 channels parallel). |
| Selectable input range (1–2VP-P) | Optimizes dynamic range utilization across varying signal amplitudes without external gain stages or attenuators. |
| Internal clock duty cycle stabilizer | Allows use of asymmetric clock sources (e.g., FPGA PLL outputs) while maintaining full AC performance at 80Msps. |
| Nap mode (85mW) & Shutdown (1mW) | Supports dynamic power scaling in battery-powered or thermally constrained portable medical and test equipment. |
Applications
| Cellular Base Stations | Software Defined Radios |
|---|---|
|
Use Scenario: Digitizing multiple 20–40MHz LTE/5G IF bands in macrocell remote radio heads. IC Role / Device Role / Timing Role: Quad-channel simultaneous ADC capturing synchronized I/Q streams for digital predistortion and MIMO processing. Use Value: 88dB SFDR prevents adjacent-channel interference; 72.9dB SNR ensures EVM compliance below 1.5% at 256-QAM. |
Use Scenario: Real-time spectrum analysis and adaptive waveform reception in field-deployable SDR platforms. IC Role / Device Role / Timing Role: High-fidelity front-end digitizer enabling wide instantaneous bandwidth capture (up to 80MHz) with phase-coherent channel pairing. Use Value: Simultaneous sampling eliminates channel-to-channel timing skew; LVDS serialization eases FPGA interface routing density. |
| Portable Medical Imaging | Multichannel Data Acquisition |
|
Use Scenario: Ultrasound beamformer front-end acquiring echo return signals from 16–64 transducer elements. IC Role / Device Role / Timing Role: Low-noise, low-power ADC converting analog RF echoes into digital samples for beam synthesis and Doppler processing. Use Value: 0.15psRMS jitter preserves axial resolution; 376mW total power enables battery operation in handheld scanners. |
Use Scenario: High-precision vibration monitoring and structural health testing using synchronized sensor arrays. IC Role / Device Role / Timing Role: Simultaneous digitization of accelerometer, strain gauge, and acoustic emission signals across four physical locations. Use Value: ±1LSB INL ensures accurate amplitude calibration; 800MHz S/H bandwidth supports transient capture up to 100kHz harmonics. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-channel, 14-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9257BCPZ-80 | 80Msps, 14-bit, quad, JESD204B output (not LVDS); higher power (520mW); requires external clock buffer. | Better suited for FPGA-based systems with JESD204B receivers; less ideal for legacy LVDS-FPGA or ASIC interfaces. | Choose AD9257BCPZ-80 when migrating to high-speed serial interfaces and FPGA resources support JESD204B lane alignment. |
| LTC2174CUKG-14#TRPBF | 105Msps sampling rate, identical pinout/package, same 14-bit resolution and LVDS interface; 450mW power at full speed. | Direct drop-in upgrade for systems requiring higher Nyquist bandwidth (≤52.5MHz) without layout change. | Choose LTC2174CUKG-14#TRPBF when system clock allows >80Msps and higher IF bandwidth is needed - no PCB redesign required. |
Compared with LTC2173CUKG-14#TRPBF, the LTC2174CUKG-14#TRPBF offers +25Msps headroom with identical footprint and interface, while the AD9257BCPZ-80 trades LVDS simplicity for JESD204B scalability at higher power and integration complexity.
Availability
LTC2173CUKG-14#TRPBF is available at Aetrix Electronics and suitable for cellular infrastructure, portable medical imaging, software-defined radio, and multichannel test equipment requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across production lots.
Supply support for LTC2173CUKG-14#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving aerospace, communications, industrial, and healthcare markets.
The LTC2173CUKG-14#TRPBF belongs to ADI's high-speed precision ADC product line, designed specifically for demanding communications and instrumentation applications requiring simultaneous multichannel sampling, low jitter, and low power in compact QFN packages.
FAQ
What is the maximum sampling rate supported by the LTC2173CUKG-14#TRPBF?
The LTC2173CUKG-14#TRPBF supports a maximum sampling rate of 80Msps, as specified in its speed grade designation. This rate is guaranteed across the full operating temperature range (0°C to 70°C) and applies to all four channels operating simultaneously with no performance degradation. At this rate, the device achieves 72.9dB SNR and 88dB SFDR at 70MHz input frequency, making it suitable for wideband IF sampling in communications systems.
Does the LTC2173CUKG-14#TRPBF support both internal and external voltage references?
Yes, the LTC2173CUKG-14#TRPBF supports both internal and external reference configurations via the SENSE pin. Connecting SENSE to VDD selects the internal reference with ±1V input range; grounding SENSE selects ±0.5V range; applying 0.625V–1.3V to SENSE sets an input range of ±0.8×VSENSE. The internal reference provides 1.25V ±25mV with ±25ppm/°C drift, and external reference mode maintains 1.2LSBRMS transition noise and ±1LSB INL.
How many differential LVDS data lanes does the LTC2173CUKG-14#TRPBF use in default configuration?
The LTC2173CUKG-14#TRPBF defaults to 2-lane LVDS mode, outputting two serialized bits per channel per clock edge - resulting in eight differential LVDS pairs (OUT1A±/OUT1B± through OUT4A±/OUT4B±). This mode supports 14-bit resolution with tSER = 1/(7•fS) at 80Msps. The 1-lane mode (one bit per channel) is enabled via PAR/SER = VDD and CS logic, reducing lane count to four differential pairs but doubling serialization latency.
What is the purpose of the VCM12 and VCM34 pins on the LTC2173CUKG-14#TRPBF?
VCM12 and VCM34 are dedicated common-mode bias outputs that each provide a nominally VDD/2 voltage (1.8V supply → ~0.9V) to set the common-mode level for two differential analog input pairs. VCM12 biases AIN1± and AIN2±; VCM34 biases AIN3± and AIN4±. Each must be bypassed to ground with a 0.1µF ceramic capacitor to maintain >80dB CMRR and prevent gain/offset errors caused by noise coupling into the analog input paths.
Can the LTC2173CUKG-14#TRPBF operate with a single-ended encode clock input?
Yes, the LTC2173CUKG-14#TRPBF supports single-ended encode clock operation by tying ENC– to GND and driving ENC+ with a 1.8V square wave or sine wave. In this mode, conversion triggers on the rising edge of ENC+, and the internal duty cycle stabilizer remains active to ensure optimal timing margin. Input specifications include VIH = 1.2V (min) and VIL = 0.6V (max) at VDD = 1.8V, with 3.5pF input capacitance and 30kΩ input resistance.
LTC2173CUKG-14#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 52-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 80M
- Number of Inputs:
- 4
- Input Type:
- Differential
- Data Interface:
- LVDS - Serial
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 4
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 52-QFN (7x8)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2173CUKG-14#TRPBF FAQ
1.How can I place an order for LTC2173CUKG-14#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2173CUKG-14#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2173CUKG-14#TRPBF reliable?
The price and inventory of LTC2173CUKG-14#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2173CUKG-14#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC2173CUKG-14#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2173CUKG-14#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2173CUKG-14#TRPBF?
LTC2173CUKG-14#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2173CUKG-14#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2173CUKG-14#TRPBF?
For technical support, including LTC2173CUKG-14#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2173CUKG-14#TRPBF requirements.
6.How does Aetrix verify that LTC2173CUKG-14#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC2173CUKG-14#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2173CUKG-14#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC2173CUKG-14#TRPBF?
All LTC2173CUKG-14#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2173CUKG-14#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2173CUKG-14#TRPBF part is unused and in its original packaging.
Return procedure for LTC2173CUKG-14#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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