Analog Devices Inc. LTC2173IUKG-12#PBF

Overview

LTC2173IUKG-12#PBF from Analog Devices (formerly Linear Technology) is a 12-bit, 4-channel simultaneous-sampling analog-to-digital converter optimized for high-frequency signal digitization in communications infrastructure. It delivers 70.6dB SNR, 88dB SFDR, and ultralow 0.15ps_RMS aperture jitter at 80Msps sampling rate, with full-power bandwidth of 800MHz and single 1.8V supply operation - enabling direct IF sampling in cellular base stations and software-defined radios.

For engineers reviewing the LTC2173IUKG-12#PBF datasheet, LTC2173IUKG-12#PBF pinout, LTC2173IUKG-12#PBF application, or LTC2173IUKG-12#PBF equivalent, this quad ADC supports serial LVDS outputs (1- or 2-lane), configurable input ranges (1–2V_P-P), internal/external reference modes, and SPI-based configuration - critical for multichannel data acquisition and portable medical imaging systems requiring low power and high dynamic range.

Technical Context

The LTC2173IUKG-12#PBF implements four independent 12-bit ADC cores with shared sample-and-hold circuitry and a duty-cycle-stabilized encode interface supporting differential or single-ended clocking. Its architecture enables true simultaneous sampling across all channels with guaranteed no missing codes over –40°C to +85°C.

It uses serial LVDS output serialization (12-/14-/16-bit per channel) with programmable output current (1.75mA or 3.5mA) and optional on-chip 100Ω termination. The device integrates internal voltage references (VREF = 1.25V ±25ppm/°C, VCM = VDD/2 ±25mV), gain/offset matching (±0.2%FS gain, ±3mV offset), and low-latency pipeline timing (6 cycles).

Key Specifications

Pinout & Package

52-pin (7mm × 8mm) plastic QFN package with exposed thermal pad (Pin 53 = GND). Requires soldering of exposed pad to PCB ground plane for thermal and electrical performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad ADC applications.

Compared with LTC2174IUKG-12#PBF and AD9634BCPZ-80, the LTC2173IUKG-12#PBF offers optimal balance of ultra-low jitter (0.15ps_RMS), high SFDR (88dB), and lowest power (369mW) at 80Msps - making it ideal for thermally constrained, phase-coherent multichannel systems where timing accuracy is non-negotiable.

Availability

LTC2173IUKG-12#PBF is available at Aetrix Electronics and suitable for cellular base stations, portable medical imaging, and multichannel data acquisition requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for LTC2173IUKG-12#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.

The LTC2173IUKG-12#PBF belongs to the LTC217x family of low-power, high-speed quad ADCs designed specifically for demanding communications and instrumentation applications requiring simultaneous sampling, low jitter, and excellent AC performance.

FAQ

What is the maximum sampling rate supported by the LTC2173IUKG-12#PBF?

The LTC2173IUKG-12#PBF supports a maximum sampling rate of 80Msps. This is its designated speed grade within the LTC217x family - lower than the LTC2174-12 (105Msps) and LTC2175-12 (125Msps), but optimized for lower power consumption (369mW total) and thermal efficiency in space-constrained applications. The part maintains full 12-bit performance, 70.6dB SNR, and 88dB SFDR at this rate.

Does the LTC2173IUKG-12#PBF require an external reference voltage?

No, the LTC2173IUKG-12#PBF includes an internal 1.25V reference (VREF) with ±25ppm/°C temperature drift and 1.225V to 1.275V initial accuracy, sufficient for most applications. However, it also supports external reference mode via the SENSE pin (Pin 48), accepting 0.625V to 1.3V for improved accuracy or system-level reference synchronization. The internal VCM generator (VCM12/VCM34) further eliminates need for external bias networks.

How many LVDS data lanes does the LTC2173IUKG-12#PBF support per channel?

The LTC2173IUKG-12#PBF supports two LVDS output configurations per channel: 1-lane mode (1 bit per clock edge) and 2-lane mode (2 bits per clock edge), selected via the CS pin in parallel programming mode or SPI register in serial mode. In 2-lane mode at 80Msps, each channel outputs serialized 12/14/16-bit words across two differential pairs (e.g., OUT1A+/– and OUT1B+/–), reducing FPGA I/O count versus parallel interfaces.

What is the operating temperature range for the LTC2173IUKG-12#PBF?

The LTC2173IUKG-12#PBF is rated for industrial temperature operation from –40°C to +85°C, indicated by the "I" suffix in the part number. This is confirmed in the Absolute Maximum Ratings table and applies to all DC and AC specifications including ±0.3LSB INL, 70.6dB SNR, and 0.15ps_RMS jitter. The device uses the same 52-pin QFN package as commercial-grade variants but is tested and characterized across the extended range.

Can the LTC2173IUKG-12#PBF be used with single-ended clock inputs?

Yes, the LTC2173IUKG-12#PBF supports single-ended encode clock operation: tie ENC– (Pin 18) to GND and drive ENC+ (Pin 17) with a 1.8V square wave or sine wave. Input thresholds are VIH = 1.2V and VIL = 0.6V at VDD = 1.8V. While differential mode delivers best jitter performance (0.15ps_RMS), single-ended operation is fully functional and specified - though aperture jitter may increase slightly depending on signal integrity and noise coupling.