Analog Devices Inc. LTC2184IUP#PBF

Overview

LTC2184IUP#PBF from Analog Devices (formerly Linear Technology) is a 16-bit, 105Msps dual-channel simultaneous-sampling analog-to-digital converter with 76.7dB SNR, 90dB SFDR, and 550MHz full-power bandwidth. It operates from a single 1.8V supply, supports CMOS/DDR CMOS/DDR LVDS outputs, and targets high-fidelity signal digitization in cellular base stations and portable medical imaging systems.

For engineers reviewing the LTC2184IUP#PBF datasheet, LTC2184IUP#PBF pinout, LTC2184IUP#PBF application, or LTC2184IUP#PBF equivalent, key selection criteria include its guaranteed ±2LSB INL over –40°C to +85°C, differential encode jitter of 0.09psRMS, and configurable input range (1VP-P to 2VP-P) for RF and ultrasound front-ends.

Technical Context

The LTC2184IUP#PBF implements two independent 16-bit SAR ADC cores with shared sample-and-hold and internal reference, enabling true simultaneous sampling critical for I/Q demodulation and phase-coherent multi-channel acquisition. Its ultralow aperture jitter (0.09psRMS differential encode) preserves SNR when undersampling IF signals up to 140MHz.

Digital interface flexibility includes full-rate CMOS, DDR CMOS, or DDR LVDS output modes, with separate OVDD supply (1.2V–1.8V for CMOS, 1.7V–1.9V for LVDS) and SPI configuration port. Clock duty cycle stabilization and data randomization are programmable via serial interface to suppress spectral artifacts.

Key Specifications

Pinout & Package

64-lead (9mm × 9mm) plastic QFN package with exposed thermal pad (Pin 65 = GND), requiring soldering to PCB for thermal and electrical integrity. Pin functions vary by digital output mode (CMOS/LVDS); below is the universal pin mapping valid across all configurations.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel, 16-bit, high-speed ADC applications.

Compared with AD9653BCPZ-105, the LTC2184IUP#PBF offers integrated reference and lower power but lacks JESD204B; compared with LTC2264IUP#PBF, it delivers higher speed, wider bandwidth, and enhanced clock robustness at modest power increase.

Availability

LTC2184IUP#PBF is available at Aetrix Electronics and suitable for cellular infrastructure, portable medical imaging, and software-defined radio applications requiring stable component supply, long-term lifecycle support, and guaranteed industrial temperature operation (–40°C to +85°C).

Supply support for LTC2184IUP#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving communications, industrial, automotive, and healthcare markets.

The LTC2184 belongs to ADI's high-speed precision ADC product line, designed specifically for demanding communications and instrumentation applications requiring simultaneous sampling, low jitter, and wide dynamic range at 16-bit resolution.

FAQ

What is the operating temperature range for the LTC2184IUP#PBF?

The LTC2184IUP#PBF is rated for industrial temperature operation from –40°C to +85°C, as indicated by the "I" grade suffix. This range is validated across all key specifications including SNR, SFDR, INL, and power consumption, making it suitable for base station outdoor units and portable medical devices deployed in variable environments. The LTC2184IUP#PBF maintains ±2LSB INL and 76.7dB SNR across this full range.

Does the LTC2184IUP#PBF support differential analog inputs?

Yes, the LTC2184IUP#PBF supports fully differential analog inputs on both channels (AIN1+/AIN1– and AIN2+/AIN2–), with selectable common-mode bias via internal VCM outputs (Pins 2 and 15). It accepts input ranges from 1VP-P to 2VP-P differential, and the datasheet specifies performance metrics-including 76.7dB SNR and ±2LSB INL-under differential drive conditions at 105Msps, confirming its suitability for balanced RF and ultrasound front-ends.

What digital output interfaces does the LTC2184IUP#PBF support?

The LTC2184IUP#PBF supports three digital output modes: full-rate CMOS, double-data-rate (DDR) CMOS, and DDR LVDS. Output voltage levels are configurable via OVDD (1.2V–1.8V for CMOS, 1.7V–1.9V for LVDS), and the mode is selected via SPI register or parallel pins depending on PAR/SER state. All modes provide 16-bit parallel data per channel, with LVDS offering superior noise immunity for longer trace runs in dense PCB layouts.

How is the LTC2184IUP#PBF configured for operation?

The LTC2184IUP#PBF is configured via a 4-wire SPI interface (CS, SCK, SDI, SDO) when PAR/SER (Pin 11) is grounded, enabling full control of output mode, randomizer, duty cycle stabilizer, and power modes. When PAR/SER is tied to VDD, it enters parallel programming mode with simplified logic-level control of core functions. Configuration registers retain settings through power cycles only if external EEPROM or FPGA initialization code is implemented.

What is the aperture jitter specification for the LTC2184IUP#PBF?

The LTC2184IUP#PBF has an aperture jitter of 0.09psRMS under differential encode conditions (ENC+/ENC–), as specified in the Dynamic Accuracy section of the datasheet. This ultralow jitter enables high-fidelity undersampling of IF frequencies up to 140MHz while maintaining 76.7dB SNR - a critical parameter for receiver sensitivity in cellular and SDR applications. Single-ended encode yields 0.07psRMS jitter.