Analog Devices Inc. LTC2185IUP#TRPBF

Overview

LTC2185IUP#TRPBF from Analog Devices (formerly Linear Technology) is a 16-bit, dual-channel, simultaneous-sampling analog-to-digital converter with 125Msps sampling rate, 76.8dB SNR, and 90dB SFDR. It operates from a single 1.8V supply, supports CMOS/DDR-CMOS/DDR-LVDS outputs, and targets high-fidelity IF digitization in software-defined radios and portable medical imaging systems.

For engineers reviewing the LTC2185IUP#TRPBF datasheet, LTC2185IUP#TRPBF pinout, LTC2185IUP#TRPBF application, or LTC2185IUP#TRPBF equivalent, key selection criteria include guaranteed ±2LSB INL over –40°C to 85°C, 550MHz full-power bandwidth, ultralow 0.07psRMS aperture jitter, and configurable input range (1VP-P to 2VP-P) for RF and ultrasound front-ends.

Technical Context

The LTC2185IUP#TRPBF implements two independent 16-bit ADC cores with shared sample-and-hold and clock circuitry, enabling true simultaneous sampling critical for I/Q demodulation and phase-coherent multi-channel acquisition. Its architecture includes an on-chip clock duty cycle stabilizer and optional data output randomizer to suppress deterministic noise in undersampling applications.

It supports three digital output modes-full-rate CMOS, DDR-CMOS, and DDR-LVDS-with separate OVDD supply (1.2V–1.8V for CMOS; 1.7V–1.9V for LVDS) and programmable via SPI interface. Input common-mode voltage is internally set to VDD/2 (VCM1/VCM2 pins), and analog inputs accept differential sine, PECL, LVDS, TTL, or CMOS encode signals.

Key Specifications

Pinout & Package

64-lead (9mm × 9mm) plastic QFN package with exposed thermal pad (Pin 65 = GND). Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel, high-speed ADC applications.

Compared with AD9680BCPZ-125 and ADS52J90IRGCT, the LTC2185IUP#TRPBF offers superior SNR (76.8dB vs. ≤75.5dB), integrated VCM/reference generation, and flexible parallel output options - making it optimal for legacy FPGA or ASIC interfaces where JESD204B is unavailable or undesirable.

Availability

LTC2185IUP#TRPBF is available at Aetrix Electronics and suitable for cellular infrastructure, portable medical imaging, and multi-channel test equipment requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LTC2185IUP#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving communications, industrial, automotive, and healthcare markets.

The LTC2185IUP#TRPBF belongs to ADI's high-speed precision ADC product line, designed specifically for demanding RF and instrumentation applications requiring simultaneous sampling, low jitter, and wide analog bandwidth without sacrificing DC accuracy.

FAQ

What is the operating temperature range for the LTC2185IUP#TRPBF?

The LTC2185IUP#TRPBF is rated for operation from –40°C to +85°C (Industrial grade). This is confirmed by the "I" suffix in the part number and specified in the Absolute Maximum Ratings table. The device maintains full AC/DC performance specs-including ±2LSB INL and 76.8dB SNR-across this entire range, making it suitable for outdoor base stations and field-deployable medical devices.

Does the LTC2185IUP#TRPBF support single-ended analog inputs?

No, the LTC2185IUP#TRPBF requires differential analog inputs (AIN1+/AIN1– and AIN2+/AIN2–) for specified performance. While the encode clock (ENC+/ENC–) supports single-ended mode (by tying ENC– to GND), the analog inputs must be driven differentially to achieve 76.8dB SNR, 90dB SFDR, and 550MHz bandwidth. Single-ended analog drive degrades CMRR and increases distortion beyond datasheet limits.

What output interface options does the LTC2185IUP#TRPBF support?

The LTC2185IUP#TRPBF supports three parallel output modes: full-rate CMOS, double-data-rate (DDR) CMOS, and DDR LVDS. Output type is selected via SPI register or PAR/SER pin configuration. CMOS modes use OVDD = 1.2V–1.8V; LVDS mode requires OVDD = 1.7V–1.9V and enables on-chip 100Ω termination. All modes provide independent D1 and D2 buses for each channel.

How is the input common-mode voltage generated for the LTC2185IUP#TRPBF?

The LTC2185IUP#TRPBF generates internal common-mode bias voltages at VCM1 (Pin 2) and VCM2 (Pin 15), each nominally equal to VDD/2 (e.g., ~0.9V at 1.8V supply). These pins must be bypassed to GND with 0.1µF ceramic capacitors and used to bias the differential analog inputs. No external common-mode source is required, simplifying front-end design versus ADCs needing external VCM.

Can the LTC2185IUP#TRPBF operate with a 1.2V OVDD supply?

Yes - the LTC2185IUP#TRPBF supports OVDD = 1.2V exclusively in CMOS output modes (full-rate or DDR-CMOS). At 1.2V OVDD, CMOS outputs deliver VOH ≥1.185V and VOL ≤0.010V into 500µA load, compatible with 1.2V logic families. LVDS mode requires OVDD ≥1.7V and is incompatible with 1.2V operation.