Analog Devices Inc. LTC2190IUKG#PBF
- Part No.:
- LTC2190IUKG#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 52-WFQFN Exposed Pad
- Datasheet:
-
LTC2190IUKG#PBF.pdf
- Description:
- IC ADC 16BIT PIPELINED 52QFN
- Quantity:
- Payment:

- Shipping:

Inventory:134
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Product details
Overview
LTC2190IUKG#PBF from Analog Devices (formerly Linear Technology) is a 16-bit, dual-channel, simultaneous-sampling analog-to-digital converter optimized for high-dynamic-range signal digitization at 25Msps. It delivers 77dB SNR, 90dB SFDR, and ultralow 0.07psRMS jitter-enabling undersampling of IF signals in communications infrastructure. Its serial LVDS outputs, single 1.8V supply, and –40°C to +85°C industrial temperature grade make it suitable for portable medical imaging and multi-channel data acquisition systems.
For engineers reviewing the LTC2190IUKG#PBF datasheet, LTC2190IUKG#PBF pinout, LTC2190IUKG#PBF application, or LTC2190IUKG#PBF equivalent, key selection criteria include its 25Msps sampling rate, 550MHz full-power bandwidth, ±2LSB INL, 1.8V single-supply operation, and 52-pin QFN package with exposed thermal pad.
Technical Context
The LTC2190IUKG#PBF implements two independent 16-bit ADC cores with simultaneous sampling and a shared internal clock duty cycle stabilizer-ensuring consistent performance across wide input clock duty cycles. Its sample-and-hold stage supports up to 550MHz full-power bandwidth and achieves 3.2LSBRMS transition noise.
Digital interface uses configurable serial LVDS output modes (1/2/4-lane per channel), with programmable output current (1.75mA or 3.5mA) and optional on-chip 100Ω termination. Configuration is handled via SPI-compatible serial port or parallel logic inputs, supporting shutdown and nap modes for power management.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with no missing codes over temperature-guarantees monotonicity and full code coverage in precision measurement. |
| Sampling Rate | 25Msps maximum-optimized for medium-bandwidth applications like portable ultrasound and NDT equipment. |
| SNR / SFDR | 77dB SNR and 90dB SFDR at 70MHz input-enables high-fidelity digitization of narrowband RF/IF signals. |
| Power Dissipation | 104mW total at 25Msps (52mW per channel)-reduces thermal load in dense PCB layouts and battery-powered systems. |
| Analog Input Range | Selectable 1VP-P to 2VP-P differential range-supports flexible front-end gain staging with external amplifiers or transformers. |
| Jitter Performance | 0.07psRMS aperture jitter-minimizes sampling uncertainty, critical for undersampling >100MHz IF signals. |
| INL / DNL | ±2LSB INL and ±0.5LSB DNL (typ)-ensures accurate amplitude fidelity in spectral analysis and calibration-critical systems. |
Pinout & Package
52-lead (7mm × 8mm) plastic QFN package with exposed thermal pad (Pin 53 = GND). Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCM1 (1), VCM2 (14) | Common-mode bias outputs | Nominally VDD/2; used to bias differential analog inputs AIN1± and AIN2±-eliminates need for external common-mode generation. |
| AIN1+ (3), AIN1– (4), AIN2+ (11), AIN2– (12) | Differential analog inputs | High-Z, 550MHz full-power bandwidth inputs accepting 1–2VP-P differential signals-designed for transformer or balun coupling. |
| ENC+ (17), ENC– (18) | Encode clock inputs | Accept differential (LVDS/PECL) or single-ended (TTL/CMOS) clocks; internal duty cycle stabilizer enables robust timing at full speed. |
| OUT1A± to OUT1D± (37–44), OUT2A± to OUT2D± (23–30) | Serial LVDS data outputs | Configurable 1/2/4-lane per channel; 100Ω on-chip termination and programmable 1.75/3.5mA drive-reduces external component count and improves signal integrity. |
| FR± (31–32), DCO± (35–36) | Frame and data clock outputs | Synchronous LVDS timing signals aligned to serialized data-simplifies FPGA/CPLD capture logic without external clock recovery. |
| PAR/SER (10), CS (19), SCK (20), SDI (21), SDO (46) | Configuration interface | Supports both serial SPI and parallel mode programming-enables flexible integration into resource-constrained or high-speed control environments. |
Key Features
| Feature | Design Value |
|---|---|
| Simultaneous dual-channel sampling | Ensures precise phase coherence between channels for I/Q demodulation, beamforming, and time-of-flight measurements. |
| Ultralow 0.07psRMS jitter | Enables clean undersampling of IF signals up to 140MHz without significant SNR degradation. |
| Programmable LVDS serialization (1/2/4-lane) | Reduces interface pin count by up to 75% versus parallel output-ideal for space-constrained FPGAs and SoCs. |
| Internal reference with SENSE pin programming | Allows dynamic selection of ±0.5V, ±1V, or ±0.8×VSENSE input ranges-simplifies system-level gain calibration. |
| Industrial temperature range (–40°C to +85°C) | Validated operation across extended thermal environments-suitable for outdoor base stations and industrial DAQ systems. |
Applications
| Portable Medical Ultrasound | Multi-Channel Data Acquisition |
|---|---|
|
Use Scenario: Digitizing echo return signals from phased-array transducers in handheld ultrasound devices. IC Role / Device Role / Timing Role: Dual-channel simultaneous ADC capturing I/Q baseband signals with sub-ns timing alignment. Use Value: 77dB SNR preserves low-amplitude tissue contrast; 25Msps sampling matches typical 5–12MHz transducer bandwidths while minimizing power. |
Use Scenario: High-precision voltage/current monitoring across 8–16 sensor channels in industrial PLCs or test equipment. IC Role / Device Role / Timing Role: Two synchronized 16-bit ADC channels acquiring analog sensor outputs with matched gain/offset. Use Value: ±2LSB INL and ±0.5LSB DNL ensure <0.003% measurement linearity; 104mW total power enables fanless enclosure design. |
| Nondestructive Testing (NDT) | Software-Defined Radio (SDR) Receivers |
|
Use Scenario: Capturing ultrasonic pulse-echo waveforms from composite material inspections. IC Role / Device Role / Timing Role: High-fidelity digitizer for time-domain reflectometry with precise delay measurement capability. Use Value: 550MHz full-power bandwidth captures fast-rise pulses; 3.2LSBRMS transition noise maintains edge resolution in TOF analysis. |
Use Scenario: Direct IF sampling in wideband SDR receivers operating in 70–140MHz bands. IC Role / Device Role / Timing Role: Simultaneous dual ADC core performing quadrature downconversion without analog mixers. Use Value: 90dB SFDR suppresses harmonics and spurs in crowded spectrum; 0.07psRMS jitter prevents aliasing-induced SNR loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, 16-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9269BCPZ-80 | 80Msps sampling rate, 78dB SNR, JESD204B interface, 1.8V/3.3V dual supply | Targets higher-speed SDR and radar; requires FPGA with JESD204B support | Choose when >25Msps throughput or deterministic latency is required; not drop-in compatible. |
| LTC2264IUKG#PBF | 25Msps, 16-bit, single-channel, 76.5dB SNR, 100mW power, same QFN-52 package | Lower channel count reduces system complexity where only one analog path is needed | Choose for cost-sensitive single-channel designs; shares layout compatibility but lacks dual-sampling synchronization. |
Compared with AD9269BCPZ-80 and LTC2264IUKG#PBF, the LTC2190IUKG#PBF uniquely balances dual-channel simultaneity, ultralow jitter, and minimal power at 25Msps-making it optimal for portable, thermally constrained, and phase-coherent measurement systems.
Availability
LTC2190IUKG#PBF is available at Aetrix Electronics and suitable for portable medical imaging, nondestructive testing, and multi-channel data acquisition systems requiring stable component supply, long-term lifecycle support, and guaranteed industrial-grade temperature performance.
Supply support for LTC2190IUKG#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving communications, industrial, automotive, and healthcare markets.
The LTC2190IUKG#PBF belongs to ADI's high-speed precision ADC product line, engineered specifically for demanding communications and instrumentation applications requiring simultaneous sampling, low power, and exceptional dynamic range.
FAQ
What is the maximum sampling rate supported by the LTC2190IUKG#PBF?
The LTC2190IUKG#PBF is rated for a maximum sampling rate of 25Msps. This speed grade is fixed per device variant-LTC2190 corresponds to 25Msps, while LTC2191 and LTC2192 support 40Msps and 65Msps respectively. The 25Msps rating ensures guaranteed AC performance (77dB SNR, 90dB SFDR) and DC specifications (±2LSB INL) across the full –40°C to +85°C temperature range.
Does the LTC2190IUKG#PBF require an external reference voltage?
No, the LTC2190IUKG#PBF includes an internal 1.25V reference (VREF) and supports three input range configurations via the SENSE pin: internal reference with ±0.5V or ±1V range (SENSE = GND or VDD), or external reference scaling (±0.8×VSENSE) when 0.625V ≤ VSENSE ≤ 1.3V. External reference is optional and only needed for custom full-scale definitions beyond these options.
How is synchronization achieved between the two ADC channels in the LTC2190IUKG#PBF?
The LTC2190IUKG#PBF uses a single shared sample-and-hold (S/H) architecture with simultaneous sampling on both channels. Both AIN1± and AIN2± are sampled at the exact same instant upon each rising edge of ENC+, ensuring inherent inter-channel phase matching better than 1ps. This eliminates skew-related errors in I/Q processing and time-of-flight measurements.
Can the LTC2190IUKG#PBF operate with a single 1.8V supply only?
Yes-the LTC2190IUKG#PBF operates from a single 1.8V analog supply (VDD) and a separate 1.8V digital output supply (OVDD); both rails are specified from 1.7V to 1.9V. No additional supplies (e.g., 3.3V or 5V) are required. The internal reference, LVDS drivers, and SPI interface are all designed for 1.8V operation, simplifying power delivery in compact systems.
What LVDS serialization modes does the LTC2190IUKG#PBF support, and how are they configured?
The LTC2190IUKG#PBF supports 1-lane, 2-lane, or 4-lane LVDS serialization per channel, configured via CS and SCK pins in parallel mode or through SPI register writes in serial mode. In 1-lane mode, only OUT1A±/OUT2A± carry all 16 bits sequentially; 4-lane mode splits each 16-bit word across four differential pairs (e.g., OUT1A± to OUT1D±), reducing data rate per lane and easing PCB routing.
LTC2190IUKG#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 52-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 25M
- Number of Inputs:
- 2
- Input Type:
- Differential
- Data Interface:
- LVDS - Serial
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 52-QFN (7x8)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2190IUKG#PBF FAQ
1.How can I place an order for LTC2190IUKG#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2190IUKG#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2190IUKG#PBF reliable?
The price and inventory of LTC2190IUKG#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2190IUKG#PBF is usually 5 days.
3.What payment methods are accepted for LTC2190IUKG#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2190IUKG#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2190IUKG#PBF?
LTC2190IUKG#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2190IUKG#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2190IUKG#PBF?
For technical support, including LTC2190IUKG#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2190IUKG#PBF requirements.
6.How does Aetrix verify that LTC2190IUKG#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2190IUKG#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2190IUKG#PBF meets industry standards.
7.What is the process for return or replacement of LTC2190IUKG#PBF?
All LTC2190IUKG#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2190IUKG#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2190IUKG#PBF part is unused and in its original packaging.
Return procedure for LTC2190IUKG#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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