Analog Devices Inc. LTC2190IUKG#TRPBF
- Part No.:
- LTC2190IUKG#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 52-WFQFN Exposed Pad
- Datasheet:
-
LTC2190IUKG#TRPBF.pdf
- Description:
- IC ADC 16BIT PIPELINED 52QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2190IUKG#TRPBF from Analog Devices (formerly Linear Technology) is a 16-bit, dual-channel, simultaneous-sampling analog-to-digital converter optimized for high-dynamic-range signal digitization at 25Msps. It delivers 77dB SNR, 90dB SFDR, and ultralow 0.07psRMS jitter-enabling undersampling of IF signals in portable medical imaging and multi-channel data acquisition systems. Operates from a single 1.8V supply with serial LVDS outputs and SPI configuration.
For engineers reviewing the LTC2190IUKG#TRPBF datasheet, LTC2190IUKG#TRPBF pinout, LTC2190IUKG#TRPBF application, or LTC2190IUKG#TRPBF equivalent, key selection criteria include guaranteed ±2LSB INL over temperature, 550MHz full-power bandwidth, selectable 1/2/4-lane LVDS serialization, and –40°C to +85°C industrial-grade operation in a 52-pin QFN package.
Technical Context
The LTC2190IUKG#TRPBF implements two independent 16-bit ADC cores with simultaneous sampling, each featuring a 550MHz sample-and-hold front-end and internal clock duty cycle stabilizer. Its architecture supports differential or single-ended encode inputs (ENC+/ENC–), programmable input ranges (1VP-P to 2VP-P), and internal/external reference modes via SENSE pin configuration.
Digital interface uses serialized LVDS outputs per channel-configurable for 1-bit, 2-bit, or 4-bit lanes-with optional on-chip 100Ω termination and adjustable output current (1.75mA or 3.5mA). Control is handled via SPI port (CS/SCK/SDI/SDO) in serial mode or parallel logic in PAR/SER mode, enabling flexible system integration without external FIFOs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with no missing codes over temperature-ensures monotonicity and precision in measurement-critical applications. |
| Sampling Rate | 25Msps-fixed speed grade for the LTC2190 variant, enabling deterministic timing in real-time data capture systems. |
| SNR / SFDR | 77dB SNR and 90dB SFDR at 70MHz input-supports high-fidelity digitization of wideband RF and ultrasound signals. |
| Input Bandwidth | 550MHz full-power bandwidth-allows direct sampling of IF signals up to cellular and L-band frequencies. |
| Power Consumption | 104mW total (52mW per channel) at 25Msps-optimized for battery-powered or thermally constrained portable instruments. |
| Supply Voltage | Single 1.8V analog (VDD) and digital (OVDD) supply-reduces board-level power conversion complexity and noise coupling. |
| Operating Temp | –40°C to +85°C (I-grade)-validated for industrial and medical environments without derating. |
Pinout & Package
52-pin (7mm × 8mm) plastic QFN package with exposed thermal pad (Pin 53 = GND), requiring soldering to PCB ground for thermal and electrical integrity. Pin numbering follows standard top-view layout with dedicated analog/digital grounds, dual-channel LVDS pairs, and configurable control I/O.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCM1 (1), VCM2 (14) | Common-mode bias outputs | Nominally VDD/2; used to set input common-mode voltage for CH1/CH2 analog inputs-requires 0.1µF bypass to GND. |
| AIN1± (3,4), AIN2± (11,12) | Differential analog inputs | High-impedance, 550MHz BW inputs accepting 1–2VP-P differential signals; CMRR = 80dB minimizes noise coupling. |
| ENC+/ENC– (17,18) | Encode clock inputs | Accept PECL/LVDS/TTL/CMOS; internal duty cycle stabilizer enables full-speed operation across wide duty cycle range. |
| OUT1A± to OUT1D± (37–44), OUT2A± to OUT2D± (23–30) | LVDS serial data outputs | Configurable 1/2/4-lane per channel; 100Ω on-chip termination and 1.75/3.5mA drive reduce external component count. |
| FR± (31,32), DCO± (35,36) | Frame and data clock outputs | Synchronous LVDS timing signals aligned to sampled data-enables deterministic FPGA/ASIC interface timing. |
| PAR/SER (10), CS/SCK/SDI/SDO (19–21,46) | Configuration interface | Selects serial (SPI) or parallel programming mode; controls lane count, output current, reference mode, and power states. |
Key Features
| Feature | Design Value |
|---|---|
| Simultaneous dual-channel sampling | Eliminates inter-channel skew for phase-coherent measurements in ultrasound beamforming or I/Q demodulation. |
| Ultralow 0.07psRMS aperture jitter | Enables high-SNR undersampling of IF signals up to 140MHz without external jitter cleaners. |
| Programmable LVDS serialization (1/2/4 lanes) | Reduces PCB trace count by up to 75% vs parallel interfaces-critical for dense multichannel DAQ layouts. |
| Internal reference with ±2LSB INL over temp | Removes need for external precision reference ICs while maintaining DC accuracy in portable equipment. |
| Shutdown and Nap modes (1mW / 50mW) | Extends battery life in handheld diagnostic devices during idle periods without losing configuration state. |
| 52-pin QFN with exposed thermal pad | Provides low thermal resistance (θJA = 29°C/W) for stable performance in compact enclosures without heatsinks. |
Applications
| Portable Medical Ultrasound | Multi-Channel Data Acquisition |
|---|---|
|
Use Scenario: Real-time B-mode imaging in handheld ultrasound probes with 16–32 receive channels. IC Role / Device Role / Timing Role: Dual-channel ADC digitizing echo return signals from transducer arrays with precise time alignment. Use Value: 77dB SNR and 550MHz bandwidth preserve tissue contrast and spatial resolution; 25Msps rate matches typical pulse repetition intervals. |
Use Scenario: High-precision vibration monitoring across 8+ sensors in predictive maintenance systems. IC Role / Device Role / Timing Role: Simultaneous sampling ADC capturing synchronized time-domain waveforms for FFT-based spectral analysis. Use Value: ±2LSB INL ensures amplitude fidelity across channels; LVDS serialization simplifies routing on dense sensor interface boards. |
| Nondestructive Testing (NDT) | Software-Defined Radio (SDR) Receivers |
|
Use Scenario: Pulsed eddy-current inspection of aircraft fuselage panels using broadband excitation. IC Role / Device Role / Timing Role: Digitizing high-frequency return signals with minimal harmonic distortion for defect signature extraction. Use Value: 90dB SFDR suppresses spurious responses from strong near-field reflections; 0.07psRMS jitter preserves time-of-flight accuracy. |
Use Scenario: Direct-conversion receiver front-end in cognitive radio platforms operating in 70–140MHz IF bands. IC Role / Device Role / Timing Role: Undersampling ADC converting IF signals to baseband I/Q streams for FPGA-based demodulation. Use Value: 77dB SNR enables >14-bit ENOB at 70MHz; single 1.8V supply reduces power management overhead in compact SDR modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, 16-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9269BCPZ-20 | 20Msps, 16-bit, single-supply 1.8V, but only 72dB SNR and 85dB SFDR; no integrated duty cycle stabilizer. | Lower dynamic range limits use in high-fidelity ultrasound or NDT; requires external clock conditioning. | Choose when lower cost and reduced power (85mW) outweigh SNR/SFDR requirements. |
| LTC2264IUKG#TRPBF | 25Msps, 16-bit, but single-channel only; identical 77dB SNR, 90dB SFDR, and QFN-52 package. | Requires two units for dual-channel operation-increases PCB area, power, and synchronization complexity. | Choose only if channel isolation >110dB is required and board space permits dual-device layout. |
Compared with AD9269BCPZ-20 and LTC2264IUKG#TRPBF, the LTC2190IUKG#TRPBF uniquely combines dual-channel simultaneity, industry-leading 77dB SNR at 25Msps, and integrated clock stabilization-making it optimal for space-constrained, phase-coherent, high-dynamic-range instrumentation where single-part integration reduces system BOM and timing risk.
Availability
LTC2190IUKG#TRPBF is available at Aetrix Electronics and suitable for portable medical imaging, multi-channel data acquisition, and nondestructive testing requiring stable component supply, long-term lifecycle support, and guaranteed industrial temperature performance.
Supply support for LTC2190IUKG#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies for precision measurement and communications.
The LTC2190IUKG#TRPBF belongs to the LTC219x family of ultra-low-jitter, dual-channel, 16-bit ADCs designed specifically for demanding instrumentation, medical imaging, and defense/aerospace applications requiring simultaneous sampling and high SFDR.
FAQ
What is the maximum input frequency supported by the LTC2190IUKG#TRPBF?
The LTC2190IUKG#TRPBF features a 550MHz full-power bandwidth (–3dB point), allowing accurate digitization of analog inputs up to this frequency. At 70MHz input, it achieves 77dB SNR and 90dB SFDR-key metrics validated in the datasheet's typical performance graphs. This makes the LTC2190IUKG#TRPBF suitable for undersampling IF signals in SDR and ultrasound applications without external anti-alias filtering beyond the S/H front-end.
Does the LTC2190IUKG#TRPBF support both internal and external voltage references?
Yes, the LTC2190IUKG#TRPBF supports both modes via the SENSE pin (Pin 50). Tying SENSE to VDD selects the internal 1.25V reference with ±1V input range; grounding SENSE selects ±0.5V range; applying 0.625V–1.3V externally sets ±0.8×VSENSE range. The internal reference delivers ±2LSB INL over temperature, eliminating need for external precision references in most portable designs.
How many LVDS data lanes does the LTC2190IUKG#TRPBF support per channel?
The LTC2190IUKG#TRPBF supports three LVDS serialization modes per channel: 1-lane (1 bit per clock edge), 2-lane (2 bits), or 4-lane (4 bits), configured via CS/SCK in parallel mode or SPI register writes in serial mode. This flexibility reduces PCB trace count-e.g., 4-lane mode cuts interface lines by 75% versus parallel 16-bit outputs-while maintaining deterministic timing through FR/DCO synchronization signals.
What power-saving modes are available on the LTC2190IUKG#TRPBF?
The LTC2190IUKG#TRPBF offers two low-power states: Nap mode (50mW total) and Shutdown mode (1mW total), both retaining register settings. Nap mode disables ADC cores but keeps bias circuits active for fast wake-up (<1µs); Shutdown powers down all circuitry except the SPI interface. These modes are controlled via SDI in parallel mode or SPI register writes-ideal for battery-powered portable medical devices with intermittent acquisition cycles.
Is the LTC2190IUKG#TRPBF pin-compatible with other members of the LTC219x family?
Yes, the LTC2190IUKG#TRPBF shares identical 52-pin QFN (UKG) packaging, pinout, and footprint with LTC2191IUKG#TRPBF and LTC2192IUKG#TRPBF. All three support the same interface protocols, register map, and feature set-the only differences are maximum sampling rates (25Msps, 40Msps, 65Msps) and corresponding power consumption. This allows scalable design reuse across performance tiers without PCB redesign.
LTC2190IUKG#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 52-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 25M
- Number of Inputs:
- 2
- Input Type:
- Differential
- Data Interface:
- LVDS - Serial
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 52-QFN (7x8)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2190IUKG#TRPBF FAQ
1.How can I place an order for LTC2190IUKG#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2190IUKG#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2190IUKG#TRPBF reliable?
The price and inventory of LTC2190IUKG#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2190IUKG#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC2190IUKG#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2190IUKG#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2190IUKG#TRPBF?
LTC2190IUKG#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2190IUKG#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2190IUKG#TRPBF?
For technical support, including LTC2190IUKG#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2190IUKG#TRPBF requirements.
6.How does Aetrix verify that LTC2190IUKG#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC2190IUKG#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2190IUKG#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC2190IUKG#TRPBF?
All LTC2190IUKG#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2190IUKG#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2190IUKG#TRPBF part is unused and in its original packaging.
Return procedure for LTC2190IUKG#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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