Analog Devices Inc. LTC2259CUJ-12#PBF

Overview

LTC2259CUJ-12#PBF from Analog Devices (formerly Linear Technology) is a 12-bit, 80Msps ultralow-power analog-to-digital converter with 70.6dB SNR and 85dB SFDR at 70MHz input, operating from a single 1.8V supply and featuring DDR CMOS or DDR LVDS outputs. It targets high-dynamic-range signal digitization in portable medical imaging and multi-channel data acquisition systems.

For engineers reviewing the LTC2259CUJ-12#PBF datasheet, LTC2259CUJ-12#PBF pinout, LTC2259CUJ-12#PBF application, or LTC2259CUJ-12#PBF equivalent, key selection criteria include its 800MHz full-power bandwidth, 0.17psRMS jitter, 87mW power dissipation at 80Msps, and support for selectable 1VP-P to 2VP-P input ranges with internal/external reference options.

Technical Context

The LTC2259CUJ-12#PBF implements a pipelined ADC architecture with integrated sample-and-hold, correction logic, and configurable digital output drivers. Its ENC+/ENC– differential clock interface accepts sine wave, PECL, LVDS, TTL, or CMOS inputs, and includes an optional duty cycle stabilizer for robust timing across wide duty-cycle variations.

Digital outputs are configurable as full-rate CMOS, double-data rate CMOS, or double-data rate LVDS, with separate OVDD supply enabling 1.2V–1.8V CMOS swing control. The SPI port supports serial configuration of modes including shutdown, nap, data randomization, and clock stabilizer enablement.

Key Specifications

Pinout & Package

40-pin (6mm × 6mm) plastic QFN package (UJ) with exposed thermal pad (Pin 41) soldered to PCB ground for optimal thermal performance and EMI control.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed ADC applications.

Compared with LTC2260CUJ-12#PBF and AD9226ASTZ-RL7, the LTC2259CUJ-12#PBF delivers optimal balance of 80Msps throughput, 87mW efficiency, and 85dB SFDR in a compact 6×6mm QFN - making it ideal for portable, battery-operated, and thermally constrained high-fidelity digitization tasks.

Availability

LTC2259CUJ-12#PBF is available at Aetrix Electronics and suitable for portable medical imaging, multi-channel data acquisition, nondestructive testing, and software defined radios requiring stable component supply and long-term production continuity.

Supply support for LTC2259CUJ-12#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies.

The LTC2259CUJ-12#PBF belongs to the LTC22xx family of ultralow-power, high-speed ADCs designed specifically for portable, battery-powered, and thermally constrained instrumentation and communications systems requiring exceptional dynamic range and timing precision.

FAQ

What is the maximum sampling rate supported by the LTC2259CUJ-12#PBF?

The LTC2259CUJ-12#PBF supports a maximum sampling rate of 80Msps, as specified in its part number suffix "-12" and confirmed in the Absolute Maximum Ratings and Dynamic Accuracy sections of the datasheet. This rate is fixed for the LTC2259 variant, distinguishing it from the pin-compatible LTC2260-12 (105Msps) and LTC2261-12 (125Msps). Operation above 80Msps is not guaranteed and may violate timing or AC specifications.

Does the LTC2259CUJ-12#PBF support both internal and external voltage references?

Yes, the LTC2259CUJ-12#PBF supports both internal and external references via the SENSE pin (Pin 39). Connecting SENSE to VDD selects the internal 1.25V reference with ±1V input range; connecting to GND selects ±0.5V range; applying 0.625V–1.3V externally configures ±0.8×V_SENSE. Internal reference accuracy is ±1.5% gain error and ±25ppm/°C drift, while external reference bypassing requires a 1µF ceramic capacitor on VREF (Pin 38).

What digital output interface options does the LTC2259CUJ-12#PBF provide?

The LTC2259CUJ-12#PBF offers three configurable digital output modes: full-rate CMOS, double-data rate (DDR) CMOS, and DDR LVDS. Output mode is selected via the PAR/SER pin and SCK logic level in parallel mode, or via SPI register writes in serial mode. DDR LVDS uses internal 100Ω termination and supports 1.75mA or 3.5mA current modes; CMOS outputs are compatible with 1.2V–1.8V OVDD supplies.

How is power managed in low-duty-cycle or standby operation of the LTC2259CUJ-12#PBF?

The LTC2259CUJ-12#PBF provides two low-power states: Nap mode (9mW) and Sleep mode (0.5mW), both entered via SPI command or parallel control (SDI = high in parallel mode). Nap mode retains register settings and reference bias while disabling the ADC core; Sleep mode shuts down all analog circuitry except the bandgap reference. Both modes resume full operation within nanoseconds upon wake-up signal.

What is the significance of the "UJ" package designation in LTC2259CUJ-12#PBF?

The "UJ" in LTC2259CUJ-12#PBF denotes a 40-lead, 6mm × 6mm plastic QFN package with exposed thermal pad (Pin 41), standardized by Analog Devices. This package provides low inductance, excellent thermal dissipation (θ_JA = 32°C/W), and compact footprint - critical for high-frequency signal integrity and power density in portable systems. It is mechanically and electrically identical across the LTC2259/LTC2260/LTC2261 family.