Analog Devices Inc. LTC2280IUP#PBF
- Part No.:
- LTC2280IUP#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 64-WFQFN Exposed Pad
- Datasheet:
-
LTC2280IUP#PBF.pdf
- Description:
- IC ADC 10BIT PIPELINED 64QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,429
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Product details
Overview
LTC2280IUP#PBF from Analog Devices (formerly Linear Technology) is a dual 10-bit, 105Msps low-noise analog-to-digital converter designed for high-frequency signal digitization in demanding communications and imaging systems. It operates from a single 3V supply (2.85V–3.4V), delivers 61.6dB SNR and 85dB SFDR at Nyquist, and features 110dB channel isolation at 100MHz with 575MHz full-power bandwidth.
For engineers reviewing the LTC2280IUP#PBF datasheet, LTC2280IUP#PBF pinout, LTC2280IUP#PBF application, or LTC2280IUP#PBF equivalent, key selection considerations include dual-channel timing alignment, differential input drive requirements, output format control via MODE pin, and thermal management of its 64-lead QFN package with exposed ground pad.
Technical Context
The LTC2280IUP#PBF implements a six-stage CMOS pipelined ADC architecture per channel, achieving 5-cycle pipeline latency with synchronous sampling on rising CLK edges. Each channel includes independent reference programming (SENSEA/SENSEB), common-mode bias (VCMA/VCMB), and shutdown/napping modes controlled by SHDNA/SHDNB and OEA/OEB pins.
It supports flexible digital output configuration: MUX pin selects bus assignment between channels, MODE pin sets offset binary or 2's complement format and enables/disables clock duty cycle stabilization, while OVDD (0.5V–3.6V) decouples output driver voltage from analog VDD-enabling direct interfacing with 1.8V, 2.5V, or 3.3V logic families.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 10-bit with no missing codes-guarantees monotonic transfer function across full operating range. |
| Sample Rate | 105Msps maximum-supports real-time digitization of IF signals up to 140MHz input frequency. |
| SNR | 61.6dBFS at 5MHz input-defines usable dynamic range for baseband and narrowband applications. |
| SFDR | 85dBc at 5MHz input-indicates spurious-free performance critical for spectral analysis and comms receivers. |
| Channel Isolation | –110dB at 100MHz-ensures minimal crosstalk between A/B channels in time-interleaved or dual-path architectures. |
| Power Dissipation | 540mW typical at 105Msps-enables thermal design with θJA = 20°C/W in 9mm × 9mm QFN package. |
| Input Bandwidth | 575MHz full-power-allows direct sampling of L-band RF without external pre-filtering in many SDR front ends. |
Pinout & Package
Package: 64-lead (9mm × 9mm) plastic QFN with exposed thermal pad (Pin 65 = GND). Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AINA+, AINA– | Channel A differential analog input | Accepts ±0.5V to ±1V differential swing; requires matched 100Ω source impedance for optimal SFDR. |
| CLKA, CLKB | Independent channel clock inputs | Rising-edge triggered; supports asynchronous or synchronized sampling; duty cycle stabilizer configurable per MODE pin. |
| DA0–DA9, DB0–DB9 | Dual parallel digital outputs | 10-bit LSB-first parallel data; output voltage swing referenced to OVDD (0.5V–3.6V); OFA/OFB indicate overflow/underflow. |
| MUX, MODE, SHDNA, SHDNB, OEA, OEB | Configuration and control inputs | Enable multiplexed/dual-bus operation, output format selection, and per-channel power-down states (shutdown/nap/sleep). |
| SENSEA, SENSEB | Reference programming inputs | Set input range: tied to VCMA/VCMB → ±0.5V; to VDD → ±1V; external 0.5V–1V → ±VSENSE for precision scaling. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent 10-bit ADC cores | Enables simultaneous sampling of two analog signals with <1ps inter-channel skew-critical for I/Q demodulation and beamforming. |
| Integrated clock duty cycle stabilizer | Compensates for non-50% clock duty cycles without external circuitry-maintains AC performance across wide temperature and process variation. |
| Flexible output supply (OVDD) | Allows direct interface to 1.8V FPGA I/O banks or 3.3V microcontrollers without level shifters-reducing BOM count and layout complexity. |
| Per-channel shutdown and nap modes | Reduces power to 2mW (shutdown) or 15mW (nap) per channel-supports dynamic power scaling in battery-powered instrumentation. |
| 110dB channel isolation at 100MHz | Minimizes signal leakage between channels in dual-path receivers-eliminates need for additional isolation filtering in compact PCB layouts. |
Applications
| Wireless Base Station Receiver | Medical Ultrasound Imaging |
|---|---|
|
Use Scenario: Digitizing dual-channel IF signals from quadrature downconverters in LTE/FDD-TDD infrastructure equipment. IC Role / Device Role / Timing Role: Dual-channel ADC capturing I/Q data streams at 105Msps with matched gain/phase and low intermodulation distortion. Use Value: 85dB SFDR and –110dB crosstalk ensure clean separation of adjacent channels in crowded spectrum environments. |
Use Scenario: Sampling echo return signals from phased-array transducers in portable ultrasound machines. IC Role / Device Role / Timing Role: High-speed dual ADC acquiring time-aligned RF echoes with sub-ns aperture jitter for precise time-of-flight calculation. Use Value: 0.2psRMS aperture jitter and 61.6dB SNR preserve tissue contrast resolution at depths >15cm. |
| Spectral Monitoring System | Portable Test Equipment |
|
Use Scenario: Real-time spectrum analysis across 0–140MHz band in field-deployable RF interference analyzers. IC Role / Device Role / Timing Role: Dual ADC feeding FFT engine with coherent sampling; MUX pin enables time-multiplexed capture on single data bus. Use Value: 575MHz input bandwidth allows direct sampling without image-reject filtering-reducing front-end component count by 30%. |
Use Scenario: Embedded digitizer module in handheld oscilloscopes and signal analyzers requiring low power and small footprint. IC Role / Device Role / Timing Role: Low-power dual ADC supporting nap mode during idle periods and fast wake-up for trigger-based acquisition. Use Value: 540mW total power at full speed and 2mW shutdown enable >4-hour battery life in Class II portable instruments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2282IUP#PBF | 12-bit resolution, same 105Msps sample rate, identical pinout and package-higher ENOB but increased power (720mW). | Better suited for high-fidelity measurement where 1.5-bit higher resolution justifies 33% higher power and cost. | Select when SNR >66dB and SFDR >90dB are required; verify thermal margin for same PCB layout. |
| AD9233BCPZ-105 | Single-channel 12-bit, 105Msps; different pinout, no MUX/SENSE flexibility; requires external reference and clock conditioning. | Requires two devices and additional routing for dual-channel use-increases board area and timing skew risk. | Consider only if system already uses ADI's JESD204B ecosystem; avoid for new designs needing integrated dual-channel simplicity. |
Compared with LTC2280IUP#PBF, LTC2282IUP#PBF offers higher resolution at identical speed and footprint, while AD9233BCPZ-105 demands dual-device implementation and external support circuitry-making LTC2280IUP#PBF the optimal balance of integration, power, and dual-channel coherence for space-constrained RF digitizers.
Availability
LTC2280IUP#PBF is available at Aetrix Electronics and suitable for wireless infrastructure, medical imaging, spectral analysis, and portable instrumentation requiring stable component supply across extended temperature ranges (–40°C to +85°C).
Supply support for LTC2280IUP#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC2280IUP#PBF belongs to ADI's legacy Linear Technology high-speed ADC family, engineered specifically for wideband, low-distortion digitization in communications and instrumentation-emphasizing channel matching, power efficiency, and ease of analog front-end integration.
FAQ
What is the operating temperature range for the LTC2280IUP#PBF?
The LTC2280IUP#PBF is rated for industrial temperature operation from –40°C to +85°C. This grade is confirmed by the "I" suffix in the part number and applies to all DC and AC specifications unless otherwise noted in the datasheet. Thermal derating begins above +85°C ambient, with TJMAX = 125°C.
Does the LTC2280IUP#PBF require external reference components?
Yes-the LTC2280IUP#PBF requires external bypassing on all reference pins: REFHA/REFLA and REFLB/REFHB must be shorted in pairs and bypassed to ground with 0.1µF ceramic capacitors placed close to the pins, plus 2.2µF and 1µF ceramics per channel. These are mandatory for stable internal reference operation and noise performance.
Can the LTC2280IUP#PBF operate with a single-ended analog input?
Yes, the LTC2280IUP#PBF supports single-ended input drive: connect AIN+ to signal and AIN– to VCM (1.5V). However, harmonic distortion and INL degrade versus differential mode; SNR and DNL remain unaffected. For best performance, differential drive with matched 100Ω source impedance is strongly recommended.
How does the MODE pin affect the LTC2280IUP#PBF's output behavior?
The MODE pin on the LTC2280IUP#PBF controls both output data format (offset binary or 2's complement) and clock duty cycle stabilizer enable/disable. Ground = offset binary + stabilizer off; 1V (≈1/3 VDD) = offset binary + stabilizer on; 2V (≈2/3 VDD) = 2's complement + stabilizer on; VDD = 2's complement + stabilizer off.
Is the exposed pad (Pin 65) on the LTC2280IUP#PBF electrically connected?
Yes-Pin 65 is the exposed thermal pad and is internally connected to GND. It must be soldered to a solid PCB ground plane for proper thermal dissipation (θJA = 20°C/W) and electrical noise suppression. Failure to connect it degrades SNR by up to 3dB and risks thermal runaway at full sample rate.
LTC2280IUP#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 64-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 10
- Sampling Rate (Per Second):
- 105M
- Number of Inputs:
- 2
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 2.85V ~ 3.4V
- Voltage - Supply, Digital:
- 2.85V ~ 3.4V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 64-QFN (9x9)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2280IUP#PBF FAQ
1.How can I place an order for LTC2280IUP#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2280IUP#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2280IUP#PBF reliable?
The price and inventory of LTC2280IUP#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2280IUP#PBF is usually 5 days.
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LTC2280IUP#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2280IUP#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2280IUP#PBF?
For technical support, including LTC2280IUP#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2280IUP#PBF requirements.
6.How does Aetrix verify that LTC2280IUP#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2280IUP#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2280IUP#PBF meets industry standards.
7.What is the process for return or replacement of LTC2280IUP#PBF?
All LTC2280IUP#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2280IUP#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2280IUP#PBF part is unused and in its original packaging.
Return procedure for LTC2280IUP#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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