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Analog Devices Inc. LTC2293CUP#PBF

Part No.:
LTC2293CUP#PBF
Manufacturer:
Analog Devices Inc.
Category:
Analog to Digital Converters (ADC)
Package:
64-WFQFN Exposed Pad
Datasheet:
AetrixLTC2293CUP#PBF.pdf
Description:
IC ADC 12BIT PIPELINED 64QFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:138

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Product details

Overview

LTC2293CUP#PBF from Analog Devices (formerly Linear Technology) is a dual 12-bit, 65Msps analog-to-digital converter operating from a single 3V supply (2.7V–3.4V), delivering 71.3dB SNR and 90dB SFDR at Nyquist with 110dB channel isolation at 100MHz. It features integrated clock duty cycle stabilization, flexible ±0.5V to ±1V differential input range, and multiplexed or separate 12-bit parallel digital outputs - deployed in high-speed imaging and broadband communications front-ends.

For engineers reviewing the LTC2293CUP#PBF datasheet, LTC2293CUP#PBF pinout, LTC2293CUP#PBF application, or LTC2293CUP#PBF equivalent, key selection criteria include its guaranteed 0°C to 70°C industrial temperature grade, 575MHz full-power bandwidth sample-and-hold, low 400mW total power dissipation, and pin-compatible family scalability across 25/40/65Msps variants.

Technical Context

The LTC2293CUP#PBF implements a six-stage CMOS pipelined ADC architecture with deterministic 5-cycle pipeline latency and independent channel control via SHDNA/SHDNB and OEA/OEB pins. Its dual-channel design supports synchronous or asynchronous sampling with separate CLKA/CLKB inputs and configurable output format (offset binary or 2's complement) via the MODE pin.

It integrates on-chip reference buffers, programmable input range selection via SENSEA/SENSEB pins, and a dedicated clock duty cycle stabilizer that maintains AC performance across 35%–65% input clock duty cycles - critical for systems using non-50% clocks from PLLs or FPGA I/O.

Key Specifications

ParameterValue and Actual Design Meaning
Resolution12-bit with no missing codes over temperature - ensures monotonicity in closed-loop control and spectral analysis.
Sampling Rate65Msps - supports baseband digitization up to 32.5MHz without aliasing per Nyquist criterion.
SNR71.3dBFS at 5MHz input - enables >11.5 effective bits for high-fidelity signal capture in medical ultrasound.
SFDR90dBc at 5MHz input - suppresses spurious tones critical for LTE/WiMAX receiver IF sampling.
Channel Isolation110dB at 100MHz - prevents crosstalk-induced distortion in dual-path phased-array radar receivers.
Power Dissipation400mW at 65Msps - allows thermal management in compact 9mm × 9mm QFN without forced air.
Input Bandwidth575MHz full-power - accommodates wideband IF signals up to 200MHz while maintaining linearity.

Pinout & Package

Package: 64-lead (9mm × 9mm) plastic QFN with exposed GND pad (Pin 65), rated for 0°C to 70°C operation. Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.

Pin/TerminalCircuit RoleDesign Meaning
AINA+, AINA–
AINB+, AINB–
Differential analog inputs (Ch A/B)Accept ±0.5V to ±1V differential signals; require matched routing and common-mode bias via VCMA/VCMB.
CLKA, CLKBIndependent sampling clock inputsPositive-edge triggered; support asynchronous dual-channel sampling or synchronized operation when tied together.
DA0–DA11, DB0–DB1112-bit parallel digital outputs (Ch A/B)Configurable as separate buses or multiplexed via MUX pin; OVDD supports 0.5V–3.6V logic interfacing.
SHDNA, SHDNB
OEA, OEB
Per-channel shutdown and output enableEnable three power states: active (400mW), nap mode (15mW/channel), and shutdown (2mW/channel).
MODEOutput format & duty cycle stabilizer controlSelects offset binary/2's complement and enables/disables internal clock conditioning circuitry.

Key Features

FeatureDesign Value
Dual independent 12-bit ADC coresEnables simultaneous sampling of two RF/IF paths without interleaving artifacts or timing skew compensation.
Integrated clock duty cycle stabilizerEliminates external clock conditioning circuitry for non-50% clocks - reduces BOM count and layout complexity.
Flexible input range programmingSENSEA/SENSEB pins select ±0.5V, ±1V, or user-defined ±VSENSE range - simplifies front-end gain staging.
Separate analog/digital suppliesVDD (2.7V–3.4V) and OVDD (0.5V–3.6V) decoupling allows direct interface to 1.8V/2.5V/3.3V FPGAs or ASICs.
Low 0.25LSBRMS transition noiseMinimizes quantization uncertainty in high-resolution position sensing and precision instrumentation applications.

Applications

Wireless Base Station ReceiverMedical Ultrasound Imaging

Use Scenario: Digitizing dual-channel IF signals from quadrature demodulators in LTE/FDD-TDD macrocell radios.

IC Role / Device Role / Timing Role: Dual-channel ADC capturing I/Q data streams at 65Msps with <110dB inter-channel isolation.

Use Value: Enables real-time digital beamforming with minimal crosstalk-induced phase error between antenna elements.

Use Scenario: Sampling echo return signals from phased-array transducers in portable ultrasound systems.

IC Role / Device Role / Timing Role: High-SNR digitizer for time-of-flight measurements with 71.3dB dynamic range at 20MHz bandwidth.

Use Value: Improves image contrast resolution by preserving weak tissue boundary reflections amid strong near-field echoes.

Spectral Monitoring EquipmentTest & Measurement Digitizers

Use Scenario: Real-time spectrum analysis of wideband RF emissions in EMI compliance testing.

IC Role / Device Role / Timing Role: Dual ADC front-end supporting 575MHz input bandwidth and 90dB SFDR for clean harmonic rejection.

Use Value: Accurately resolves adjacent-channel interference and spurious emissions without false positives from ADC nonlinearity.

Use Scenario: Modular digitizer card for automated test equipment requiring calibrated multi-channel acquisition.

IC Role / Device Role / Timing Role: Precision dual ADC with ±0.3LSB INL and ±0.15LSB DNL over temperature for traceable measurement accuracy.

Use Value: Reduces system-level calibration frequency by maintaining DC accuracy without external trimming components.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel ADC applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
LTC2292CUP#PBF40Msps max sampling rate; 235mW power; identical pinout and feature set.Lower Nyquist bandwidth (20MHz) - suitable for sub-6GHz 5G FR1 IF sampling where 65Msps is over-spec.Select when system clock constraints or thermal budget preclude 65Msps operation but dual-channel functionality remains essential.
AD9233BCPZ-65Single-channel 12-bit, 65Msps; 3.3V supply; 70.2dB SNR; different 48-lead LFCSP package and pin assignment.No channel isolation spec; requires two devices for dual-path capture - increases board area and timing alignment complexity.Choose only if single-channel density and legacy ADI ecosystem compatibility outweigh dual-channel integration benefits.

Compared with LTC2292CUP#PBF and AD9233BCPZ-65, the LTC2293CUP#PBF uniquely delivers dual-channel 65Msps conversion in a single 64-QFN package with guaranteed 110dB isolation - eliminating inter-channel skew and reducing system-level synchronization overhead in time-critical applications.

Availability

LTC2293CUP#PBF is available at Aetrix Electronics and suitable for wireless infrastructure, medical imaging, spectral analysis, and portable instrumentation requiring stable component supply and long-term production continuity.

Supply support for LTC2293CUP#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.

The LTC2293CUP#PBF belongs to ADI's high-speed data converter product line, engineered specifically for demanding communications and imaging applications requiring dual-channel synchronization, low power, and exceptional dynamic range at intermediate frequencies.

FAQ

What is the operating temperature range for the LTC2293CUP#PBF?

The LTC2293CUP#PBF is specified for commercial-grade operation from 0°C to 70°C ambient temperature. This is indicated by the "C" suffix in the part number and confirmed in the Absolute Maximum Ratings table. The device maintains full performance specifications - including 71.3dB SNR and ±0.3LSB INL - across this entire range without derating. For extended temperature applications, the LTC2293IUP#PBF variant (-40°C to +85°C) is available.

Does the LTC2293CUP#PBF support single-ended analog inputs?

Yes, the LTC2293CUP#PBF supports single-ended analog inputs, though differential drive is recommended for optimal AC performance. When configured for single-ended operation, the input common-mode voltage must be set between 0.5V and 2.0V (per datasheet Note 7), and harmonic distortion degrades relative to differential mode. The device retains full functionality - including clock duty cycle stabilization and programmable input range - regardless of input configuration. Designers should verify SNR/SFDR degradation against system requirements using Figure 8 test circuit conditions.

How does the MODE pin affect the LTC2293CUP#PBF's output behavior?

The MODE pin on the LTC2293CUP#PBF controls both output data format (offset binary vs. 2's complement) and clock duty cycle stabilizer (DCS) activation. Ground selects offset binary with DCS disabled; 1V (⅓ VDD) selects offset binary with DCS enabled; 2V (⅔ VDD) selects 2's complement with DCS enabled; and VDD selects 2's complement with DCS disabled. This dual function allows hardware-selectable data representation and clock conditioning without firmware intervention - critical for interoperability with legacy DSPs or FPGA IP cores expecting specific formats.

Can the LTC2293CUP#PBF's digital outputs drive 1.8V logic directly?

Yes, the LTC2293CUP#PBF's digital outputs can drive 1.8V logic directly via the OVDD supply pin. When OVDD is set to 1.8V, the outputs guarantee VOH ≥ 1.79V and VOL ≤ 0.09V at 1.6mA sink/source current - meeting standard 1.8V CMOS input thresholds. This eliminates level-shifting circuitry when interfacing with modern low-voltage FPGAs or ASICs. The OVDD pin must be bypassed with a 0.1µF ceramic capacitor to OGND, and OGND must be connected to system digital ground.

What is the purpose of the exposed pad (Pin 65) on the LTC2293CUP#PBF?

The exposed pad (Pin 65) on the LTC2293CUP#PBF is electrically and thermally connected to internal GND and must be soldered to a PCB ground plane. It serves two critical functions: (1) lowers thermal resistance (θJA = 20°C/W) to maintain junction temperature below 125°C at 400mW dissipation, and (2) provides low-inductance grounding for analog and digital return currents - essential for achieving specified 71.3dB SNR and 90dB SFDR. Leaving the pad unconnected or floating will cause thermal runaway and severe AC performance degradation.

LTC2293CUP#PBF Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
-
Package/Case:
64-WFQFN Exposed Pad
Packaging:
Tube
Product Status:
Active
Number of Bits:
12
Sampling Rate (Per Second):
65M
Number of Inputs:
2
Input Type:
Differential, Single Ended
Data Interface:
Parallel
Configuration:
S/H-ADC
Ratio - S/H:ADC:
1:1
Number of A/D Converters:
2
Architecture:
Pipelined
Reference Type:
External, Internal
Voltage - Supply, Analog:
2.7V ~ 3.4V
Voltage - Supply, Digital:
2.7V ~ 3.4V
Features:
Simultaneous Sampling
Operating Temperature:
0°C ~ 70°C
Supplier Device Package:
64-QFN (9x9)
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-

LTC2293CUP#PBF FAQ

1.How can I place an order for LTC2293CUP#PBF through Aetrix?

Please submit a Request for Quotation (RFQ) for LTC2293CUP#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LTC2293CUP#PBF reliable?

The price and inventory of LTC2293CUP#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2293CUP#PBF is usually 5 days.

3.What payment methods are accepted for LTC2293CUP#PBF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2293CUP#PBF transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LTC2293CUP#PBF?

LTC2293CUP#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LTC2293CUP#PBF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LTC2293CUP#PBF?

For technical support, including LTC2293CUP#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2293CUP#PBF requirements.

6.How does Aetrix verify that LTC2293CUP#PBF is sourced from the original manufacturer or authorized distributors?

All LTC2293CUP#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2293CUP#PBF meets industry standards.

7.What is the process for return or replacement of LTC2293CUP#PBF?

All LTC2293CUP#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2293CUP#PBF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LTC2293CUP#PBF part is unused and in its original packaging.

Return procedure for LTC2293CUP#PBF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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