Analog Devices Inc. LTC2306CDD#PBF
- Part No.:
- LTC2306CDD#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LTC2306CDD#PBF.pdf
- Description:
- IC ADC 12BIT SAR 10DFN
- Quantity:
- Payment:

- Shipping:

Inventory:589
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Product details
Overview
LTC2306CDD#PBF from Analog Devices (formerly Linear Technology) is a 2-channel, 12-bit successive approximation register (SAR) ADC with SPI/MICROWIRE-compatible serial interface, 500ksps sampling rate, 72.8dB SINAD, and fully differential sample-and-hold circuitry. It operates from a single 5V supply, draws 2.8mA at full speed, and supports software-selectable unipolar (0V to 4.096V) or bipolar (±2.048V) input ranges - ideal for precision industrial sensor data acquisition.
For engineers reviewing the LTC2306CDD#PBF datasheet, LTC2306CDD#PBF pinout, LTC2306CDD#PBF application, or LTC2306CDD#PBF equivalent, key selection considerations include its 10-pin DFN package, channel-to-channel isolation of –109dB, internal conversion clock enabling SCK up to 40MHz, separate OVDD rail (2.7V–5.25V), and guaranteed no missing codes over temperature.
Technical Context
The LTC2306CDD#PBF implements a capacitive charge-redistribution SAR architecture with a 12-bit internal DAC and differential comparator. Its analog input multiplexer supports dynamic reconfiguration between single-ended (CH0/GND, CH1/GND) and differential (CH0/CH1) modes via 6-bit SDI command words, with O/S and S/D bits controlling channel assignment and polarity.
Conversion timing is governed by an internal clock; CONVST rising edge initiates acquisition (min 240ns), followed by 1.3–1.6µs conversion time. Serial output on SDO occurs on SCK falling edges, with tACQ, tCONV, and tdDO tightly specified to support deterministic real-time control loops in motor or power electronics systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with guaranteed no missing codes - ensures monotonicity and integrity in closed-loop feedback control. |
| Sampling Rate | 500ksps maximum - supports anti-aliasing filter design up to 25MHz –3dB input bandwidth. |
| SINAD | 72.8dB at fIN = 1kHz - enables >11.8 effective number of bits (ENOB) for high-fidelity sensor digitization. |
| Channel Isolation | –109dB - prevents crosstalk between CH0 and CH1 during simultaneous or interleaved sampling. |
| Power Consumption | 14mW at 500ksps; 70µW in sleep mode - suitable for battery-powered portable instrumentation. |
| Input Range | Software-selectable: 0V to 4.096V (unipolar) or ±2.048V (bipolar) - matches common reference ICs like LT6660-4.096. |
| Reference Input | 0.1V to VDD (5V), max 260µA draw at 500ksps - allows direct use of precision references without buffering. |
Pinout & Package
Package: 10-lead (3mm × 3mm) plastic DFN with exposed pad (Pin 11 = GND). Requires soldering exposed pad to PCB ground plane for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1: SDO | Three-state serial data output | Drives previous conversion result on SCK falling edge; enabled only when CONVST is low - enables daisy-chaining and isolated bus topologies. |
| Pin 2: CONVST | Conversion start trigger | Rising-edge sensitive; must return low within 40ns after conversion start/end - critical for deterministic timing in real-time systems. |
| Pin 3: VDD | Analog/digital core supply | 4.75V–5.25V range; bypassed with 0.1µF ceramic + 10µF tantalum - powers internal DAC, comparator, and logic. |
| Pin 4: CH0 | Channel 0 analog input | Configurable as single-ended (vs GND) or differential (vs CH1); input capacitance 55pF in sample mode - defines RC filter design constraints. |
| Pin 5: CH1 | Channel 1 analog input | Paired with CH0 for differential operation; supports independent single-ended use - enables dual-sensor monitoring without external MUX. |
| Pin 6: VREF | External reference input | Accepts 0.1V–5V reference; 55pF input capacitance requires 10µF + 0.1µF decoupling - sets full-scale accuracy and noise floor. |
| Pin 7: GND | Analog/digital ground | Common return for VDD, OVDD, VREF, and analog inputs - must connect to solid ground plane to minimize noise coupling. |
| Pin 8: SDI | Serial data input | Latches 6-bit configuration word (S/D, O/S, UNI bits) on first 6 SCK rising edges - selects input mode, polarity, and range before next conversion. |
| Pin 9: SCK | Serial clock input | Supports up to 40MHz; controls SDI latching (rising edge) and SDO output (falling edge) - enables high-speed data transfer with microcontrollers or FPGAs. |
| Pin 10: OVDD | Digital output driver supply | 2.7V–5.25V independent rail; sets SDO logic levels - allows interfacing with 3.3V or 5V host systems without level shifters. |
Key Features
| Feature | Design Value |
|---|---|
| Auto-shutdown scaling | Reduces IDD from 2.8mA (500ksps) to 14µA (1ksps) - eliminates need for external power-gating logic in intermittent-sampling applications. |
| Fully differential sample-and-hold | Rejects common-mode noise on CH0/CH1 - improves immunity to EMI in motor drive or industrial environments. |
| Separate OVDD rail | Enables 3.3V FPGA or 5V MCU interfacing without voltage translation - simplifies PCB layout and reduces BOM count. |
| Internal conversion clock | Decouples SCK frequency from conversion timing - allows flexible host clocking (e.g., 1MHz SCK for low EMI) while maintaining 500ksps throughput. |
| Software-compatible family | Shares 6-bit SDI command structure with LTC2302 (1-channel) and LTC2308 (16-bit) - enables scalable platform design across resolution tiers. |
Applications
| Industrial Process Monitoring | Motor Control Feedback |
|---|---|
Use Scenario: Continuous voltage/current sensing from multiple transducers (e.g., pressure, temperature, current shunts) in PLC I/O modules. IC Role / Device Role / Timing Role: Dual-channel simultaneous sampling ADC with 240ns acquisition time and 1.6µs conversion - captures correlated sensor events without inter-channel skew. Use Value: Channel-to-channel isolation of –109dB prevents cross-talk between high-voltage and low-level analog signals, ensuring measurement integrity in noisy factory environments. |
Use Scenario: Real-time phase current sampling in 3-phase inverter drives for field-oriented control (FOC). IC Role / Device Role / Timing Role: Configurable differential ADC measuring CH0–CH1 voltage across shunt resistors - supports bipolar ±2.048V range matching typical current sense amplifier outputs. Use Value: 72.8dB SINAD enables accurate current reconstruction for torque ripple reduction, while 500ksps rate meets minimum 10× oversampling requirement for 50kHz PWM switching. |
| Battery-Operated Instrumentation | Isolated Data Acquisition |
Use Scenario: Portable multimeter or handheld oscilloscope capturing DC/low-frequency AC waveforms with >11-bit ENOB. IC Role / Device Role / Timing Role: Low-power 12-bit ADC with 70µW sleep mode and auto-shutdown - extends battery life during idle periods without firmware intervention. Use Value: 14mW active power at 500ksps allows continuous sampling for >24 hours on two AA cells, while 3mm × 3mm DFN minimizes board area. |
Use Scenario: High-voltage sensor interface behind digital isolators (e.g., ADuM140x) in energy metering or grid monitoring. IC Role / Device Role / Timing Role: SPI-compatible ADC with separate OVDD and 40MHz SCK support - interfaces directly with isolated SPI buses without level shifters or additional drivers. Use Value: 4-wire SPI interface and 10ns SDO timing margins ensure reliable communication across capacitive isolators, even at 25Mbps data rates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS8860IDRCT | 16-bit resolution, 1MSPS, SPI interface, but single-channel only; requires external reference and higher supply current (3.5mA). | Higher resolution suits precision metrology; lacks dual-channel capability for correlated measurements. | Select when ENOB > 14 bits is required and channel count is not limiting; verify layout accommodates larger 10-pin VSSOP package. |
| MAX11106ETE+ | 12-bit, 500ksps, 2-channel, but uses parallel interface (not SPI); integrated reference; higher power (3.2mA). | Parallel interface simplifies timing but consumes more GPIOs; integrated ref reduces BOM but limits range flexibility. | Choose for microcontroller designs with abundant I/O and no SPI constraint; avoid where board space or routing density is critical. |
Compared with ADS8860IDRCT and MAX11106ETE+, the LTC2306CDD#PBF uniquely balances dual-channel correlation, SPI compatibility, ultra-low power scaling, and software-selectable input ranges - making it optimal for space-constrained, battery-aware, or isolated industrial data loggers requiring deterministic timing.
Availability
LTC2306CDD#PBF is available at Aetrix Electronics and suitable for industrial process control, motor control feedback, and battery-operated instrumentation requiring stable component supply and long-term production continuity.
Supply support for LTC2306CDD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC2306CDD#PBF belongs to Linear's precision SAR ADC product line, designed specifically for demanding industrial, instrumentation, and medical applications where low noise, guaranteed monotonicity, and robust serial interfacing are essential.
FAQ
What input configurations does the LTC2306CDD#PBF support?
The LTC2306CDD#PBF supports four analog input configurations via its 6-bit SDI command: single-ended CH0 vs GND, single-ended CH1 vs GND, differential CH0–CH1, and differential CH1–CH0. The S/D bit selects single-ended/differential mode, and the O/S bit selects channel order or polarity. Unipolar mode (0V to 4.096V) is required for single-ended operation since inputs are referenced to GND. The LTC2306CDD#PBF's internal MUX enables reconfiguration "on the fly" between conversions without hardware changes.
Does the LTC2306CDD#PBF require an external reference, and what are the voltage limits?
Yes, the LTC2306CDD#PBF requires an external reference connected to the VREF pin, with a valid range of 0.1V to VDD (5V). Typical use cases employ 4.096V references (e.g., LT6660-4.096) to achieve full 12-bit utilization. The reference input draws up to 260µA at 500ksps and must be decoupled with a minimum 10µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor. The LTC2306CDD#PBF does not include an internal reference, so external stability and noise performance directly impact overall accuracy and SINAD.
How does the auto-shutdown feature of the LTC2306CDD#PBF reduce power consumption?
The LTC2306CDD#PBF's auto-shutdown feature dynamically scales supply current with sampling rate: it draws 2.8mA at 500ksps, drops to ~15µA at 1ksps, and enters 70µW sleep mode when idle. This occurs automatically based on CONVST activity - no software commands or register writes are needed. The LTC2306CDD#PBF achieves this through internal clock gating and bias current adjustment, eliminating external power-switching circuitry and reducing system-level complexity in battery-powered or energy-conscious designs.
Can the LTC2306CDD#PBF interface directly with a 3.3V microcontroller?
Yes, the LTC2306CDD#PBF supports direct interfacing with 3.3V microcontrollers using its separate OVDD pin (2.7V–5.25V range). When OVDD = 3.3V, the SDO output swings between 0V and 3.3V, matching standard 3.3V logic levels. The SDI, SCK, and CONVST inputs tolerate voltages up to VDD (5V) and meet 3.3V logic thresholds (VIH = 2.4V min, VIL = 0.8V max), allowing reliable communication without level shifters. The LTC2306CDD#PBF's dual-supply architecture simplifies mixed-voltage system integration.
What is the significance of the –109dB channel-to-channel isolation specification for the LTC2306CDD#PBF?
The –109dB channel-to-channel isolation specification means that a full-scale signal on CH0 produces less than 0.0003% of its amplitude on CH1 (and vice versa), measured at 1kHz. This exceptional isolation is achieved through matched internal switch capacitance and guard routing in the 10-pin DFN package. For the LTC2306CDD#PBF, this enables accurate simultaneous sampling of high- and low-level signals - such as motor phase currents and DC bus voltage - without mutual interference, critical for vector control algorithms and safety-critical monitoring.
LTC2306CDD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 500k
- Number of Inputs:
- 2
- Input Type:
- Differential, Single Ended
- Data Interface:
- SPI
- Configuration:
- MUX-S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 10-DFN (3x3)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2306CDD#PBF FAQ
1.How can I place an order for LTC2306CDD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2306CDD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2306CDD#PBF reliable?
The price and inventory of LTC2306CDD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2306CDD#PBF is usually 5 days.
3.What payment methods are accepted for LTC2306CDD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2306CDD#PBF transactions.
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4.How is shipping managed for LTC2306CDD#PBF?
LTC2306CDD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2306CDD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2306CDD#PBF?
For technical support, including LTC2306CDD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2306CDD#PBF requirements.
6.How does Aetrix verify that LTC2306CDD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2306CDD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2306CDD#PBF meets industry standards.
7.What is the process for return or replacement of LTC2306CDD#PBF?
All LTC2306CDD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2306CDD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2306CDD#PBF part is unused and in its original packaging.
Return procedure for LTC2306CDD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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