Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Data Acquisition > Analog to Digital Converters (ADC)

Analog Devices Inc. LTC2310IMSE-14#PBF

Name: LTC2310IMSE-14#PBF
Brand: Analog Devices Inc.
SKU: LTC2310IMSE-14#PBF
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: LTC2310IMSE-14#PBF

Manufacturer:: Analog Devices Inc.

Category:: Analog to Digital Converters (ADC)

Package:: 16-TFSOP (0.118", 3.00mm Width) Exposed Pad

Datasheet:: LTC2310IMSE-14#PBF.pdf

Description:: IC ADC 14BIT SAR 16MSOP

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:4,679

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

LTC2310IMSE-14#PBF from Analog Devices (formerly Linear Technology) is a 14-bit + sign successive approximation register (SAR) analog-to-digital converter with differential inputs, 2 Msps throughput, ±2.5 LSB INL guaranteed over –40°C to +85°C, and 82 dB SNR typical at 500 kHz input. It operates from single 3.3 V or 5 V supply, features integrated 4.096 V temperature-compensated reference (20 ppm/°C max), and targets high-speed data acquisition in industrial and automotive systems.

For engineers reviewing the LTC2310IMSE-14#PBF datasheet, LTC2310IMSE-14#PBF pinout, LTC2310IMSE-14#PBF application, or LTC2310IMSE-14#PBF equivalent, key selection criteria include guaranteed no-missing-codes operation at 14 bits, LVDS/CMOS SPI-compatible serial interface, wide 0 V to VDD common-mode input range, low 35 mW power dissipation at 5 V, and MSOP-16 package compatibility with high-density PCB layouts.

Technical Context

The LTC2310IMSE-14#PBF implements a 15-bit SAR architecture with internal sample-and-hold, supporting true differential acquisition without configuration. Its conversion phase uses binary-weighted CDAC comparisons against REFOUT (4.096 V or 2.048 V), delivering 250 µV LSB resolution and 220 ns conversion time.

It integrates dual reference paths: an internal 4.096 V (or 2.048 V) buffered reference with 20 ppm/°C drift, plus external 1.25 V REFIN input enabling direct drive of REFOUT. The CMOS/LVDS mode select pin configures I/O for 1.8–2.5 V CMOS or 100 Ω differential LVDS signaling with 64 MHz SCK support.

Key Specifications

Parameter	Value and Actual Design Meaning
Resolution	14-bit + sign (15-bit two's complement output); supports bipolar and unipolar pseudo-differential modes without reconfiguration.
Sampling Rate	2 Msps maximum; enables real-time capture of signals up to 1 MHz Nyquist bandwidth with no cycle latency.
INL Error	±2.5 LSB guaranteed over full temperature range; ensures monotonicity and accurate end-point linearity in closed-loop control.
SNR	82 dB typical at f_IN = 500 kHz; delivers >13.3 effective number of bits (ENOB) for precision measurement applications.
Reference	Internal 4.096 V (or 2.048 V) TCXO-compensated reference, 20 ppm/°C max drift; eliminates need for external reference in space-constrained designs.
Power Dissipation	35 mW at V_DD = 5 V, 2 Msps; reduces thermal load in multi-channel DAQ systems versus competing 14-bit ADCs.
Operating Temp	–40°C to +85°C (I-grade); qualified for under-hood automotive and industrial edge-sensing environments.

Pinout & Package

Package: 16-lead plastic MSOP (4 mm × 5 mm), exposed pad (Pin 17) required to be soldered to ground plane for thermal and electrical performance.

Pin/Terminal	Circuit Role	Design Meaning
GND (Pins 1, 5, 8, 11)	Ground reference	Multiple dedicated ground pins minimize ground bounce and improve PSRR in high-speed sampling.
REFIN (Pin 2)	Reference buffer I/O	Nominally outputs 1.25 V; grounding disables internal REFOUT buffer to enable external reference injection.
REFOUT (Pin 3)	Reference output	Provides 4.096 V (or 2.048 V) buffered reference; requires 10 µF local decoupling for stability.
VDD (Pin 4)	Analog power supply	Accepts 3.3 V or 5 V; bypassed with 1 µF ceramic capacitor to suppress switching noise coupling into ADC core.
AIN+, AIN– (Pins 6, 7)	Differential analog inputs	Support 0 V to VDD common-mode range and ±REFOUT differential swing; modeled as 15 Ω R_ON + 10 pF C_IN.
CNV (Pin 9)	Convert trigger input	TTL-compatible; falling edge initiates acquisition and conversion; timing-critical for jitter-sensitive applications.
CMOS/LVDS (Pin 10)	I/O interface mode select	Ground = CMOS; OVDD = LVDS; floating = low-power LVDS; determines SDO/SCK signaling standard.
OVDD (Pin 12)	Digital I/O supply	1.71 V to 2.5 V range; sets logic levels for SDO/SCK; must match host interface voltage (e.g., FPGA bank).
SDO+ (Pin 14)	Serial data output	MSB-first output on SCK falling edge; active in CMOS mode; LVDS mode requires SDO– (Pin 13) for differential signaling.
SCK+ (Pin 16)	Serial clock input	Falling-edge triggered; supports up to 64 MHz clock rate; CMOS mode uses single-ended drive; LVDS mode requires SCK– (Pin 15).

Key Features

Feature	Design Value
No missing codes at 14 bits	Guaranteed monotonic transfer function across full operating temperature range, eliminating code ambiguities in safety-critical feedback loops.
82 dB SNR at 500 kHz	Enables high-fidelity digitization of narrowband signals (e.g., motor current harmonics, optical sensor outputs) without oversampling.
LVDS/CMOS configurable interface	Reduces EMI and improves noise immunity in noisy industrial environments via differential LVDS, or lowers power via CMOS for battery-operated edge nodes.
Integrated 4.096 V reference	Eliminates external reference IC and associated layout complexity while maintaining <20 ppm/°C drift-critical for field-deployed instrumentation.
Nap/sleep power modes	Reduces current to 2.8 mA (nap) or 0.1 µA (sleep), enabling duty-cycled sensing in energy-constrained IoT gateways and remote telemetry units.

Applications

High-Speed Data Acquisition	Automotive Sensor Interface
Use Scenario: Real-time monitoring of vibration, pressure, or strain in rotating machinery using synchronized multi-channel sampling. IC Role / Device Role / Timing Role: Primary ADC capturing 2 Msps differential sensor outputs with no latency between samples for FFT-based spectral analysis. Use Value: 82 dB SNR and ±2.5 LSB INL ensure accurate amplitude and phase reconstruction of mechanical resonances up to 1 MHz.	Use Scenario: Digitizing crankshaft position, exhaust gas oxygen, or brake pressure signals in engine control units (ECUs). IC Role / Device Role / Timing Role: High-reliability ADC operating across –40°C to +85°C with integrated reference, reducing BOM count and calibration burden. Use Value: Guaranteed no-missing-codes and 20 ppm/°C reference drift meet ASIL-B functional safety requirements for closed-loop combustion control.
Optical Networking Monitoring	Multiphase Motor Control
Use Scenario: Sampling photodiode current or laser bias voltage in transceivers for real-time power and distortion monitoring. IC Role / Device Role / Timing Role: Differential ADC rejecting common-mode noise from high-speed digital lanes adjacent to analog signal paths on dense PCBs. Use Value: 85 dB CMRR and wide 0–VDD common-mode range allow direct connection to transimpedance amplifiers without level-shifting circuitry.	Use Scenario: Simultaneous current sensing across three motor phases in servo drives using isolated sigma-delta modulators and sinc filters. IC Role / Device Role / Timing Role: Precision ADC receiving filtered analog outputs from isolators, providing 14-bit resolution for field-oriented control (FOC) algorithms. Use Value: 250 µV LSB step size (at 4.096 V ref) resolves sub-milliohm shunt voltage drops, enabling torque ripple reduction below 0.5%.

High-Speed Data Acquisition

Automotive Sensor Interface

Use Scenario: Real-time monitoring of vibration, pressure, or strain in rotating machinery using synchronized multi-channel sampling.

IC Role / Device Role / Timing Role: Primary ADC capturing 2 Msps differential sensor outputs with no latency between samples for FFT-based spectral analysis.

Use Value: 82 dB SNR and ±2.5 LSB INL ensure accurate amplitude and phase reconstruction of mechanical resonances up to 1 MHz.

Use Scenario: Digitizing crankshaft position, exhaust gas oxygen, or brake pressure signals in engine control units (ECUs).

IC Role / Device Role / Timing Role: High-reliability ADC operating across –40°C to +85°C with integrated reference, reducing BOM count and calibration burden.

Use Value: Guaranteed no-missing-codes and 20 ppm/°C reference drift meet ASIL-B functional safety requirements for closed-loop combustion control.

Optical Networking Monitoring

Multiphase Motor Control

Use Scenario: Sampling photodiode current or laser bias voltage in transceivers for real-time power and distortion monitoring.

IC Role / Device Role / Timing Role: Differential ADC rejecting common-mode noise from high-speed digital lanes adjacent to analog signal paths on dense PCBs.

Use Value: 85 dB CMRR and wide 0–VDD common-mode range allow direct connection to transimpedance amplifiers without level-shifting circuitry.

Use Scenario: Simultaneous current sensing across three motor phases in servo drives using isolated sigma-delta modulators and sinc filters.

IC Role / Device Role / Timing Role: Precision ADC receiving filtered analog outputs from isolators, providing 14-bit resolution for field-oriented control (FOC) algorithms.

Use Value: 250 µV LSB step size (at 4.096 V ref) resolves sub-milliohm shunt voltage drops, enabling torque ripple reduction below 0.5%.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed SAR ADC applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADS8860IDRCT	16-bit, 1 Msps, SPI-only CMOS interface, no internal reference, 1.8 V supply only	Higher resolution but half the speed; requires external reference and level-shifting for 3.3/5 V systems	Select when ENOB >14.5 bits is mandatory and 1 Msps suffices; avoid if LVDS noise immunity or integrated reference is needed.
AD7960BCPZ-RL	18-bit, 5 Msps, LVDS-only interface, 5 V supply, external reference required	Higher speed/resolution but larger 32-lead LFCSP package and 5× higher power (150 mW)	Select for ultra-high-precision oscilloscope front-ends; avoid for space-constrained or thermally limited industrial modules.

Compared with ADS8860IDRCT and AD7960BCPZ-RL, the LTC2310IMSE-14#PBF uniquely balances 2 Msps throughput, integrated 4.096 V reference, LVDS/CMOS flexibility, and MSOP-16 footprint-making it optimal for cost-sensitive, high-channel-count DAQ systems where board area and reference design effort are constrained.

Availability

LTC2310IMSE-14#PBF is available at Aetrix Electronics and suitable for high-speed data acquisition systems, automotive sensor interfaces, and optical networking monitoring requiring stable component supply across extended temperature ranges.

Supply support for LTC2310IMSE-14#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.

The LTC2310IMSE-14#PBF belongs to ADI's precision SAR ADC product line, designed specifically for applications demanding high speed, low noise, and guaranteed monotonicity in harsh environments without external reference dependencies.

FAQ

What is the guaranteed integral nonlinearity (INL) specification for the LTC2310IMSE-14#PBF over its full operating temperature range?

The LTC2310IMSE-14#PBF guarantees ±2.5 LSB INL over its full operating temperature range of –40°C to +85°C. This specification ensures monotonic behavior and accurate end-point linearity without calibration, critical for closed-loop control and metrology applications where code consistency directly impacts system accuracy. The value is tested and specified per the datasheet's electrical characteristics table under "Integral Linearity Error" with the "l" symbol denoting full-temperature-range applicability.

Does the LTC2310IMSE-14#PBF support both CMOS and LVDS digital interfaces, and how is the mode selected?

Yes, the LTC2310IMSE-14#PBF supports both CMOS and LVDS serial interfaces via the CMOS/LVDS pin (Pin 10). Grounding this pin selects CMOS mode; tying it to OVDD selects standard LVDS mode; leaving it floating enables low-power LVDS mode. This configurability allows designers to optimize for EMI immunity (LVDS) or power efficiency (CMOS) without changing the PCB layout, and the LTC2310IMSE-14#PBF maintains full 2 Msps throughput in either mode.

What reference voltage options does the LTC2310IMSE-14#PBF provide, and can an external reference be used?

The LTC2310IMSE-14#PBF provides an internal 4.096 V (or 2.048 V) temperature-compensated reference with ≤20 ppm/°C drift. An external reference can be used by grounding the REFIN pin (Pin 2), which disables the internal REFOUT buffer and allows an external source to drive REFOUT (Pin 3) within 1.25 V to VDD. This dual-reference capability gives designers flexibility to trade off BOM count (internal) versus ultimate accuracy (external) while maintaining the same LTC2310IMSE-14#PBF footprint and timing.

What power-saving modes are available on the LTC2310IMSE-14#PBF, and what are their typical current draws?

The LTC2310IMSE-14#PBF offers Nap and Sleep modes. In Nap mode (conversion complete), supply current drops to 2.8–4 mA at 3.3 V or 5 V. In Sleep mode, total current falls to 0.1–10 µA depending on supply voltage-enabling ultra-low-power wake-on-event architectures. These modes are controlled via the CNV pin sequence and reduce average power in duty-cycled systems without compromising the 2 Msps burst capability of the LTC2310IMSE-14#PBF during active periods.

Is the LTC2310IMSE-14#PBF pin-compatible with other members of the LTC2310 family, such as the LTC2310HMSE-14#PBF?

Yes, the LTC2310IMSE-14#PBF is pin-compatible with all variants in the LTC2310-14 family-including the LTC2310CMSE-14#PBF (0°C to 70°C) and LTC2310HMSE-14#PBF (–40°C to 125°C)-as they share identical 16-lead MSOP packaging, pinout, and electrical interface. This allows seamless grade upgrades within the same PCB design, with only the temperature qualification differing; the LTC2310IMSE-14#PBF is rated for –40°C to +85°C operation.

LTC2310IMSE-14#PBF Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: -

Package/Case:: 16-TFSOP (0.118", 3.00mm Width) Exposed Pad

Packaging:: Tube

Product Status:: Active

Number of Bits:: 14

Sampling Rate (Per Second):: 2M

Number of Inputs:: 1

Input Type:: Differential

Data Interface:: LVDS - Serial, Serial

Configuration:: S/H-ADC

Ratio - S/H:ADC:: 1:1

Number of A/D Converters:: 1

Architecture:: SAR

Reference Type:: External, Internal

Voltage - Supply, Analog:: 3.13V ~ 3.47V, 5V

Voltage - Supply, Digital:: 3.13V ~ 3.47V, 5V

Features:: -

Operating Temperature:: -40°C ~ 85°C

Supplier Device Package:: 16-MSOP-EP

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

LTC2310IMSE-14#PBF FAQ

1.How can I place an order for LTC2310IMSE-14#PBF through Aetrix?

Please submit a Request for Quotation (RFQ) for LTC2310IMSE-14#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LTC2310IMSE-14#PBF reliable?

The price and inventory of LTC2310IMSE-14#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2310IMSE-14#PBF is usually 5 days.

3.What payment methods are accepted for LTC2310IMSE-14#PBF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2310IMSE-14#PBF transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LTC2310IMSE-14#PBF?

LTC2310IMSE-14#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LTC2310IMSE-14#PBF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LTC2310IMSE-14#PBF?

For technical support, including LTC2310IMSE-14#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2310IMSE-14#PBF requirements.

6.How does Aetrix verify that LTC2310IMSE-14#PBF is sourced from the original manufacturer or authorized distributors?

All LTC2310IMSE-14#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2310IMSE-14#PBF meets industry standards.

7.What is the process for return or replacement of LTC2310IMSE-14#PBF?

All LTC2310IMSE-14#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2310IMSE-14#PBF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LTC2310IMSE-14#PBF part is unused and in its original packaging.

Return procedure for LTC2310IMSE-14#PBF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…