Analog Devices Inc. LTC2311IMSE-12#PBF

Overview

LTC2311IMSE-12#PBF from Analog Devices (formerly Linear Technology) is a 12-bit + sign successive approximation register (SAR) analog-to-digital converter with differential inputs, 5 Msps throughput, ±0.25 LSB typical INL, 73 dB SNR at 2.2 MHz, and integrated 4.096 V temperature-compensated reference. It operates from a single 3.3 V or 5 V supply and delivers 8 V_P-P differential input range with guaranteed no missing codes across –40°C to +85°C.

For engineers reviewing the LTC2311IMSE-12#PBF datasheet, LTC2311IMSE-12#PBF pinout, LTC2311IMSE-12#PBF application, or LTC2311IMSE-12#PBF equivalent, key selection criteria include its one-cycle latency SPI/LVDS interface, wide common-mode input range (0 V to V_DD), low-power nap/sleep modes, and dual-reference support (internal 4.096 V or external 1.25 V buffered input).

Technical Context

The LTC2311IMSE-12#PBF implements a 13-bit SAR architecture with two-phase operation: acquisition (sample capacitor connected to AIN+/AIN–) followed by conversion using a binary-weighted CDAC and differential comparator. Its transfer function outputs 13-bit two's complement codes-MSB indicating polarity-with full-scale span of ±REFOUT for fully differential mode.

It supports three I/O configurations via the CMOS/LVDS pin: CMOS (grounded), LVDS (tied to OVDD), or low-power LVDS (floating). The internal reference buffer provides 4.096 V (or 2.048 V at 3.3 V supply) with ≤20 ppm/°C drift, while REFIN accepts or sources 1.25 V for external reference use. Aperture jitter is 1 ps_RMS, enabling high-fidelity signal capture up to 10 MHz input bandwidth.

Key Specifications

Pinout & Package

Package: 16-lead plastic MSOP (4 mm × 5 mm), exposed pad (Pin 17) soldered to ground plane for thermal and electrical integrity. Operating temperature range: –40°C to +85°C (I-grade).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed SAR ADC applications.

Compared with ADS8860IDRCT and AD7961BCPZ, the LTC2311IMSE-12#PBF uniquely balances 5 Msps speed, integrated reference, dual-interface flexibility, and ultra-low sleep power-making it optimal for compact, thermally sensitive, or mixed-voltage embedded DAQ systems where layout reuse and supply simplicity are critical.

Availability

LTC2311IMSE-12#PBF is available at Aetrix Electronics and suitable for high-speed data acquisition systems, optical networking modules, remote sensor nodes, and multiphase motor control circuits requiring stable component supply across extended temperature ranges.

Supply support for LTC2311IMSE-12#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.

The LTC2311-12 product line was designed for precision, high-speed data acquisition in space- and power-constrained environments-emphasizing low-latency interfaces, integrated references, and robust operation from –40°C to +125°C.

FAQ

What is the operating temperature range for the LTC2311IMSE-12#PBF?

The LTC2311IMSE-12#PBF is rated for operation from –40°C to +85°C (I-grade). This is confirmed in the "Order Information" table of the datasheet, which explicitly lists "–40°C to 85°C" for part numbers including LTC2311IMSE-12#PBF. The device uses the same 16-lead MSOP package and internal silicon as other grades (C/H), differing only in screening and test conditions.

Does the LTC2311IMSE-12#PBF require an external reference?

No, the LTC2311IMSE-12#PBF does not require an external reference. It integrates a low-drift (≤20 ppm/°C) 4.096 V reference buffer (2.048 V at 3.3 V supply) on-chip. The REFIN pin provides a 1.25 V buffered output that can be used as an external reference source-or grounded to disable the internal REFOUT buffer and allow an external reference to drive REFOUT directly.

Can the LTC2311IMSE-12#PBF interface with both CMOS and LVDS logic families?

Yes, the LTC2311IMSE-12#PBF supports both CMOS and LVDS interfaces via the dedicated CMOS/LVDS pin (Pin 10). Grounding this pin configures CMOS I/O (single-ended SDO+/SCK+); tying it to OVDD enables LVDS mode (differential SDO+/SDO–, SCK+/SCK–); floating it activates low-power LVDS. This eliminates the need for separate part numbers or PCB revisions.

What is the minimum acquisition time required before conversion starts in the LTC2311IMSE-12#PBF?

The minimum acquisition time for the LTC2311IMSE-12#PBF is 38.1 ns, as specified in the "ADC Timing Characteristics" table under parameter t_ACQ. This value applies across the full operating temperature range and is independent of supply voltage or reference configuration. It defines the shortest time the sample capacitor needs to settle after CNV goes high before the falling edge initiates conversion.

How does the LTC2311IMSE-12#PBF handle pseudo-differential unipolar inputs?

The LTC2311IMSE-12#PBF handles pseudo-differential unipolar inputs natively: connect AIN– to GND and apply the signal to AIN+. This yields a 0 V to REFOUT input span and unipolar two's complement output codes (0x0000 to 0x0FFF). No configuration or register writes are needed-the ADC automatically adapts its transfer function, providing 12-bit resolution over the reduced span while retaining overrange digitization capability.