Analog Devices Inc. LTC2320CUKG-14#PBF
- Part No.:
- LTC2320CUKG-14#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 52-WFQFN Exposed Pad
- Datasheet:
-
LTC2320CUKG-14#PBF.pdf
- Description:
- IC ADC 14BIT SAR 52QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,004
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Product details
Overview
LTC2320CUKG-14#PBF from Analog Devices (formerly Linear Technology) is an octal, 14-bit + sign successive approximation register (SAR) analog-to-digital converter with simultaneous sampling across all eight differential input channels. It delivers 1.5 Msps per channel throughput, ±1 LSB INL typical, 81 dB SNR at 500 kHz, and operates from a single 3.3 V or 5 V supply. Its integrated 4.096 V/2.048 V temperature-compensated reference and wide common-mode input range make it ideal for high-fidelity data acquisition in multiphase motor control and optical networking systems.
For engineers reviewing the LTC2320CUKG-14#PBF datasheet, LTC2320CUKG-14#PBF pinout, LTC2320CUKG-14#PBF application, or LTC2320CUKG-14#PBF equivalent, key selection considerations include guaranteed 14-bit no-missing-codes performance, LVDS/CMOS serial interface flexibility, 52-lead QFN package thermal and layout constraints, and operation over 0°C to 70°C ambient - critical for industrial embedded signal chain design.
Technical Context
The LTC2320CUKG-14#PBF implements eight independent SAR ADC cores, each with true differential inputs, 8 VP-P full-scale range, and matched aperture delay (<500 ps). Its internal reference buffers (REFOUT1–4) support independent voltage scaling per channel group and can be disabled via REFBUFEN for external reference use.
It supports four digital I/O configurations: CMOS SDR/DDR (1.8 V–2.5 V OVDD), LVDS SDR/DDR (2.5 V OVDD), and low-power LVDS. Timing is synchronized via CNV-triggered acquisition and CLKOUT-matched readout, eliminating pipeline latency and enabling deterministic real-time sampling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit + sign with guaranteed no missing codes - ensures monotonicity and precision in closed-loop control feedback paths. |
| Sampling Rate | 1.5 Msps per channel, simultaneous across all 8 channels - enables time-aligned capture of multi-sensor or multi-phase waveforms without inter-channel skew. |
| SNR / THD | 81 dB SNR and –90 dB THD at 500 kHz input - supports high dynamic range measurement of clean sinusoidal or complex baseband signals. |
| INL / DNL | ±1 LSB typical INL and ±0.4 LSB typical DNL - meets stringent linearity requirements for precision instrumentation and calibration-critical applications. |
| Reference | Internal 4.096 V or 2.048 V, 20 ppm/°C max drift - eliminates need for external reference ICs while maintaining accuracy over temperature in compact layouts. |
| Power | 20 mW per channel at 1.5 Msps; 26 µW in sleep mode - balances high-speed performance with ultra-low idle power for energy-sensitive systems. |
| Supply | Single 3.3 V or 5 V VDD; 1.71 V–2.63 V OVDD - simplifies power architecture by avoiding dual-rail analog/digital supplies. |
Pinout & Package
Package: 52-lead (7 mm × 8 mm) plastic QFN with exposed pad (Pin 53 = GND), rated for 0°C to 70°C operation. Thermal resistance θJA = 31°C/W; exposed pad must be soldered to PCB ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN1+ / AIN1– to AIN8+ / AIN8– (Pins 1–2, 4–5, 10–11, 13–14, 16–17, 19–20, 47–48, 50–51) | Eight differential analog input pairs | Each pair accepts ±REFOUTx differential voltage (e.g., ±4.096 V); supports bipolar/unipolar true differential acquisition without configuration. |
| REFOUT1–4 (Pins 22, 9, 6, 45) | Independent reference buffer outputs | Provide dedicated 4.096 V references per ADC core group; disable via REFBUFEN to accept external 1.25 V–5 V references. |
| SDO1–SDO8 (Pins 27–30, 35–36, 39–40) or SDOA±/SDOB±/SDOC±/SDOD± (Pins 27–28, 29–30, 35–36, 39–40) | Serial data outputs | CMOS mode: 8 separate SDO lines (1 per channel); LVDS mode: 4 differential pairs (2 channels per pair) - enables scalable FPGA interface routing. |
| CNV (Pin 24) | Convert trigger input | Edge-triggered acquisition start; low-jitter OVDD-level pulse initiates simultaneous sampling and zero-latency conversion sequence. |
| CMOS/LVDS (Pin 25) & SDR/DDR (Pin 23) | I/O mode and data rate select | Hardware-configurable interface: CMOS/LVDS selects logic family; SDR/DDR selects clock edge usage - no firmware overhead for mode switching. |
Key Features
| Feature | Design Value |
|---|---|
| Simultaneous 8-channel sampling | Eliminates inter-channel timing skew - essential for phase-resolved analysis in motor control and coherent optical receivers. |
| Onboard 4.096 V/2.048 V reference with 20 ppm/°C drift | Reduces BOM count and layout area vs. discrete reference ICs while meeting <1 LSB error over 0°C–70°C. |
| LVDS or CMOS serial interface with DDR/SDR support | Enables high-speed, noise-immune data transfer to FPGAs at up to 105 MHz SCK (CMOS DDR) or 300 MHz effective rate (LVDS DDR). |
| Guaranteed 14-bit no missing codes | Ensures unambiguous code mapping across full input range - required for safety-critical position sensing and medical diagnostics. |
| Nap/sleep modes with 26 µW total current | Allows rapid wake-up (<50 ms REFOUT stabilization) and ultra-low standby power - extends battery life in portable test equipment. |
Applications
| Multiphase Motor Control | Optical Network Monitoring |
|---|---|
Use Scenario: Real-time acquisition of three-phase current/voltage waveforms plus auxiliary sensor signals (temperature, position) in servo drives. IC Role / Device Role / Timing Role: Simultaneous 8-channel sampling captures synchronized snapshots of all motor phases and sensors with sub-ns inter-channel matching. Use Value: Enables precise field-oriented control (FOC) and predictive maintenance analytics without time-interleaving artifacts or external synchronization circuitry. |
Use Scenario: Monitoring RF envelope and bias voltages across multiple laser diodes and modulators in coherent transceivers. IC Role / Device Role / Timing Role: High-SNR, low-THD digitization of DC-coupled photodiode outputs and analog monitor points at 1.5 Msps. Use Value: Supports closed-loop bias control with <0.01% gain stability and 81 dB dynamic range for detecting subtle optical power drifts. |
| High-Speed Data Acquisition Systems | Communications Baseband Processing |
Use Scenario: Modular DAQ modules for automated test equipment requiring 8-channel, 14-bit resolution at >1 MSPS per channel. IC Role / Device Role / Timing Role: Octal SAR ADC with deterministic latency and LVDS output reduces FPGA resource load versus time-interleaved alternatives. Use Value: Achieves 1.5 Msps/channel with no missing codes and ±1 LSB INL - meets IEEE 1241-compliant test system accuracy requirements. |
Use Scenario: Digitizing I/Q baseband signals from RF front-ends in software-defined radios and 5G small cells. IC Role / Device Role / Timing Role: Differential input structure rejects common-mode noise from mixed-signal PCBs; 55 MHz input bandwidth supports wideband IF sampling. Use Value: Delivers 81 dB SNR at 500 kHz - sufficient for 12-bit ENOB in 16-QAM demodulation with margin for analog front-end non-idealities. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar octal SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7606C-16 | 16-bit resolution, 1 MSPS/ch, internal 4.096 V ref, parallel/serial interface, 64-lead LQFP | Higher resolution but lower speed; parallel interface increases FPGA pin count vs. LVDS serial of LTC2320CUKG-14#PBF | Select for applications prioritizing resolution over speed and where board space allows larger package. |
| ADS8688 | 16-bit, 500 kSPS/ch, single-supply 5 V, SPI interface only, 64-lead TQFP | Half the throughput; no LVDS option; integrated PGA offers programmable gain but adds complexity | Select when gain flexibility is needed and 500 kSPS suffices, especially in cost-sensitive industrial PLC designs. |
Compared with AD7606C-16 and ADS8688, the LTC2320CUKG-14#PBF uniquely combines 1.5 Msps octal sampling, LVDS serial output, and 52-lead QFN packaging - optimizing for high-density, high-throughput FPGA-based systems where timing determinism and EMI resilience are critical.
Availability
LTC2320CUKG-14#PBF is available at Aetrix Electronics and suitable for multiphase motor control, optical network monitoring, and high-speed data acquisition systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for LTC2320CUKG-14#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC2320 series was designed specifically for demanding simultaneous-sampling applications in industrial automation, communications infrastructure, and test equipment - emphasizing low latency, channel matching, and flexible digital interfacing.
FAQ
What is the operating temperature range for the LTC2320CUKG-14#PBF?
The LTC2320CUKG-14#PBF is specified for operation from 0°C to 70°C ambient temperature. This commercial-grade rating aligns with its "C" suffix designation and is validated across all electrical parameters including INL, SNR, and reference drift. The device's thermal design - including 31°C/W θJA and mandatory exposed-pad grounding - ensures reliable performance within this range under typical PCB power dissipation conditions. For extended temperature operation, consider the I-grade (–40°C to 85°C) or H-grade (–40°C to 125°C) variants.
Does the LTC2320CUKG-14#PBF require an external reference?
No, the LTC2320CUKG-14#PBF integrates a low-drift, temperature-compensated 4.096 V or 2.048 V reference with ≤20 ppm/°C drift, eliminating the need for an external reference in most applications. REFBUFEN (Pin 43) controls internal buffer enable/disable: tie to VDD for internal reference use, or ground it to disable buffers and drive REFOUT1–4 pins with an external 1.25 V–5 V reference. This flexibility allows optimization between BOM simplicity and ultra-high-precision external references.
How does the LTC2320CUKG-14#PBF achieve simultaneous sampling across eight channels?
The LTC2320CUKG-14#PBF uses eight independent SAR ADC cores, each with its own sample-and-hold (S/H) circuit, all triggered synchronously by the CNV input. This architecture ensures true simultaneous acquisition - not time-interleaved sampling - with aperture delay matching <500 ps between channels. The result is zero inter-channel skew, enabling accurate phase difference measurement and coherent multi-sensor analysis without post-processing correction.
What digital interface options does the LTC2320CUKG-14#PBF support?
The LTC2320CUKG-14#PBF supports both CMOS and LVDS serial interfaces, selected via the CMOS/LVDS pin (Pin 25). Each mode supports Single Data Rate (SDR) or Double Data Rate (DDR), configured by the SDR/DDR pin (Pin 23). CMOS mode uses 8 individual SDO lines (1 per channel) with 1.8 V–2.5 V OVDD; LVDS mode uses 4 differential pairs (2 channels per pair) with 2.5 V OVDD and 100 Ω termination. This gives designers flexibility to match FPGA I/O standards and optimize for speed, power, or noise immunity.
Can the LTC2320CUKG-14#PBF operate from a 3.3 V supply?
Yes, the LTC2320CUKG-14#PBF is fully specified for operation from a single 3.3 V supply (VDD = 3.13 V to 3.47 V), delivering 1.5 Msps per channel, 81 dB SNR, and ±1 LSB INL typical. Power dissipation is 102 mW at 3.3 V/1.5 Msps (typical), dropping to 18 mW in nap mode and 20 µW in sleep mode. The 1.71 V–2.63 V OVDD range accommodates 1.8 V or 2.5 V I/O interfaces, making the LTC2320CUKG-14#PBF compatible with modern low-voltage FPGA and ASIC platforms.
LTC2320CUKG-14#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 52-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 1.5M
- Number of Inputs:
- 8
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel, SPI
- Configuration:
- S/H-MUX-ADC
- Ratio - S/H:ADC:
- 2:1
- Number of A/D Converters:
- 4
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3.13V ~ 3.47V, 5V
- Voltage - Supply, Digital:
- 3.13V ~ 3.47V, 5V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 52-QFN (7x8)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2320CUKG-14#PBF FAQ
1.How can I place an order for LTC2320CUKG-14#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2320CUKG-14#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2320CUKG-14#PBF reliable?
The price and inventory of LTC2320CUKG-14#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2320CUKG-14#PBF is usually 5 days.
3.What payment methods are accepted for LTC2320CUKG-14#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2320CUKG-14#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2320CUKG-14#PBF?
LTC2320CUKG-14#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2320CUKG-14#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2320CUKG-14#PBF?
For technical support, including LTC2320CUKG-14#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2320CUKG-14#PBF requirements.
6.How does Aetrix verify that LTC2320CUKG-14#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2320CUKG-14#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2320CUKG-14#PBF meets industry standards.
7.What is the process for return or replacement of LTC2320CUKG-14#PBF?
All LTC2320CUKG-14#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2320CUKG-14#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2320CUKG-14#PBF part is unused and in its original packaging.
Return procedure for LTC2320CUKG-14#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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