Analog Devices Inc. LTC2320IUKG-14#TRPBF
- Part No.:
- LTC2320IUKG-14#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 52-WFQFN Exposed Pad
- Datasheet:
-
LTC2320IUKG-14#TRPBF.pdf
- Description:
- IC ADC 14BIT SAR 52QFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,165
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Product details
Overview
LTC2320IUKG-14#TRPBF from Analog Devices (formerly Linear Technology) is an octal, 14-bit + sign successive approximation register (SAR) analog-to-digital converter with simultaneous sampling across eight differential input channels. It delivers 1.5 Msps per channel throughput, ±1 LSB INL typical, 81 dB SNR at 500 kHz, and operates from a single 3.3 V or 5 V supply. It is used in high-speed data acquisition systems requiring wide dynamic range and high common-mode rejection, such as multiphase motor control and optical networking.
For engineers reviewing the LTC2320IUKG-14#TRPBF datasheet, LTC2320IUKG-14#TRPBF pinout, LTC2320IUKG-14#TRPBF application, or LTC2320IUKG-14#TRPBF equivalent, key selection considerations include guaranteed 14-bit no-missing-codes operation, internal 2.048 V / 4.096 V temperature-compensated reference, CMOS/LVDS SPI-compatible serial interface, and operation over –40°C to +85°C.
Technical Context
The LTC2320IUKG-14#TRPBF implements eight independent SAR ADC cores with true differential inputs, each supporting ±REFOUTx full-scale ranges (REFOUT1–4 configurable to 2.048 V or 4.096 V). Its simultaneous sampling architecture ensures precise phase alignment across all eight channels without inter-channel skew.
It supports four digital I/O modes-CMOS SDR/DDR and LVDS SDR/DDR-with selectable OVDD (1.71 V–2.63 V) and dual supply domains (VDD for analog core, OVDD for interface). The onboard reference buffers are individually controllable via REFBUFEN, enabling flexible external reference integration while maintaining 20 ppm/°C max drift.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit + sign - delivers 32,768 quantization levels with bipolar signed output format. |
| Sampling Rate | 1.5 Msps per channel - enables real-time capture of signals up to ~750 kHz Nyquist bandwidth. |
| INL | ±1 LSB typical - ensures monotonicity and accurate end-point linearity for precision measurement. |
| SNR | 81 dB at fIN = 500 kHz - supports >13.2 ENOB for high-fidelity signal reconstruction. |
| Input Range | 8 VP-P differential with wide common-mode range (0 V to VDD) - accommodates industrial sensor outputs and amplifier stages without level-shifting. |
| Reference | Internal 2.048 V / 4.096 V, 20 ppm/°C max drift - eliminates need for external precision reference in most applications. |
| Power | 20 mW per channel at 1.5 Msps - enables dense multi-channel systems with thermal manageability. |
| Operating Temp | –40°C to +85°C - qualified for industrial and extended-temperature embedded environments. |
Pinout & Package
Package: 52-lead (7 mm × 8 mm) plastic QFN with exposed pad (Pin 53 = GND), RoHS-compliant, lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN1+ / AIN1– to AIN8+ / AIN8– (Pins 1–2, 4–5, 10–11, 13–14, 16–17, 19–20, 47–48, 50–51) | Eight differential analog inputs | Each pair accepts ±REFOUTx full-scale differential voltage; supports true bipolar/unipolar/arbitrary input configurations without reconfiguration. |
| REFOUT1–REFOUT4 (Pins 22, 9, 6, 45) | Independent reference buffer outputs | Each drives one ADC quadrant (CH1–2, CH3–4, CH5–6, CH7–8); can be disabled via REFBUFEN to accept external references (1.25 V–5 V). |
| SDO1–SDO8 (Pins 27–30, 35–36, 39–40) or SDOA±/SDOB±/SDOC±/SDOD± (Pins 27–28, 29–30, 35–36, 41–42) | Serial data outputs | CMOS mode: eight dedicated SDO lines (1 per channel); LVDS mode: four differential pairs (2 channels per pair) - reduces PCB routing complexity in high-density layouts. |
| SCK (Pin 41), CNV (Pin 24), SDR/DDR (Pin 23), CMOS/LVDS (Pin 25) | Digital control and clocking | Configurable interface timing: SDR/DDR selects data rate; CMOS/LVDS selects logic family; CNV edge initiates conversion with zero-latency readout. |
| OVDD (Pins 31, 37), VDD (Pins 15, 21, 44, 52), GND (Pins 3, 7, 12, 18, 26, 32, 38, 46, 49), Exposed Pad (Pin 53) | Power and grounding | Dual-supply isolation improves noise immunity; exposed pad must be soldered to solid ground plane for thermal and EMI performance. |
Key Features
| Feature | Design Value |
|---|---|
| Simultaneous sampling across 8 channels | Eliminates inter-channel timing skew - critical for phase-sensitive applications like motor current vector analysis and beamforming. |
| Onboard 2.048 V / 4.096 V reference with 20 ppm/°C max drift | Reduces BOM count and layout area while maintaining accuracy over industrial temperature range without calibration. |
| CMOS or LVDS SPI-compatible serial interface | Enables direct FPGA/CPU interfacing at up to 105 MHz (CMOS SDR) or low-noise differential signaling (LVDS) - adaptable to system-level noise constraints. |
| Nap and sleep modes | Reduces power to 6.2 mA (nap) or 20 µA (sleep) - extends uptime in battery-backed or intermittent-acquisition systems. |
| Guaranteed 14-bit no missing codes | Ensures deterministic digital output behavior across full operating range - essential for closed-loop control and safety-critical monitoring. |
| True differential inputs with 102 dB CMRR at 500 kHz | Rejects common-mode noise from noisy industrial environments (e.g., VFDs, switching PSUs) without external instrumentation amplifiers. |
Applications
| High-Speed Data Acquisition | Optical Networking |
|---|---|
Use Scenario: Real-time digitization of multi-sensor vibration, strain, and temperature arrays in predictive maintenance systems. IC Role / Device Role / Timing Role: Simultaneous sampling ADC capturing synchronized waveforms from eight transducers at 1.5 Msps/channel with sub-ns aperture matching. Use Value: Enables time-of-flight analysis and coherent averaging across channels, improving SNR by up to 9 dB versus sequential sampling. | Use Scenario: Monitoring forward/backward optical power and bias currents in DWDM transceivers and ROADMs. IC Role / Device Role / Timing Role: Eight-channel monitor ADC acquiring photodiode and TEC driver telemetry with precise inter-channel timing alignment. Use Value: Supports closed-loop power stabilization and wavelength drift compensation using correlated multi-parameter feedback. |
| Multiphase Motor Control | Communications Test Equipment |
Use Scenario: Sampling three-phase stator currents plus auxiliary voltages (DC bus, rotor position, temperature) in servo drives and inverters. IC Role / Device Role / Timing Role: Simultaneous acquisition of all current/voltage sensing nodes to reconstruct instantaneous torque and flux vectors. Use Value: Eliminates phase error in field-oriented control (FOC), improving efficiency and reducing torque ripple by >15%. | Use Scenario: Digitizing RF IF signals and baseband I/Q paths in 5G NR and DOCSIS 4.0 test receivers. IC Role / Device Role / Timing Role: High-SNR, low-latency ADC front-end for multi-channel signal analyzers and vector signal analyzers. Use Value: Delivers 81 dB SNR and –90 dB THD at 500 kHz - sufficient for ACLR and EVM measurements on 1024-QAM waveforms. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar octal, high-speed SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7606C-16 | 16-bit resolution, 1 MSPS/channel, internal reference (4.096 V), parallel/serial interface, same QFN-64 package but different pinout | Higher resolution but lower speed; lacks LVDS option and simultaneous sampling guarantee across all 8 channels | Select when ENOB >14.5 is required and 1 MSPS suffices; verify layout compatibility due to non-pin-compatible footprint. |
| ADS8688 | 16-bit, 500 kSPS/channel, integrated programmable gain amplifier (PGA), SPI-only interface, 64-pin TQFP | Slower speed, PGA enables direct sensor interfacing but adds gain error and settling overhead | Choose for mixed-signal systems needing on-chip signal conditioning; avoid where >1 MSPS or strict phase coherence is mandatory. |
Compared with AD7606C-16 and ADS8688, the LTC2320IUKG-14#TRPBF uniquely combines 1.5 Msps simultaneous sampling, 81 dB SNR, and LVDS/CMOS interface flexibility in a thermally optimized 52-lead QFN - making it optimal for space-constrained, high-bandwidth industrial DAQ where timing fidelity and noise immunity are prioritized over raw resolution.
Availability
LTC2320IUKG-14#TRPBF is available at Aetrix Electronics and suitable for high-speed data acquisition systems, optical networking modules, multiphase motor control drives, and communications test equipment requiring stable component supply across industrial temperature ranges.
Supply support for LTC2320IUKG-14#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC2320 series was designed by Analog Devices to address demanding high-channel-count, high-speed data acquisition needs - delivering simultaneous sampling, low power, and flexible digital interfacing in compact packages for next-generation test, control, and sensing platforms.
FAQ
What is the guaranteed operating temperature range for the LTC2320IUKG-14#TRPBF?
The LTC2320IUKG-14#TRPBF is specified for operation from –40°C to +85°C (Industrial grade). This is confirmed in the Absolute Maximum Ratings table and Order Information section, where "I" denotes the Industrial temperature grade. It maintains full performance-including ±1 LSB INL, 81 dB SNR, and 1.5 Msps throughput-across this entire range.
Does the LTC2320IUKG-14#TRPBF require an external reference, or does it include an internal one?
The LTC2320IUKG-14#TRPBF includes an internal, temperature-compensated reference with nominal outputs of 2.048 V or 4.096 V across four buffered pins (REFOUT1–4). The reference drift is guaranteed ≤20 ppm/°C. External references (1.25 V–5 V) may be used by disabling internal buffers via the REFBUFEN pin, but they are not required for standard operation.
How many analog input channels does the LTC2320IUKG-14#TRPBF support, and are they sampled simultaneously?
The LTC2320IUKG-14#TRPBF supports eight fully differential analog input channels (AIN1+/- through AIN8+/-), and all eight channels are sampled simultaneously. This is explicitly stated in the Features list ("Eight Simultaneously Sampling Channels") and confirmed in the Typical Application diagram and Pin Functions description, ensuring zero inter-channel skew for phase-coherent acquisition.
What digital interface options does the LTC2320IUKG-14#TRPBF support, and how are they configured?
The LTC2320IUKG-14#TRPBF supports both CMOS and LVDS serial interfaces, selectable via the CMOS/LVDS pin (Pin 25). It further supports Single Data Rate (SDR) or Double Data Rate (DDR) modes via the SDR/DDR pin (Pin 23). In CMOS mode, eight dedicated SDO pins provide per-channel data; in LVDS mode, four differential pairs carry two channels each, reducing interface routing density.
What power-saving modes are available on the LTC2320IUKG-14#TRPBF, and what are their typical current draws?
The LTC2320IUKG-14#TRPBF offers Nap Mode (5.3–6.2 mA total supply current) and Sleep Mode (20–110 µA total supply current), both entered via control of the CNV and interface timing. These modes reduce power during idle periods while retaining configuration state - enabling rapid wake-up (<50 ms REFOUT wake-up time) without full reinitialization. Power dissipation is 20 mW per channel in active 1.5 Msps operation.
LTC2320IUKG-14#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 52-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 1.5M
- Number of Inputs:
- 8
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel, SPI
- Configuration:
- S/H-MUX-ADC
- Ratio - S/H:ADC:
- 2:1
- Number of A/D Converters:
- 4
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3.13V ~ 3.47V, 5V
- Voltage - Supply, Digital:
- 3.13V ~ 3.47V, 5V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 52-QFN (7x8)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2320IUKG-14#TRPBF FAQ
1.How can I place an order for LTC2320IUKG-14#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2320IUKG-14#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2320IUKG-14#TRPBF reliable?
The price and inventory of LTC2320IUKG-14#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2320IUKG-14#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC2320IUKG-14#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2320IUKG-14#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2320IUKG-14#TRPBF?
LTC2320IUKG-14#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2320IUKG-14#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2320IUKG-14#TRPBF?
For technical support, including LTC2320IUKG-14#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2320IUKG-14#TRPBF requirements.
6.How does Aetrix verify that LTC2320IUKG-14#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC2320IUKG-14#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2320IUKG-14#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC2320IUKG-14#TRPBF?
All LTC2320IUKG-14#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2320IUKG-14#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2320IUKG-14#TRPBF part is unused and in its original packaging.
Return procedure for LTC2320IUKG-14#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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