Analog Devices Inc. LTC2323CUFD-12#TRPBF
- Part No.:
- LTC2323CUFD-12#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LTC2323CUFD-12#TRPBF.pdf
- Description:
- IC ADC 12BIT SAR 28QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,697
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC2323CUFD-12#TRPBF from Analog Devices is a dual-channel, 12-bit + sign successive approximation register (SAR) analog-to-digital converter with differential inputs, 5 Msps per channel throughput, ±0.5 LSB typical INL, 73 dB SNR at 2 MHz input, and wide 0 V to VDD common mode input range. It operates from single 3.3 V or 5 V supply, integrates low-drift 2.048 V/4.096 V internal reference, and supports CMOS or LVDS serial interface - ideal for high-speed data acquisition in optical networking and motor control systems.
For engineers reviewing the LTC2323CUFD-12#TRPBF datasheet, LTC2323CUFD-12#TRPBF pinout, LTC2323CUFD-12#TRPBF application, or LTC2323CUFD-12#TRPBF equivalent, key selection considerations include guaranteed 12-bit no-missing-codes performance, one-cycle latency, 5 Msps dual-channel sampling, LVDS/CMOS I/O flexibility, and operation up to 125°C - all in a compact 28-lead 4 mm × 5 mm QFN package.
Technical Context
The LTC2323CUFD-12#TRPBF implements a dual SAR architecture with independent sample-and-hold circuits per channel, enabling simultaneous sampling and one-cycle latency conversion. Its differential input stage accepts ±REFOUT full-scale range (±4.096 V or ±2.048 V) while supporting common mode voltages from 0 V to VDD - eliminating need for external level-shifting in bipolar signal chains.
It features a temperature-compensated internal reference (20 ppm/°C max drift), programmable I/O voltage support (1.8 V to 2.5 V), and dual-mode digital interface: CMOS (single-ended SDO/CLKOUT/SCK) or LVDS (differential SDO1±/SDO2±/CLKOUT±/SCK±), with dedicated CMOS/LVDS pin control and low-power LVDS option.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit + sign (13-bit two's complement output), delivering 1 mV LSB step with 4.096 V reference. |
| Throughput Rate | 5 Msps per channel, enabling real-time capture of signals up to 10 MHz –3 dB bandwidth. |
| INL | ±0.5 LSB typical, ensuring monotonicity and <0.012% full-scale linearity error for precision control loops. |
| SNR / THD | 73 dB SNR and –85 dB THD at 2 MHz input, supporting high-fidelity digitization in communications and imaging. |
| Supply & I/O | Single 3.3 V or 5 V analog supply; 1.8 V–2.5 V I/O voltage (OVDD); 38 mW/ch typical power at 5 V / 5 Msps. |
| Operating Temp | Guaranteed operation from –40°C to +125°C (H-grade), suitable for under-hood automotive and industrial environments. |
| Reference | Internal 2.048 V or 4.096 V buffer (20 ppm/°C max drift); externally overridable via REFINT pin. |
Pinout & Package
Package: 28-lead (4 mm × 5 mm) QFN with exposed pad (Pin 29), RoHS-compliant, moisture-sensitive level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Pins 1, 8) | Analog power supply | Single 3.3 V or 5 V supply for ADC core and reference; requires local 10 µF + 0.1 µF bypassing. |
| AIN1+/AIN1–, AIN2+/AIN2– (Pins 6,7,2,3) | Differential analog inputs | Two independent 8 VP-P differential channels; support fully differential, pseudo-differential unipolar/bipolar modes without configuration. |
| CNV (Pin 9) | Conversion start trigger | Falling-edge–sensitive; initiates hold-and-convert sequence with one-cycle latency; requires low-jitter clock source. |
| REFOUT1/REFOUT2 (Pins 12, 26) | Reference outputs | Nominally 4.096 V (or 2.048 V); buffered, temperature-compensated; disable via REFINT = GND for external reference use. |
| CMOS/LVDS (Pin 25) | I/O interface mode select | GND = CMOS; OVDD = LVDS; floating = low-power LVDS - configures SDO/CLKOUT/SCK pin behavior and drive strength. |
| SDO1+/SDO1–, SDO2+/SDO2– (Pins 15,16,19,20) | Serial data outputs | Dual-channel MSB-first output: CMOS mode uses SDOx+ only; LVDS mode requires 100 Ω differential termination at receiver. |
| CLKOUT+/CLKOUT– (Pins 17,18) | Skew-matched output clock | Provides phase-aligned clock for latching SDO data; eliminates timing margin loss in FPGA-based receivers. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 5 Msps SAR architecture | Enables synchronized, high-throughput sampling of two analog signals with deterministic one-cycle latency - critical for closed-loop control and time-of-flight measurement. |
| Wide common mode input range (0 V to VDD) | Accepts input signals referenced to arbitrary DC offsets without external op-amp level-shifting, reducing BOM count and layout complexity in sensor interfaces. |
| Flexible reference system | On-chip 2.048 V/4.096 V reference with 20 ppm/°C max drift; disableable for external reference use - supports both precision metrology and cost-sensitive designs. |
| LVDS/CMOS dual-mode interface | Reduces EMI and improves noise immunity in noisy industrial environments (LVDS), while retaining compatibility with legacy CMOS FPGAs and microcontrollers. |
| Low-power nap/sleep modes | Reduces current to 2.85 mA (nap) or 1 µA (sleep), enabling duty-cycled acquisition in battery-powered remote data loggers without sacrificing wake-up speed. |
Applications
| Optical Networking Monitoring | Multiphase Motor Control |
|---|---|
|
Use Scenario: Real-time monitoring of laser bias current and photodiode feedback in 100G/400G transceivers. IC Role / Device Role / Timing Role: Dual-channel ADC digitizes synchronized current and voltage sense signals at 5 Msps to detect fast transients and maintain loop stability. Use Value: 73 dB SNR and 5 Msps throughput enable accurate detection of sub-mA current steps within 200 ns, improving link reliability and thermal management. |
Use Scenario: Closed-loop field-oriented control (FOC) of three-phase PMSM/BLDC motors using shunt-based current sensing. IC Role / Device Role / Timing Role: Simultaneous sampling of two phase currents with one-cycle latency ensures precise torque calculation and minimizes current ripple. Use Value: ±0.5 LSB INL and wide common mode range allow direct connection to low-side shunts without gain/level-shift stages, reducing component count and PCB area. |
| High-Speed Remote Data Acquisition | Imaging Signal Digitization |
|
Use Scenario: Distributed vibration and temperature sensing in oil & gas pipeline SCADA systems with long cable runs. IC Role / Device Role / Timing Role: Converts differential sensor outputs (e.g., IEPE accelerometers) while rejecting common-mode noise induced over 100 m twisted-pair cables. Use Value: 85 dB CMRR and 0–VDD common mode range eliminate need for isolated front-end amplifiers, lowering system cost and power consumption. |
Use Scenario: Digitizing analog outputs from CCD/CMOS image sensors in medical endoscopes and industrial machine vision cameras. IC Role / Device Role / Timing Role: Captures high-fidelity pixel data at >4 Msps per channel with minimal harmonic distortion for accurate grayscale reproduction. Use Value: –85 dB THD and 73 dB SNR preserve fine image detail and contrast, enabling reliable defect detection in automated optical inspection (AOI). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, high-speed SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7322BRUZ | 12-bit, dual, ±10 V/±5 V/±2.5 V/0–10 V software-selectable input ranges; 1 MSPS; internal reference only (2.5 V); CMOS-only interface. | Lower speed and fixed 2.5 V reference limit dynamic range flexibility; lacks LVDS interface and wide common mode support. | Select when lower cost and simpler interface are prioritized over speed, noise, and input flexibility. |
| ADS8862IDRCT | 16-bit, single-channel, 1 MSPS, SPI interface; 92 dB SNR; external reference required; 1.8 V I/O only. | Higher resolution but half the throughput and no dual-channel capability; requires external reference design and additional channel multiplexing. | Select when absolute precision outweighs multi-channel synchronization and system-level integration simplicity. |
Compared with AD7322BRUZ and ADS8862IDRCT, the LTC2323CUFD-12#TRPBF uniquely delivers dual 5 Msps sampling, integrated flexible reference, LVDS/CMOS interface, and 0–VDD common mode range - making it optimal for time-critical, noise-immune, space-constrained applications where channel correlation and low-latency response are essential.
Availability
LTC2323CUFD-12#TRPBF is available at Aetrix Electronics and suitable for high-speed data acquisition systems, optical networking equipment, and multiphase motor control applications requiring stable component supply, extended temperature operation, and long-term production continuity.
Supply support for LTC2323CUFD-12#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets with precision data conversion and power management solutions.
The LTC2323CUFD-12#TRPBF belongs to Analog Devices' high-speed precision SAR ADC product line, designed specifically for applications demanding simultaneous sampling, low latency, excellent dynamic performance, and robust operation in harsh thermal environments.
FAQ
What is the maximum operating temperature for LTC2323CUFD-12#TRPBF?
The LTC2323CUFD-12#TRPBF is rated for operation from –40°C to +125°C (H-grade), with full electrical specifications guaranteed across this range. This makes LTC2323CUFD-12#TRPBF suitable for under-hood automotive modules, industrial drives, and downhole oilfield equipment where ambient temperatures exceed standard commercial limits.
Does LTC2323CUFD-12#TRPBF require an external reference?
No, LTC2323CUFD-12#TRPBF includes an internal, low-drift (20 ppm/°C max) reference buffer that outputs either 2.048 V or 4.096 V. The internal reference can be disabled by grounding the REFINT pin, allowing use of an external reference between 1.25 V and VDD - giving designers flexibility for metrology-grade accuracy or cost-optimized designs.
How does the CMOS/LVDS pin (Pin 25) affect LTC2323CUFD-12#TRPBF interface operation?
The CMOS/LVDS pin on LTC2323CUFD-12#TRPBF selects the digital interface mode: grounded for CMOS (single-ended SDO/CLKOUT/SCK), tied to OVDD for standard LVDS, or left floating for low-power LVDS. This setting determines driver strength, termination requirements, and pin usage - e.g., SDO1– and CLKOUT– become active only in LVDS modes, and must be terminated with 100 Ω differential loads.
Can LTC2323CUFD-12#TRPBF accept single-ended input signals?
Yes, LTC2323CUFD-12#TRPBF supports pseudo-differential unipolar and bipolar configurations without hardware changes. For single-ended signals, connect the reference (e.g., ground or mid-supply) to one AIN pin and the signal to the other - leveraging the device's 85 dB CMRR and 0–VDD common mode range to reject noise and simplify front-end design.
What power-saving modes does LTC2323CUFD-12#TRPBF support?
LTC2323CUFD-12#TRPBF offers three low-power states: normal (38 mW/ch @ 5 V), nap mode (2.85–5 mA total supply current after conversion), and sleep mode (1–5 µA). Sleep mode retains register settings and reference state, enabling wake-up in <10 ms - ideal for battery-powered remote sensors and intermittent acquisition systems using LTC2323CUFD-12#TRPBF.
LTC2323CUFD-12#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 5M
- Number of Inputs:
- 2
- Input Type:
- Differential, Pseudo-Differential
- Data Interface:
- LVDS - Serial, Serial
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3.13V ~ 3.47V, 5V
- Voltage - Supply, Digital:
- 3.13V ~ 3.47V, 5V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 28-QFN (4x5)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2323CUFD-12#TRPBF FAQ
1.How can I place an order for LTC2323CUFD-12#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2323CUFD-12#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2323CUFD-12#TRPBF reliable?
The price and inventory of LTC2323CUFD-12#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2323CUFD-12#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC2323CUFD-12#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2323CUFD-12#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2323CUFD-12#TRPBF?
LTC2323CUFD-12#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2323CUFD-12#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2323CUFD-12#TRPBF?
For technical support, including LTC2323CUFD-12#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2323CUFD-12#TRPBF requirements.
6.How does Aetrix verify that LTC2323CUFD-12#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC2323CUFD-12#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2323CUFD-12#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC2323CUFD-12#TRPBF?
All LTC2323CUFD-12#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2323CUFD-12#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2323CUFD-12#TRPBF part is unused and in its original packaging.
Return procedure for LTC2323CUFD-12#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC2323CUFD-12#TRPBF Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

