Analog Devices Inc. LTC2323HUFD-12#PBF
- Part No.:
- LTC2323HUFD-12#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LTC2323HUFD-12#PBF.pdf
- Description:
- IC ADC 12BIT SAR 28QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,503
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Product details
Overview
LTC2323HUFD-12#PBF from Analog Devices is a dual-channel, 12-bit + sign successive approximation register (SAR) analog-to-digital converter with differential inputs, 5 Msps per channel throughput, ±0.5 LSB typical INL, 73 dB SNR at 2 MHz input, and guaranteed operation up to 125°C. It integrates dual low-drift internal references (2.048 V or 4.096 V), supports CMOS or LVDS serial interface, and targets high-speed data acquisition in harsh thermal environments.
For engineers reviewing the LTC2323HUFD-12#PBF datasheet, LTC2323HUFD-12#PBF pinout, LTC2323HUFD-12#PBF application, or LTC2323HUFD-12#PBF equivalent, key selection considerations include its dual-channel 5 Msps timing, wide common-mode input range (0 V to VDD), 1.8 V–2.5 V I/O voltage compatibility, and support for both internal reference and external reference configurations without hardware reconfiguration.
Technical Context
The LTC2323HUFD-12#PBF implements a dual SAR architecture with independent sample-and-hold circuits per channel, enabling simultaneous sampling and one-cycle latency conversion. Its differential input stage accepts 8 VP-P full-scale swing with common-mode range spanning 0 V to VDD, and features integrated 20 ppm/°C max drift reference buffers for REFOUT1 and REFOUT2.
Digital interface flexibility includes selectable CMOS or LVDS mode via the CMOS/LVDS pin, with skew-matched CLKOUT+/- outputs for deterministic data capture. The device supports nap and sleep modes, achieving 5 μW total sleep current, and operates from single 3.3 V or 5 V analog supply with separate 1.71 V–2.63 V OVDD for I/O domain control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit + sign (13-bit two's complement output), delivering 213 codes across full-scale span of ±REFOUT. |
| Throughput Rate | 5 Msps per channel, enabling real-time digitization of signals up to 10 MHz –3 dB input bandwidth. |
| INL | ±0.5 LSB typical, ensuring monotonicity and no missing codes across temperature (–40°C to +125°C). |
| SNR / THD | 73 dB SNR and –85 dB THD at fIN = 2 MHz, supporting high-fidelity signal reconstruction in communications and imaging. |
| Reference | Internal 2.048 V or 4.096 V temperature-compensated reference, 20 ppm/°C max drift, with external reference option via REFINT pin. |
| Supply & Power | Single 3.3 V or 5 V VDD; 38 mW/ch typical power at 5 Msps (5 V); sleep mode draws only 5 μW total. |
| I/O Voltage | 1.8 V to 2.5 V OVDD-compatible digital interface, supporting direct connection to modern FPGA and ASIC I/O banks. |
Pinout & Package
Package: 28-lead (4 mm × 5 mm) QFN with exposed pad (Pin 29), rated for operation from –40°C to +125°C (H-grade).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Pins 1, 8) | Analog power supply | Single 3.3 V or 5 V supply; requires local 10 µF + 0.1 µF ceramic bypassing; pins must be shorted and driven from same source. |
| AIN1+/AIN1–, AIN2+/AIN2– (Pins 6,7,2,3) | Differential analog inputs | Support fully differential, pseudo-differential unipolar/bipolar modes; common-mode range 0 V to VDD; no configuration required. |
| CNV (Pin 9) | Conversion start trigger | Falling-edge–sensitive; initiates hold phase and conversion; requires low-jitter clock referenced to OVDD logic levels. |
| REFOUT1/REFOUT2 (Pins 12, 26) | Reference buffer outputs | Nominally 4.096 V (or 2.048 V); each referenced to respective REFRTN pin; disable via REFINT = GND for external reference use. |
| SDO1+/SDO1–, SDO2+/SDO2– (Pins 15,16,19,20) | Serial data outputs | MSB-first, SPI-compatible; CMOS mode uses SDOx+ only; LVDS mode requires 100 Ω differential termination at receiver. |
| CLKOUT+/CLKOUT– (Pins 17,18) | Skew-matched clock outputs | Phase-aligned with SDO for reliable latch timing; CMOS mode uses CLKOUT+ only; LVDS mode requires 100 Ω termination. |
| SCK+/SCK– (Pins 21,22) | Serial clock inputs | Falling-edge–driven; CMOS mode uses SCK+ only; LVDS mode requires differential 100 Ω drive at ADC side. |
| CMOS/LVDS (Pin 25) | I/O interface mode select | GND = CMOS; OVDD = LVDS; floating = low-power LVDS; determines logic family and power consumption profile. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent SAR cores | Enables true simultaneous sampling of two channels with one-cycle latency-critical for phase-sensitive motor control and I/Q demodulation. |
| Wide analog input common-mode range | 0 V to VDD allows direct interfacing with op-amp drivers, isolated amplifiers, or sensor front-ends without level-shifting circuitry. |
| Flexible reference architecture | On-chip 2.048 V/4.096 V buffers with <20 ppm/°C drift; disable via REFINT to accept external 1.25 V–VDD references for system-level calibration. |
| LVDS or CMOS serial interface | Reduces EMI and enables long trace routing in noisy industrial environments; low-power LVDS mode further cuts interface power by ~30%. |
| Ultra-low sleep power | 5 μW total sleep current extends battery life in portable DAQ systems and enables rapid wake-up (<10 ms REFOUT wakeup) for burst-mode acquisition. |
Applications
| High-Speed Data Acquisition | Optical Networking |
|---|---|
|
Use Scenario: Digitizing multi-channel sensor outputs (e.g., strain gauges, accelerometers) in real time within compact industrial edge nodes. IC Role / Device Role / Timing Role: Dual-channel 5 Msps ADC captures synchronized waveforms with <500 ps aperture matching, preserving phase coherence between channels. Use Value: Eliminates need for external multiplexing or multiple single-channel ADCs, reducing BOM count and PCB area while maintaining timing integrity. |
Use Scenario: Monitoring laser bias current and photodiode feedback in coherent optical transceivers requiring precise analog telemetry. IC Role / Device Role / Timing Role: High-SNR, low-THD digitization of DC-coupled analog monitor signals with wide common-mode rejection against supply noise. Use Value: Enables closed-loop laser control with <1 LSB offset stability over temperature, improving wavelength accuracy and link margin. |
| Multiphase Motor Control | Remote Data Acquisition |
|
Use Scenario: Sampling current and voltage feedback from three-phase inverters in servo drives operating at ambient temperatures up to 125°C. IC Role / Device Role / Timing Role: Dual-channel simultaneous sampling of phase currents with 12-bit + sign resolution for vector control algorithms. Use Value: Guarantees no missing codes and ±0.5 LSB INL across full industrial temperature range, ensuring torque ripple remains below specification limits. |
Use Scenario: Deploying ruggedized field DAQ units in oil/gas wellheads or wind turbine nacelles where ambient temperature exceeds 105°C. IC Role / Device Role / Timing Role: High-reliability ADC with H-grade qualification (–40°C to +125°C) and low-drift internal reference for unattended long-term monitoring. Use Value: Removes need for external ovenized references or complex calibration routines, lowering system cost and field maintenance burden. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, high-speed SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7322BRUZ | 12-bit dual SAR, 1 Msps max, ±10 V/±5 V/±2.5 V/0–10 V software-selectable input ranges; no integrated reference; requires external REF. | Lower speed suits slower control loops; wider input voltage ranges simplify sensor interfacing but increase external component count. | Select when input signal amplitude varies widely and system already provides precision external reference; not suitable for >1 Msps real-time control. |
| ADS8862IPW | 16-bit single-channel SAR, 1 Msps, 91 dB SNR, 1.8 V supply only; no internal reference; LVDS optional but not standard. | Higher resolution benefits precision metrology; single-channel requires external mux for dual-signal acquisition, adding latency and distortion. | Choose for ultra-low-noise, high-resolution single-signal measurement where dual-channel simultaneity is not required. |
Compared with AD7322BRUZ and ADS8862IPW, the LTC2323HUFD-12#PBF uniquely delivers dual-channel 5 Msps throughput with integrated low-drift reference and guaranteed 125°C operation-enabling compact, thermally robust, and self-contained high-speed acquisition without external support components.
Availability
LTC2323HUFD-12#PBF is available at Aetrix Electronics and suitable for high-speed data acquisition systems, optical networking telemetry, and multiphase motor control requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC2323HUFD-12#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.
The LTC2323HUFD-12#PBF belongs to Analog Devices' high-speed precision SAR ADC product line, engineered specifically for demanding applications requiring simultaneous dual-channel sampling, wide dynamic range, and operation in extreme thermal environments.
FAQ
What is the maximum operating temperature of the LTC2323HUFD-12#PBF?
The LTC2323HUFD-12#PBF is an H-grade device qualified for continuous operation from –40°C to +125°C ambient temperature. This rating is verified per Analog Devices' reliability testing protocols and applies across all specified electrical performance parameters, including INL, SNR, and reference stability. The LTC2323HUFD-12#PBF maintains guaranteed 12-bit no-missing-codes behavior and ±0.5 LSB INL typical throughout this full range.
Does the LTC2323HUFD-12#PBF require external reference components?
No-the LTC2323HUFD-12#PBF integrates two precision, low-drift (20 ppm/°C max) reference buffers delivering either 2.048 V or 4.096 V on REFOUT1 and REFOUT2. Each reference output requires only local 0.1 µF + 10 µF ceramic decoupling. External references are optional: grounding REFINT disables both internal buffers, allowing 1.25 V–VDD external sources to drive REFOUT1/REFOUT2 directly.
How does the LTC2323HUFD-12#PBF support pseudo-differential input configurations?
The LTC2323HUFD-12#PBF natively supports pseudo-differential unipolar (0 to REFOUT) and bipolar (±REFOUT/2) modes without hardware changes. Its differential input structure accepts arbitrary common-mode voltages (0 V to VDD), so connecting one AIN pin to a fixed voltage (e.g., ground or VREF/2) and the other to the signal automatically configures the correct transfer function-outputting valid 12-bit codes with inherent over/underrange handling.
Can the LTC2323HUFD-12#PBF operate with a 3.3 V supply and 1.8 V I/O voltage?
Yes-the LTC2323HUFD-12#PBF supports VDD = 3.3 V (3.13 V–3.47 V) and OVDD = 1.8 V (within 1.71 V–2.63 V range). At 3.3 V VDD and 5 Msps, it dissipates 55–58 mW total; I/O pins (SDO, CLKOUT, SCK) operate at OVDD logic levels, enabling seamless interfacing with 1.8 V FPGA banks. The CMOS/LVDS pin must be grounded for CMOS mode at 1.8 V.
What is the purpose of the REFRTN1 and REFRTN2 pins on the LTC2323HUFD-12#PBF?
REFRTN1 and REFRTN2 are dedicated return paths for the internal reference buffers driving REFOUT1 and REFOUT2. They must be bypassed directly to their respective REFOUT pins using 0.1 µF + 10 µF capacitors-never tied to system ground. This Kelvin-sense configuration ensures accurate reference voltage regulation by eliminating IR drop errors in PCB traces, preserving the 20 ppm/°C drift spec and ±3 LSB full-scale error guarantee.
LTC2323HUFD-12#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 5M
- Number of Inputs:
- 2
- Input Type:
- Differential, Pseudo-Differential
- Data Interface:
- LVDS - Serial, Serial
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3.13V ~ 3.47V, 5V
- Voltage - Supply, Digital:
- 3.13V ~ 3.47V, 5V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 125°C
- Supplier Device Package:
- 28-QFN (4x5)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2323HUFD-12#PBF FAQ
1.How can I place an order for LTC2323HUFD-12#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2323HUFD-12#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2323HUFD-12#PBF reliable?
The price and inventory of LTC2323HUFD-12#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2323HUFD-12#PBF is usually 5 days.
3.What payment methods are accepted for LTC2323HUFD-12#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2323HUFD-12#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2323HUFD-12#PBF?
LTC2323HUFD-12#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2323HUFD-12#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2323HUFD-12#PBF?
For technical support, including LTC2323HUFD-12#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2323HUFD-12#PBF requirements.
6.How does Aetrix verify that LTC2323HUFD-12#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2323HUFD-12#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2323HUFD-12#PBF meets industry standards.
7.What is the process for return or replacement of LTC2323HUFD-12#PBF?
All LTC2323HUFD-12#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2323HUFD-12#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2323HUFD-12#PBF part is unused and in its original packaging.
Return procedure for LTC2323HUFD-12#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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