Analog Devices Inc. LTC2325HUKG-14#PBF
- Part No.:
- LTC2325HUKG-14#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 52-WFQFN Exposed Pad
- Datasheet:
-
LTC2325HUKG-14#PBF.pdf
- Description:
- IC ADC 14BIT SAR 52QFN
- Quantity:
- Payment:

- Shipping:

Inventory:169
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Product details
Overview
LTC2325HUKG-14#PBF from Analog Devices (formerly Linear Technology) is a quad-channel, 14-bit + sign successive approximation register (SAR) analog-to-digital converter with simultaneous sampling, 5 Msps per channel throughput, ±1 LSB typical INL, 81 dB SNR at 2.2 MHz, and operation up to 125°C. It serves as a high-precision, low-latency ADC in multichannel data acquisition systems requiring wide dynamic range and high common-mode rejection.
For engineers reviewing the LTC2325HUKG-14#PBF datasheet, LTC2325HUKG-14#PBF pinout, LTC2325HUKG-14#PBF application, or LTC2325HUKG-14#PBF equivalent, this page delivers verified specifications, thermal-grade context (–40°C to 125°C), differential input architecture, SPI-compatible CMOS/LVDS interface options, and real-world use cases in motor control and optical networking.
Technical Context
The LTC2325HUKG-14#PBF implements four independent SAR ADC cores with true differential inputs, each featuring 14-bit + sign resolution and one-cycle latency. Its internal 2.048 V / 4.096 V temperature-compensated reference (20 ppm/°C max drift) supports both unipolar and bipolar configurations without external components.
It supports dual digital I/O modes-CMOS (1.8 V–2.5 V OVDD) and LVDS (2.5 V OVDD)-with selectable SDR/DDR timing, and integrates dedicated REFOUT1–4 buffers, CLKOUT skew-matched clock output, and nap/sleep power states for system-level energy management.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit + sign: delivers 32,768 codes with signed binary output for bipolar signal capture. |
| Sampling Rate | 5 Msps per channel: enables real-time capture of signals up to ~2.2 MHz Nyquist bandwidth. |
| SNR | 81 dB typical at fIN = 2.2 MHz: ensures >13.2 effective bits for high-fidelity signal reconstruction. |
| INL | ±1 LSB typical: guarantees monotonicity and accurate full-scale linearity across temperature. |
| Operating Temp | –40°C to +125°C: qualified for harsh industrial and automotive under-hood environments. |
| Power Dissipation | 45 mW per channel at 5 Msps (5 V): balances speed and thermal efficiency in dense PCB layouts. |
| Input Range | ±4.096 V differential (8 VP-P): supports wide dynamic range while rejecting common-mode noise. |
Pinout & Package
52-lead (7 mm × 8 mm) plastic QFN package with exposed pad (Pin 53) soldered to ground plane for thermal and electrical integrity. Pin count and layout match LTC2325 family specifications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN1+ / AIN1– to AIN4+ / AIN4– | Differential analog inputs (x4 channels) | Accept ±REFOUTx voltage swing; support true differential acquisition with no configuration required. |
| REFOUT1–4 | Independent buffered reference outputs | Each provides 4.096 V (or 2.048 V) reference for its respective ADC core; disable via REFBUFEN. |
| SDO1–4 / SDOA–D+, SDOA–D– | Serial data outputs (CMOS or LVDS mode) | Channel-specific MSB-first output; LVDS pairs require 100 Ω differential termination at receiver. |
| SCK / SCK+, SCK– | Serial clock input | Drives conversion readout; supports SDR (falling edge) or DDR (both edges); LVDS version requires 100 Ω termination. |
| CNV | Convert trigger input | Edge-sensitive command initiating simultaneous sampling; must be driven with low-jitter OVDD-level pulse. |
| CLKOUT / CLKOUT+, CLKOUT– | Skew-matched output clock | Provides synchronized latch clock for FPGA/ASIC receivers; matches SDO timing to minimize setup/hold violations. |
| REFBUFEN | Reference buffer enable | Tie to VDD for internal reference use; ground to disable buffers and connect external references (1.25 V–5 V). |
| CMOS/LVDS | I/O interface mode select | Ground = CMOS; tie to OVDD = LVDS; float = low-power LVDS - configures all digital I/O simultaneously. |
Key Features
| Feature | Design Value |
|---|---|
| Four simultaneous sampling channels | Enables phase-coherent acquisition across multiple sensors or phases without inter-channel skew. |
| Onboard 4.096 V reference with 20 ppm/°C drift | Eliminates need for external precision reference; maintains accuracy over full –40°C to +125°C range. |
| CMOS or LVDS serial interface with SDR/DDR support | Offers flexibility in host interface selection: low-power CMOS for microcontrollers or high-noise-immunity LVDS for FPGAs. |
| One-cycle latency and 5 Msps/channel throughput | Delivers deterministic timing for closed-loop control systems requiring sub-200 ns conversion-to-data availability. |
| Nap and sleep power modes | Reduces current to 6.4 mA (nap) or 20 µA (sleep), enabling rapid wake-up while minimizing idle power in battery-backed systems. |
Applications
| High-Speed Motor Control | Optical Network Monitoring |
|---|---|
|
Use Scenario: Real-time current and voltage sensing across three-phase inverter legs and DC bus in servo drives. IC Role / Device Role / Timing Role: Simultaneous sampling ADC capturing synchronized waveforms for field-oriented control (FOC) algorithms. Use Value: 5 Msps/channel and <200 ns aperture matching ensure precise rotor position estimation and torque ripple reduction. |
Use Scenario: Monitoring multi-wavelength optical power levels and distortion metrics in DWDM transceivers. IC Role / Device Role / Timing Role: High-SNR digitization of photodiode amplifier outputs for real-time OSNR and BER analysis. Use Value: 81 dB SNR and 88 dB THD at 2.2 MHz enable detection of low-level modulation artifacts in 10+ Gbps links. |
| Industrial Data Acquisition | Communications Test Equipment |
|
Use Scenario: Multi-sensor vibration, temperature, and strain monitoring in predictive maintenance gateways. IC Role / Device Role / Timing Role: Quad-channel front-end converting isolated sensor signals with wide common-mode rejection (>102 dB CMRR). Use Value: 8 VP-P differential input range and –40°C to +125°C rating support direct connection to industrial transducers in unconditioned enclosures. |
Use Scenario: Digitizing RF IF signals in portable spectrum analyzers and vector signal analyzers. IC Role / Device Role / Timing Role: Low-latency ADC feeding FPGA-based FFT engines for real-time spectral analysis. Use Value: LVDS DDR interface and CLKOUT synchronization reduce timing jitter, preserving SFDR >90 dB up to 2.2 MHz input. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed, multichannel SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7606C-16 | 16-bit, 1 MSPS, internal reference only (4.096 V), parallel/serial interface, 4.5 V–5.5 V supply | Lower throughput but higher resolution; lacks LVDS and simultaneous 5 Msps capability | Select when resolution > speed is critical and system uses parallel bus or lower sample rates. |
| LTC2326HUKG-16 | 16-bit, 2 Msps, same 52-lead QFN, identical pinout and interface, extended temp grade | Same footprint and software compatibility, but trades 2.5× lower throughput for 2 extra bits | Choose for drop-in upgrade where SNR >85 dB is required and 2 Msps meets system timing budget. |
Compared with AD7606C-16 and LTC2326HUKG-16, the LTC2325HUKG-14#PBF uniquely delivers 5 Msps simultaneous sampling at 14-bit + sign resolution with LVDS support and ultra-low latency-making it optimal for closed-loop control and real-time spectral analysis where timing determinism outweighs raw bit depth.
Availability
LTC2325HUKG-14#PBF is available at Aetrix Electronics and suitable for high-speed motor control, optical network monitoring, and industrial data acquisition requiring stable component supply across extended temperature ranges.
Supply support for LTC2325HUKG-14#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for the LTC portfolio.
The LTC2325 series belongs to Linear's high-performance SAR ADC product line, designed specifically for demanding applications requiring simultaneous sampling, low latency, and guaranteed AC performance across industrial temperature ranges.
FAQ
What is the maximum operating temperature of the LTC2325HUKG-14#PBF?
The LTC2325HUKG-14#PBF is rated for operation from –40°C to +125°C, making it suitable for under-hood automotive, industrial motor drives, and aerospace applications where ambient temperatures exceed standard commercial or industrial grades. This H-grade qualification is explicitly defined in the Absolute Maximum Ratings table and confirmed across all electrical characteristics.
Does the LTC2325HUKG-14#PBF support LVDS interface mode?
Yes, the LTC2325HUKG-14#PBF supports LVDS interface mode when the CMOS/LVDS pin (Pin 25) is tied to OVDD. In this mode, SDO1–4 become differential pairs (SDOA–D+, SDOA–D–), SCK becomes differential (SCK+, SCK–), and CLKOUT becomes differential (CLKOUT+, CLKOUT–), all requiring 100 Ω termination at the receiver. LVDS operation is fully specified at OVDD = 2.5 V.
How many reference outputs does the LTC2325HUKG-14#PBF provide?
The LTC2325HUKG-14#PBF provides four independent reference outputs: REFOUT1, REFOUT2, REFOUT3, and REFOUT4 (Pins 22, 9, 6, and 45). Each is buffered and nominally supplies 4.096 V (or 2.048 V depending on VDD), allowing individual calibration or decoupling per ADC channel. The REFBUFEN pin (Pin 43) controls global enable/disable of all four buffers.
What is the latency of the LTC2325HUKG-14#PBF during conversion?
The LTC2325HUKG-14#PBF has one-cycle latency: the conversion result for a given CNV edge is available on the SDO lines during the next SCK cycle. Total conversion time (tCONV) is 170 ns, and the minimum time between conversions (tCYC) is 200 ns - enabling deterministic, pipelined readout essential for real-time control loops.
Can the LTC2325HUKG-14#PBF operate with an external reference?
Yes, the LTC2325HUKG-14#PBF supports external reference operation. Grounding REFBUFEN disables all internal REFOUT buffers, allowing external references (1.25 V–5 V) to drive REFOUT1–4 directly. The device retains full specification compliance, including SNR and THD, when using a clean, low-noise external reference source.
LTC2325HUKG-14#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 52-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 5M
- Number of Inputs:
- 4
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel, SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 4
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3.13V ~ 3.47V, 5V
- Voltage - Supply, Digital:
- 3.13V ~ 3.47V, 5V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 125°C
- Supplier Device Package:
- 52-QFN (7x8)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2325HUKG-14#PBF FAQ
1.How can I place an order for LTC2325HUKG-14#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2325HUKG-14#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2325HUKG-14#PBF reliable?
The price and inventory of LTC2325HUKG-14#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2325HUKG-14#PBF is usually 5 days.
3.What payment methods are accepted for LTC2325HUKG-14#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2325HUKG-14#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2325HUKG-14#PBF?
LTC2325HUKG-14#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2325HUKG-14#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2325HUKG-14#PBF?
For technical support, including LTC2325HUKG-14#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2325HUKG-14#PBF requirements.
6.How does Aetrix verify that LTC2325HUKG-14#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2325HUKG-14#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2325HUKG-14#PBF meets industry standards.
7.What is the process for return or replacement of LTC2325HUKG-14#PBF?
All LTC2325HUKG-14#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2325HUKG-14#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2325HUKG-14#PBF part is unused and in its original packaging.
Return procedure for LTC2325HUKG-14#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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