Analog Devices Inc. LTC2325IUKG-12#PBF

Overview

LTC2325IUKG-12#PBF from Analog Devices is a quad, 12-bit + sign successive approximation register (SAR) analog-to-digital converter with simultaneous sampling, differential inputs, and 5 Msps per channel throughput. It operates from a single 3.3 V or 5 V supply, delivers 77 dB SNR at 2.2 MHz input, ±0.5 LSB typical INL, and integrates a low-drift (20 ppm/°C max) 4.096 V internal reference. It is used in high-speed data acquisition systems requiring precise phase-coherent sampling across four channels.

For engineers reviewing the LTC2325IUKG-12#PBF datasheet, LTC2325IUKG-12#PBF pinout, LTC2325IUKG-12#PBF application, or LTC2325IUKG-12#PBF equivalent, key selection criteria include guaranteed 12-bit no-missing-codes performance, simultaneous 4-channel sampling latency of one cycle, CMOS/LVDS SPI-compatible serial interface support, wide common-mode input range (0 V to VDD), and operation over –40°C to +85°C industrial temperature range.

Technical Context

The LTC2325IUKG-12#PBF implements four independent SAR ADC cores sharing a common reference architecture and synchronized CNV control, enabling true simultaneous sampling with aperture delay matching ≤500 ps. Its differential input stage supports 8 V_P-P full-scale range and achieves 102 dB CMRR at 2.2 MHz.

It features dual-mode digital I/O: CMOS (1.8 V–2.5 V OVDD) or LVDS (2.5 V OVDD), selectable via the CMOS/LVDS pin, with SDR/DDR mode configurable via SDR/DDR pin. Internal reference buffers (REFOUT1–4) are individually decoupled and disableable via REFBUFEN for external reference use.

Key Specifications

Pinout & Package

Package: 52-lead (7 mm × 8 mm) plastic QFN with exposed pad (Pin 53), RoHS-compliant, lead-free finish. Thermal resistance θ_JA = 31°C/W; exposed pad must be soldered to PCB ground plane for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad SAR ADC applications.

Compared with AD7606C-16 and ADS8684, the LTC2325IUKG-12#PBF uniquely delivers 5 Msps simultaneous sampling at 12-bit + sign resolution with LVDS interface support and integrated low-drift reference-making it optimal for time-critical, phase-coherent multi-channel systems where speed, synchronization, and interface robustness are non-negotiable.

Availability

LTC2325IUKG-12#PBF is available at Aetrix Electronics and suitable for high-speed data acquisition systems, optical network monitoring equipment, and multiphase motor control modules requiring stable component supply across industrial temperature ranges.

Supply support for LTC2325IUKG-12#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.

The LTC2325 product line was designed specifically for demanding high-speed, multi-channel data acquisition applications requiring simultaneous sampling, low latency, and excellent dynamic performance across extended temperature ranges.

FAQ

What is the operating temperature range of the LTC2325IUKG-12#PBF?

The LTC2325IUKG-12#PBF is rated for operation from –40°C to +85°C, meeting industrial temperature requirements. This is confirmed by the "I" grade designation in the part number and specified in the Absolute Maximum Ratings table. The device maintains full performance-including ±0.5 LSB INL and 77 dB SNR-at the extremes of this range, with guaranteed 12-bit no-missing-codes operation across the entire span.

Does the LTC2325IUKG-12#PBF require an external reference?

No, the LTC2325IUKG-12#PBF includes an onboard low-drift 4.096 V temperature-compensated reference with 20 ppm/°C max drift. REFOUT1–4 pins provide buffered outputs for each ADC channel. An external reference is optional and only needed when higher precision, different voltage (1.25–5 V), or shared reference across multiple devices is required-enabled by grounding REFBUFEN.

Can the LTC2325IUKG-12#PBF interface with an FPGA using LVDS signaling?

Yes, the LTC2325IUKG-12#PBF supports LVDS I/O mode: tie CMOS/LVDS to OVDD (2.5 V) to activate differential SDOA–D± and CLKOUT± outputs, and terminate each pair with a 100 Ω resistor at the FPGA receiver. LVDS operation is fully characterized-delivering 220–350 mV differential swing and supporting 105 MHz SCK rates in DDR mode-ensuring reliable high-speed communication in noisy environments.

How does simultaneous sampling work on the LTC2325IUKG-12#PBF?

The LTC2325IUKG-12#PBF uses a single CNV input to trigger all four SAR ADC cores at the exact same instant. Its internal architecture guarantees aperture delay matching ≤500 ps between channels, ensuring phase-coherent sampling critical for vector measurements. Unlike multiplexed ADCs, there is no time division-each channel acquires its sample simultaneously, then converts in parallel with one-cycle latency.

What power-saving modes does the LTC2325IUKG-12#PBF support?

The LTC2325IUKG-12#PBF offers Nap Mode (6.4 mA IVDD, ~18 mW total) and Sleep Mode (20–90 μA total supply current, ~26 μW). Nap Mode halts conversions but keeps reference and bias circuits active for fast wake-up; Sleep Mode powers down nearly all circuitry except wakeup logic. Both modes are controlled via standard SPI commands and retain configuration registers across transitions.