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Analog Devices Inc. LTC2325IUKG-14#PBF
- Part No.:
- LTC2325IUKG-14#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 52-WFQFN Exposed Pad
- Datasheet:
-
LTC2325IUKG-14#PBF.pdf
- Description:
- IC ADC 14BIT SAR 52QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,640
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Product details
Overview
LTC2325IUKG-14#PBF from Analog Devices (formerly Linear Technology) is a quad, 14-bit + sign successive approximation register (SAR) analog-to-digital converter with simultaneous sampling, differential inputs, and 5 Msps per channel throughput. It operates from single 3.3V or 5V supply, delivers 81 dB SNR at 2.2 MHz input, ±1 LSB typical INL, and integrates a low-drift 2.048 V / 4.096 V internal reference - ideal for high-fidelity data acquisition in multiphase motor control and optical networking.
For engineers reviewing the LTC2325IUKG-14#PBF datasheet, LTC2325IUKG-14#PBF pinout, LTC2325IUKG-14#PBF application, or LTC2325IUKG-14#PBF equivalent, key selection considerations include guaranteed 14-bit no-missing-codes performance, simultaneous four-channel sampling with <500 ps aperture delay matching, LVDS/CMOS SPI-compatible interface flexibility, and –40°C to +85°C industrial temperature rating.
Technical Context
The LTC2325IUKG-14#PBF implements four independent SAR ADC cores sharing a common reference architecture and synchronized CNV control, enabling true simultaneous sampling across all channels. Its internal 4.096 V reference exhibits ≤20 ppm/°C drift and supports external overdrive via REFBUFEN disable.
It supports dual I/O modes: CMOS (1.8 V–2.5 V OVDD) and LVDS (2.5 V OVDD), with selectable SDR/DDR serial output timing. Conversion latency is one cycle (170 ns), and it features nap/sleep modes reducing total current to 20 µA.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit + sign (15-bit output word), guaranteed no missing codes over full temperature range |
| Sampling Rate | 5 Msps per channel, simultaneous across all four channels with one-cycle latency |
| SNR | 81 dB typical at fIN = 2.2 MHz, enabling >13.2 ENOB for precision signal capture |
| INL | ±1 LSB typical, –3/+3 LSB max over –40°C to +85°C, ensuring accurate full-scale linearity |
| Reference | Internal 4.096 V (or 2.048 V) buffered reference, ≤20 ppm/°C drift, externally overdrivable |
| Power Dissipation | 45 mW per channel at 5 Msps (5 V supply); 26 µW in sleep mode for power-constrained systems |
| Input Range | ±4.096 V differential (8 VP-P) with wide common-mode range (0 V to VDD) |
Pinout & Package
Package: 52-lead (7 mm × 8 mm) plastic QFN (UKG) with exposed thermal pad (Pin 53 = GND, must be soldered).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN1+ / AIN1– to AIN4+ / AIN4– (Pins 1–2, 4–5, 10–11, 13–14) | Differential analog inputs (4 channels) | Accept ±REFOUTx full-scale differential signals; support bipolar/unipolar true differential operation without configuration |
| REFOUT1–REFOUT4 (Pins 6, 9, 22, 45) | Per-channel reference buffer outputs | Each provides dedicated 4.096 V reference for corresponding ADC core; individually disableable via REFBUFEN |
| CNV (Pin 24) | Convert initiation input | Edge-triggered control: rising edge starts acquisition, falling edge initiates conversion and readout; requires low-jitter OVDD-level signal |
| SCK / SCK+ / SCK– (Pins 41–42) | Serial clock input | Supports CMOS (single-ended) or LVDS (differential) clocking; determines SDR/DDR mode via SDR/DDR pin |
| SDO1–SDO4 / SDOA–SDOD (Pins 27–29, 35–36, 39–40) | Serial data outputs | CMOS mode: single-ended SDOx; LVDS mode: differential SDOA–SDOD pairs; MSB-first, 15-bit output per channel |
| CMOS/LVDS (Pin 25) & SDR/DDR (Pin 23) | I/O interface mode selectors | CMOS/LVDS = GND → CMOS; = OVDD → LVDS; SDR/DDR = GND → SDR; = OVDD → DDR |
Key Features
| Feature | Design Value |
|---|---|
| Simultaneous four-channel sampling | Enables phase-coherent acquisition for motor current/voltage monitoring and beamforming without inter-channel skew |
| Onboard 4.096 V reference with ≤20 ppm/°C drift | Eliminates external reference component count and layout sensitivity while maintaining accuracy over industrial temperature range |
| LVDS or CMOS SPI-compatible serial interface | Reduces EMI and supports long trace routing (LVDS) or low-power microcontroller interfacing (CMOS) without level-shifting |
| One-cycle conversion latency (170 ns) | Allows deterministic real-time control loop closure in fast servo systems with minimal processing delay |
| Nap/sleep modes with 26 µW total standby power | Extends battery life in portable test equipment and enables rapid wake-up (<50 ms REFOUT stabilization) for burst-mode acquisition |
Applications
| Multiphase Motor Control | Optical Network Monitoring |
|---|---|
|
Use Scenario: Real-time measurement of three-phase stator currents and DC bus voltage in servo drives. IC Role / Device Role / Timing Role: Simultaneous 4-channel sampling captures current/voltage waveforms with sub-ns inter-channel timing alignment for precise field-oriented control. Use Value: Enables accurate torque ripple suppression and harmonic injection by preserving phase relationships between sampled channels at 5 Msps. |
Use Scenario: High-speed characterization of optical transceiver signal integrity (eye diagram, jitter, BER margin). IC Role / Device Role / Timing Role: Digitizes differential RF/IF signals from photodiode TIAs with 81 dB SNR and 95 MHz input bandwidth. Use Value: Supports 10+ Gbps link validation by resolving small-signal distortions and noise floor details critical for PAM4 compliance testing. |
| High-Speed Data Acquisition Systems | Communications Baseband Processing |
|
Use Scenario: Modular digitizer card for automated test equipment requiring multi-channel coherence and low-latency streaming. IC Role / Device Role / Timing Role: Quad SAR ADC with LVDS DDR output feeds FPGA directly at 10 Gbps aggregate throughput (4 × 2.5 Gbps). Use Value: Eliminates need for external FIFO or deserializer; simplifies PCB layout and reduces system latency versus pipeline ADC alternatives. |
Use Scenario: IF sampling in software-defined radio (SDR) front-ends for LTE/5G base stations. IC Role / Device Role / Timing Role: Digitizes quadrature I/Q analog baseband signals with matched gain/phase across all four channels. Use Value: Maintains <500 ps aperture delay matching to preserve IQ orthogonality and minimize image rejection degradation in direct-conversion architectures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7606C-16 | 16-bit resolution, 1 MSPS per channel, parallel/serial interface, integrated analog front-end (PGA, anti-alias filter) | Better resolution but lower speed; suited for slower industrial PLC analog input modules | Select when higher resolution and built-in signal conditioning outweigh need for 5 Msps simultaneous sampling |
| ADS8684 | 16-bit, 500 kSPS per channel, single-supply 5 V, integrated reference and PGA, SPI-only interface | Lower speed, higher integration density, no LVDS option; optimized for compact sensor signal chains | Select for cost-sensitive, space-constrained designs where 500 kSPS suffices and analog front-end integration reduces BOM count |
Compared with AD7606C-16 and ADS8684, the LTC2325IUKG-14#PBF uniquely balances 5 Msps simultaneous sampling, 14-bit+sign precision, LVDS/CMOS interface flexibility, and on-chip reference stability - making it optimal for high-speed, phase-coherent acquisition where timing fidelity and interface robustness are critical.
Availability
LTC2325IUKG-14#PBF is available at Aetrix Electronics and suitable for high-speed data acquisition systems, optical network monitoring equipment, and multiphase motor control applications requiring stable component supply across industrial temperature ranges.
Supply support for LTC2325IUKG-14#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC2325IUKG-14#PBF belongs to Linear's high-speed precision SAR ADC product line, designed specifically for demanding applications requiring simultaneous multi-channel sampling, low noise, and flexible digital interfacing in harsh industrial environments.
FAQ
What is the operating temperature range of the LTC2325IUKG-14#PBF?
The LTC2325IUKG-14#PBF is rated for industrial operation from –40°C to +85°C. This is confirmed by the "I" grade designation in the part number and specified in the Absolute Maximum Ratings table. It guarantees full performance-including 14-bit no-missing-codes, ±1 LSB INL, and 81 dB SNR-across this entire range.
Does the LTC2325IUKG-14#PBF require an external reference?
No, the LTC2325IUKG-14#PBF does not require an external reference. It integrates a low-drift (≤20 ppm/°C) 4.096 V (or 2.048 V) temperature-compensated reference buffer on each of its four channels (REFOUT1–REFOUT4). An external reference may be used only if REFBUFEN is grounded to disable internal buffers.
How many analog input channels does the LTC2325IUKG-14#PBF support, and are they sampled simultaneously?
The LTC2325IUKG-14#PBF supports four fully differential analog input channels (AIN1± through AIN4±) and samples all four simultaneously using a shared CNV signal and independent sample-and-hold circuits. This ensures sub-500 ps inter-channel aperture delay matching, critical for phase-coherent measurements.
What digital interface options does the LTC2325IUKG-14#PBF support?
The LTC2325IUKG-14#PBF supports both CMOS and LVDS serial interfaces, selected via the CMOS/LVDS pin (Pin 25). It also supports Single Data Rate (SDR) and Double Data Rate (DDR) modes via the SDR/DDR pin (Pin 23), enabling flexible timing and data throughput optimization up to 10 Gbps aggregate (4 × 2.5 Gbps in DDR LVDS mode).
What power-saving modes are available on the LTC2325IUKG-14#PBF?
The LTC2325IUKG-14#PBF offers Nap Mode (6.4 mA total supply current) and Sleep Mode (20 µA total supply current). In Sleep Mode, the internal reference is disabled and wake-up requires ~50 ms for REFOUT stabilization. These modes are controlled via dedicated command sequences and reduce power during idle periods without compromising startup readiness.
LTC2325IUKG-14#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 52-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 5M
- Number of Inputs:
- 4
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel, SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 4
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3.13V ~ 3.47V, 5V
- Voltage - Supply, Digital:
- 3.13V ~ 3.47V, 5V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 52-QFN (7x8)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2325IUKG-14#PBF FAQ
1.How can I place an order for LTC2325IUKG-14#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2325IUKG-14#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2325IUKG-14#PBF reliable?
The price and inventory of LTC2325IUKG-14#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2325IUKG-14#PBF is usually 5 days.
3.What payment methods are accepted for LTC2325IUKG-14#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2325IUKG-14#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2325IUKG-14#PBF?
LTC2325IUKG-14#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2325IUKG-14#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2325IUKG-14#PBF?
For technical support, including LTC2325IUKG-14#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2325IUKG-14#PBF requirements.
6.How does Aetrix verify that LTC2325IUKG-14#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2325IUKG-14#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2325IUKG-14#PBF meets industry standards.
7.What is the process for return or replacement of LTC2325IUKG-14#PBF?
All LTC2325IUKG-14#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2325IUKG-14#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2325IUKG-14#PBF part is unused and in its original packaging.
Return procedure for LTC2325IUKG-14#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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