Analog Devices Inc. LTC2341IUH-16#PBF
- Part No.:
- LTC2341IUH-16#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LTC2341IUH-16#PBF.pdf
- Description:
- IC ADC 16BIT SAR 32QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2341IUH-16#PBF from Analog Devices (formerly Linear Technology) is a dual-channel, 16-bit, simultaneous-sampling SAR ADC with differential SoftSpan™ inputs, ±1.25LSB INL, 93.4dB SNR, and 666ksps per channel throughput. It operates from a 5V supply with integrated 4.096V reference and buffer, and supports both CMOS (1.8V–5V) and LVDS serial interfaces - enabling direct digitization of industrial sensor, PLC, and medical imaging signals with rail-to-rail input overdrive tolerance.
For engineers reviewing the LTC2341IUH-16#PBF datasheet, LTC2341IUH-16#PBF pinout, LTC2341IUH-16#PBF application, or LTC2341IUH-16#PBF equivalent, key selection criteria include its per-channel programmable input ranges (±4.096V/0–4.096V/±2.048V/0–2.048V), 105dB CMRR at 200Hz, guaranteed no-missing-codes performance, and operation across –40°C to +85°C in a 32-lead 5mm × 5mm QFN package.
Technical Context
The LTC2341IUH-16#PBF implements a true simultaneous sampling architecture using two independent sample-and-hold circuits feeding a shared 16-bit SAR core, eliminating inter-channel timing skew. Its SoftSpan™ input flexibility is implemented via on-chip programmable gain and offset calibration, allowing per-conversion range selection without external signal conditioning.
It features dual-mode digital I/O: pin-selectable CMOS (with 1–2 lane output options) or LVDS (differential SCKI/SDO pairs), each with distinct timing specifications and supply requirements (OVDD = 1.71–5.25V for CMOS; 2.375–5.25V for LVDS). Internal conversion clock eliminates cycle latency, and aperture jitter is specified at 3ps RMS.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit - guarantees full 65,536-code dynamic range with no missing codes across temperature. |
| Sampling Rate | 666 ksps per channel (dual-channel mode) - enables real-time capture of signals up to ~22 MHz bandwidth (–3dB). |
| INL | ±1.25 LSB max - ensures high-precision measurement linearity critical for closed-loop control and calibration systems. |
| SNR | 93.4 dB typical (fIN = 2 kHz, ±4.096 V range) - delivers >15.5 effective bits for low-noise data acquisition. |
| CMRR | 105 dB typical at 200 Hz - rejects common-mode noise from motor drives, power supplies, and long sensor cables. |
| Input Ranges | Per-channel selectable: ±4.096 V, 0–4.096 V, ±2.048 V, 0–2.048 V - eliminates need for external gain-switching circuitry. |
| Package | 32-lead 5 mm × 5 mm QFN (UH) - exposes thermal pad (Pin 33) for PCB soldering to enhance thermal dissipation. |
Pinout & Package
32-lead plastic QFN (UH package), 5 mm × 5 mm body, 0.5 mm pitch, exposed thermal pad (Pin 33 = GND). Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN0+, IN0– | Differential analog input, Channel 0 | Accepts wide common-mode range (0 V to VDD); supports fully differential, bipolar, or unipolar drive configurations. |
| IN1+, IN1– | Differential analog input, Channel 1 | Independent simultaneous sampling path; identical electrical specs to Channel 0. |
| REFIN | Internal bandgap reference output / external reference input | Nominally outputs 2.048 V; accepts 1.25–2.2 V external reference to overdrive internal buffer. |
| REFBUF | Reference buffer output | Nominally 4.096 V (2×REFIN); bypassed with 47 µF ceramic capacitor; disable by grounding REFIN. |
| LVDS/CMOS | I/O interface mode select | Tie to OVDD for LVDS; tie to GND for CMOS - configures all digital I/O pins accordingly. |
| CNV | Conversion start trigger | Rising-edge sensitive; not gated by CS - enables asynchronous conversion initiation. |
| PD | Power-down control | High-active; powers down analog and digital blocks; double-high pulse triggers global reset. |
| SDO+, SDO– | LVDS data output pair (or CMOS SDO0) | In LVDS mode: differential output; in CMOS mode: SDO0 (and optionally SDO1 for 2-lane mode). |
| SCKO+, SCKO– | LVDS clock output pair (or CMOS SCKO) | LVDS: differential clock output; CMOS: single-ended SCKO for master clock distribution. |
| CS | Chip select | Active-low; enables serial interface; bus enable time after CS↓ is 15 ns (CMOS) or 50 ns (LVDS). |
Key Features
| Feature | Design Value |
|---|---|
| Per-channel SoftSpan™ input configuration | Enables independent, conversion-by-conversion selection among four input ranges - reduces BOM count and layout complexity in multi-signal systems. |
| Simultaneous sampling with <150 ps aperture delay matching | Ensures phase-coherent acquisition across channels for accurate power metering, motor current/voltage analysis, and vibration monitoring. |
| Integrated 4.096 V reference buffer with 5 ppm/°C drift | Eliminates need for external precision reference ICs and associated decoupling, reducing board area and calibration overhead. |
| Rail-to-rail input overdrive tolerance | Withstands analog input transients beyond supply rails (–VDD to +VDD) without damage or latch-up - improves system robustness in industrial environments. |
| Guaranteed operation to +85°C (I-grade) | Validated performance across –40°C to +85°C ambient - suitable for factory-floor automation, outdoor instrumentation, and transportation electronics. |
Applications
| Programmable Logic Controllers | Industrial Process Control |
|---|---|
Use Scenario: High-speed analog input modules acquiring voltage/current signals from pressure, flow, and temperature transmitters in modular PLC backplanes. IC Role / Device Role: Dual-channel simultaneous ADC providing synchronized, high-fidelity digitization of sensor pairs (e.g., differential pressure + temperature) with minimal external components. Use Value: SoftSpan™ range flexibility eliminates per-sensor gain stages; 105 dB CMRR suppresses 50/60 Hz mains noise in noisy plant environments. | Use Scenario: Distributed I/O systems monitoring reactor temperatures, valve positions, and fluid levels in chemical processing plants. IC Role / Device Role: Precision front-end converter interfacing with isolated analog sensors and delivering calibrated 16-bit data over SPI/LVDS to FPGA or microcontroller hosts. Use Value: ±1.25 LSB INL and no-missing-codes guarantee meet SIL-2 functional safety validation requirements for loop integrity checks. |
| Medical Imaging Subsystems | High-Speed Data Acquisition |
Use Scenario: Ultrasound beamformer receive paths digitizing echo signals from multiple transducer elements with precise time alignment. IC Role / Device Role: Simultaneous-sampling ADC capturing paired analog channels (I/Q or differential echo pairs) at >600 ksps with sub-ns timing correlation. Use Value: Aperture jitter ≤3 ps RMS and <150 ps inter-channel matching preserve phase coherence required for digital beamforming algorithms. | Use Scenario: Portable oscilloscopes and spectrum analyzers requiring compact, low-power, high-SNR digitization of wideband signals. IC Role / Device Role: Core ADC engine supporting flexible input scaling and fast serial interface for real-time waveform streaming to ARM-based processors. Use Value: LVDS interface enables noise-immune transmission over longer PCB traces; 74 mW typical power allows battery-powered operation with thermal headroom. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7606C-16 | 8-channel, 16-bit, 1 MSPS, internal reference, parallel/serial interface; no LVDS support; requires external REFOUT buffer for best SNR. | Better channel density and higher throughput; less flexible per-channel range selection (fixed ±10 V/±5 V/0–10 V). | Select when needing ≥4 channels or higher aggregate throughput; avoid if LVDS noise immunity or per-channel SoftSpan™ is required. |
| ADS8688 | 8-channel, 16-bit, 500 ksps, integrated PGA (±10.24 V to ±125 mV), SPI-only, no LVDS; 92 dB SNR, ±1.5 LSB INL. | On-chip programmable gain amplifier simplifies sensor interfacing; lower SNR and higher INL than LTC2341IUH-16#PBF. | Select when variable-gain front-end is needed for mixed-signal sensor types; avoid if simultaneous sampling timing precision or LVDS interface is mandatory. |
Compared with AD7606C-16 and ADS8688, the LTC2341IUH-16#PBF offers superior inter-channel timing matching (<150 ps), LVDS interface for EMI-prone environments, and unique per-conversion SoftSpan™ range reconfiguration - making it optimal for dual-channel phase-sensitive or noise-critical applications where flexibility and precision outweigh channel count.
Availability
LTC2341IUH-16#PBF is available at Aetrix Electronics and suitable for industrial process control, medical imaging subsystems, and high-speed data acquisition requiring stable component supply, extended temperature operation (–40°C to +85°C), and long-term design-in support.
Supply support for LTC2341IUH-16#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC2341 family was designed by Linear Technology (acquired by ADI in 2017) specifically for high-accuracy, multi-channel data acquisition systems demanding simultaneous sampling, flexible input scaling, and robust serial interface options in space-constrained industrial environments.
FAQ
What is the operating temperature range for the LTC2341IUH-16#PBF?
The LTC2341IUH-16#PBF is rated for operation from –40°C to +85°C (I-grade). This specification is validated across all key AC and DC parameters including INL, SNR, and CMRR, and is supported by the UH-package thermal design and internal biasing architecture. The device maintains guaranteed no-missing-codes performance and ±1.25 LSB INL across this full range.
Does the LTC2341IUH-16#PBF require an external reference?
No, the LTC2341IUH-16#PBF includes an integrated 2.048 V bandgap reference (on REFIN) and a buffered 4.096 V output (on REFBUF), both fully characterized over temperature. External references are optional: REFIN accepts 1.25–2.2 V for improved accuracy, and REFBUF can be overdriven with 2.5–5 V when the internal buffer is disabled by grounding REFIN.
How does the SoftSpan™ feature work on the LTC2341IUH-16#PBF?
The SoftSpan™ feature on the LTC2341IUH-16#PBF allows per-conversion, per-channel selection of four differential input ranges: ±4.096 V, 0–4.096 V, ±2.048 V, or 0–2.048 V. This is configured via dedicated control bits in the serial command word - enabling dynamic range adaptation without hardware changes or external gain switches, directly within the LTC2341IUH-16#PBF's digital interface.
Can the LTC2341IUH-16#PBF operate with only one channel enabled?
Yes, the LTC2341IUH-16#PBF supports single-channel mode, increasing throughput to 1000 ksps on the active channel while disabling the other. This mode reduces power consumption (typical PD drops from 74 mW to ~6.0 mW in acquisition mode) and simplifies timing for applications requiring maximum speed on a single signal path - all without changing the physical interface or pin configuration of the LTC2341IUH-16#PBF.
What are the digital interface options for the LTC2341IUH-16#PBF?
The LTC2341IUH-16#PBF supports two mutually exclusive digital interface modes selected by the LVDS/CMOS pin: CMOS mode (1.8 V–5 V OVDD) with configurable 1- or 2-lane SDO output, and LVDS mode (2.375 V–5.25 V OVDD) with differential SCKO/SDO pairs. Each mode has distinct timing specs, supply requirements, and noise immunity profiles - the LTC2341IUH-16#PBF's interface is not software-configurable; hardware pin strapping determines mode at power-up.
LTC2341IUH-16#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- SoftSpan™
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 666k
- Number of Inputs:
- 2
- Input Type:
- Differential
- Data Interface:
- LVDS - Serial, SPI
- Configuration:
- S/H-MUX-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 32-QFN (5x5)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2341IUH-16#PBF FAQ
1.How can I place an order for LTC2341IUH-16#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2341IUH-16#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2341IUH-16#PBF reliable?
The price and inventory of LTC2341IUH-16#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2341IUH-16#PBF is usually 5 days.
3.What payment methods are accepted for LTC2341IUH-16#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2341IUH-16#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2341IUH-16#PBF?
LTC2341IUH-16#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2341IUH-16#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2341IUH-16#PBF?
For technical support, including LTC2341IUH-16#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2341IUH-16#PBF requirements.
6.How does Aetrix verify that LTC2341IUH-16#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2341IUH-16#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2341IUH-16#PBF meets industry standards.
7.What is the process for return or replacement of LTC2341IUH-16#PBF?
All LTC2341IUH-16#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2341IUH-16#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2341IUH-16#PBF part is unused and in its original packaging.
Return procedure for LTC2341IUH-16#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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