Analog Devices Inc. LTC2355CMSE-12#PBF

Overview

LTC2355CMSE-12#PBF from Analog Devices (formerly Linear Technology) is a 12-bit, 3.5 Msps serial successive-approximation ADC with differential inputs, 3.3V single-supply operation, and 80 dB common-mode rejection. It delivers 71.1 dB SINAD at 100 kHz input, consumes only 5.5 mA active current (18 mW), and features Sleep mode (13 µW) and Nap mode (4 mW) for portable data acquisition systems.

For engineers reviewing the LTC2355CMSE-12#PBF datasheet, LTC2355CMSE-12#PBF pinout, LTC2355CMSE-12#PBF application, or LTC2355CMSE-12#PBF equivalent, key selection criteria include unipolar 0 V to 2.5 V differential input range, 3-wire SPI-compatible interface timing, MSOP-10 package thermal constraints, and internal 2.5 V reference overdrive capability.

Technical Context

The LTC2355CMSE-12#PBF implements a fully differential sample-and-hold front-end synchronized to the rising edge of CONV, enabling precise simultaneous sampling of AIN+ and AIN–. Its internal 2.5 V bandgap reference is factory-trimmed and stable to ±15 ppm/°C, supporting both internal use and external overdrive between 2.55 V and VDD.

Conversion results are output via a three-state SDO pin over 16 clock cycles following each CONV rising edge, compatible with standard SPI interfaces. Full 3.5 Msps throughput requires two additional SCK cycles between conversions for acquisition time, with tACQ = 39 ns and aperture jitter of 0.3 ps.

Key Specifications

Pinout & Package

Package: 10-lead plastic MSOP (MSE) with exposed pad (Pin 11), θJA = 40°C/W, TJMAX = 125°C. Exposed pad must be soldered to PCB ground plane.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed, low-power SAR ADC applications.

Compared with ADS8860IDRCT and AD7980BRMZ, the LTC2355CMSE-12#PBF uniquely balances 3.5 Msps speed, true differential input, 80 dB CMRR, and 13 µW Sleep mode-making it optimal for portable, noise-immune, high-throughput DAQ where 12-bit resolution meets system SNR targets.

Availability

LTC2355CMSE-12#PBF is available at Aetrix Electronics and suitable for communications baseband monitoring, industrial data acquisition systems, and uninterruptible power supplies requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for LTC2355CMSE-12#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.

The LTC2355 family was designed by Linear Technology (acquired by ADI in 2017) specifically for portable, high-speed, low-power data acquisition-emphasizing differential noise immunity, minimal external components, and flexible power management in compact MSOP packages.

FAQ

What is the maximum sampling rate achievable with LTC2355CMSE-12#PBF?

The LTC2355CMSE-12#PBF achieves a maximum sampling rate of 3.5 Msps. This requires a 63 MHz SCK clock and two additional clock cycles between conversions to provide the 39 ns acquisition time. At lower clock frequencies or without inter-conversion gaps, the effective throughput decreases proportionally per the tTHROUGHPUT specification of 286 ns minimum period.

Does LTC2355CMSE-12#PBF support true differential input operation?

Yes, the LTC2355CMSE-12#PBF supports true differential input operation: AIN+ and AIN– are sampled simultaneously with full 0 V to VDD common-mode range and 0 V to 2.5 V differential span. Its 80 dB CMRR at 1 MHz enables rejection of ground loops and high-frequency noise without external instrumentation amplifiers-confirmed in the datasheet's CMRR vs frequency plot (Figure 2355 G12).

Can the internal reference of LTC2355CMSE-12#PBF be overdriven with an external voltage?

Yes, the VREF pin (Pin 3) of the LTC2355CMSE-12#PBF can be overdriven with an external reference between 2.55 V and VDD (3.3 V). The internal 2.5 V bandgap is disabled when an external voltage above 2.55 V is applied. External reference load is 0.75 mA quiescent and up to 3 mA during conversion, as specified in the Applications Information section.

What are the power-down modes supported by LTC2355CMSE-12#PBF?

The LTC2355CMSE-12#PBF supports two hardware-controlled power-down modes: Nap mode (4 mW, entered with two CONV pulses without SCK activity) and Sleep mode (13 µW, entered with four or more CONV pulses without SCK activity). Both modes retain register state and wake instantly upon first SCK edge, with VREF settling in 2 ms after Sleep wake-up (t12 parameter).

Is LTC2355CMSE-12#PBF compatible with standard SPI interfaces?

Yes, the LTC2355CMSE-12#PBF uses a 3-wire SPI-compatible serial interface (CONV, SCK, SDO) with no chip-select line. Data appears on SDO 8 ns after SCK rising edge and remains valid for 2 ns after clock edge (t8/t10). It requires no special framing-12 bits are output over 16 SCK cycles starting one cycle after CONV rising edge-ensuring compatibility with standard microcontroller SPI peripherals configured for MSB-first, CPOL=0, CPHA=0 timing.