Analog Devices Inc. LTC2364CDE-16#PBF
- Part No.:
- LTC2364CDE-16#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-WFDFN Exposed Pad
- Datasheet:
-
LTC2364CDE-16#PBF.pdf
- Description:
- IC ADC 16BIT SAR 16DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2364CDE-16#PBF from Analog Devices (formerly Linear Technology) is a 16-bit pseudo-differential unipolar successive approximation register (SAR) ADC optimized for high-speed, low-noise data acquisition. It operates from a single 2.5V supply, supports 0V to VREF input range (VREF = 2.5V–5.1V), delivers 250ksps throughput with no pipeline latency, achieves ±0.75LSB INL max and 94.7dB SNR (typ), and is used in medical imaging front-ends and portable instrumentation where precision, speed, and power efficiency are critical.
For engineers reviewing the LTC2364CDE-16#PBF datasheet, LTC2364CDE-16#PBF pinout, LTC2364CDE-16#PBF application, or LTC2364CDE-16#PBF equivalent, key selection criteria include guaranteed 16-bit no-missing-codes operation, daisy-chain SPI interface compatibility across 1.8V–5V logic, internal conversion clock, auto power-down at 3.4µW idle, and DFN-16 (4mm × 3mm) thermal performance up to +70°C ambient.
Technical Context
The LTC2364CDE-16#PBF implements a charge-redistribution CDAC architecture with pseudo-differential sampling: IN+ accepts 0V to VREF while IN– serves as ground-sense reference (±100mV range). Conversion is initiated by a rising edge on CNV, with BUSY indicating active conversion and SDO outputting straight-binary 16-bit data MSB-first on SCK rising edges.
Its timing is fully self-contained - an internal oscillator sets tCONV = 1.9–3µs and tCYC = 4µs - eliminating external clock dependencies. The device supports two operational modes via CHAIN pin: normal mode (RDL/SDI enables/disables SDO) and daisy-chain mode (RDL/SDI becomes serial data input), enabling multi-ADC synchronization without additional control lines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit - guarantees full-scale quantization into 65,536 discrete levels with no missing codes over temperature. |
| Sampling Rate | 250ksps - enables real-time capture of signals up to 125kHz Nyquist bandwidth with zero cycle latency. |
| SNR | 94.7dB (typ) at fIN = 2kHz, VREF = 5V - corresponds to effective resolution >15.5 ENOB, suitable for high-fidelity sensor digitization. |
| INL | ±0.75LSB (max) - ensures monotonicity and linearity error <0.0012% of full scale, critical for calibration-sensitive systems. |
| Power @ 250ksps | 3.4mW total (IVDD + IOVDD + IREF) - enables battery-powered designs with sustained high-speed acquisition. |
| Reference Range | VREF = 2.5V to 5.1V - allows flexible scaling from low-voltage sensors to industrial-level inputs without external gain stages. |
| Supply Voltages | VDD = 2.375–2.625V; OVDD = 1.71–5.25V - decouples analog core from digital I/O, supporting mixed-voltage host interfaces. |
Pinout & Package
Package: 16-lead (4mm × 3mm) plastic DFN with exposed pad (Pin 17), rated for 0°C to +70°C operation. Exposed pad must be soldered to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CHAIN (1) | Mode selector | High = daisy-chain mode (RDL/SDI becomes SDI); Low = normal mode (RDL/SDI controls SDO enable). |
| VDD (2) | Analog core supply | 2.5V ±62.5mV supply; bypass with 10µF ceramic capacitor to GND for noise immunity. |
| GND (3,6,10,16) | Ground reference | Four dedicated ground pins minimize ground bounce; all tied to common system ground. |
| IN+ (4) | Pseudo-differential input+ | Accepts 0V to VREF signal; sees 45pF capacitance and 40Ω switch resistance during acquisition. |
| IN– (5) | Ground sense input | ±100mV range relative to GND; must connect to local ground plane or remote sense point. |
| REF (7,8) | Reference voltage input | Dual-pin connection for low-impedance 2.5V–5.1V reference; requires 47µF X5R ceramic decoupling. |
| CNV (9) | Convert trigger | Rising-edge initiates conversion; minimum pulse width 20ns; powers up ADC from auto power-down state. |
| BUSY (11) | Conversion status indicator | Active-high open-drain output; asserts at CNV↑, deasserts when 16-bit result is ready on SDO. |
| RDL/SDI (12) | Serial bus control / data input | In normal mode: enables/disables SDO tri-state; in chain mode: receives daisy-chained data from upstream ADC. |
| SCK (13) | Serial clock input | Accepts 10ns min period (100MHz max); clocks out SDO data MSB-first on rising edge. |
| SDO (14) | Serial data output | Tri-state CMOS output; drives 16-bit straight-binary result or daisy-chain data; level set by OVDD. |
| OVDD (15) | Digital I/O supply | 1.71V–5.25V logic interface supply; defines VIH/VIL thresholds and output drive strength. |
| GND (17) | Exposed pad ground | Thermal and electrical ground connection; mandatory soldering to PCB ground plane per datasheet. |
Key Features
| Feature | Design Value |
|---|---|
| No pipeline delay | Zero-cycle latency enables deterministic timing for closed-loop control and real-time triggering. |
| Daisy-chain SPI mode | Allows synchronous readout of multiple LTC2364CDE-16#PBF devices using single SCK/SCKCH and shared CNV, reducing MCU GPIO count. |
| Auto power-down | Reduces current to 0.9µA typical between conversions; power scales linearly with sample rate (3.4µW at 250sps). |
| Wide VREF range | 2.5V–5.1V reference support permits direct interfacing with precision references (e.g., LTC6655-5) or buffered sensor outputs. |
| Guaranteed 125°C operation (H-grade variants) | While LTC2364CDE-16#PBF is rated 0°C–70°C, same-pinout H-grade versions (e.g., LTC2364HDE-16#PBF) extend thermal capability without layout change. |
Applications
| Medical Imaging Front-End | Portable Data Logger |
|---|---|
Use Scenario: Digitizing low-amplitude ultrasound echo signals in handheld diagnostic equipment with strict size and battery life constraints. IC Role / Device Role / Timing Role: Primary SAR ADC capturing 12-bit–16-bit echo amplitude data at 250ksps with minimal added noise or distortion. Use Value: 94.7dB SNR and –120dB THD preserve weak signal fidelity; 3.4mW power enables >8-hour operation on 2000mAh Li-ion cell. |
Use Scenario: High-resolution environmental monitoring (temperature, pressure, gas concentration) in field-deployable IoT nodes. IC Role / Device Role / Timing Role: Precision sensor interface ADC with configurable VREF and auto power-down for burst-mode sampling. Use Value: ±0.75LSB INL ensures calibrated accuracy across temperature; 3.4µW idle current extends node lifetime to years on coin-cell battery. |
| Industrial Process Controller | ATE Signal Acquisition |
Use Scenario: Real-time feedback loop sampling in PLC analog I/O modules requiring deterministic latency and robustness to EMI. IC Role / Device Role / Timing Role: High-speed, low-latency ADC for closed-loop servo control with precise timing alignment to PWM cycles. Use Value: No pipeline delay and 4µs conversion cycle allow sub-10µs control loop response; pseudo-differential input rejects common-mode noise from motor drives. |
Use Scenario: High-accuracy DC parametric testing and AC functional testing in automated test equipment platforms. IC Role / Device Role / Timing Role: Reference-grade digitizer for measuring DUT output linearity, noise floor, and harmonic content. Use Value: Guaranteed 16-bit no-missing-codes and 94.7dB SNR meet Class I metrology requirements; daisy-chain mode simplifies multi-channel channel synchronization. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS8860IRGET | 16-bit, 1MSPS, single-ended input only; consumes 4.5mW at full rate; no daisy-chain mode; requires external reference. | Higher speed but lacks pseudo-differential input and integrated reference interface; less suitable for noisy industrial environments. | Select when maximum throughput >250ksps is required and common-mode rejection is not critical. |
| LTC2365CDE-16#PBF | Pin-compatible upgrade with 500ksps rate, identical package and pinout; same 94.7dB SNR and ±0.75LSB INL; shares same VREF and supply ranges. | Direct drop-in replacement for higher sampling needs; retains all interface and thermal characteristics of LTC2364CDE-16#PBF. | Choose for future-proofing or when system bandwidth headroom is needed without redesign. |
Compared with ADS8860IRGET, LTC2364CDE-16#PBF provides superior noise immunity via pseudo-differential input and lower power at 250ksps; compared with LTC2365CDE-16#PBF, it offers identical precision and interface compatibility at half the speed - making it optimal for cost- and power-constrained 250ksps systems.
Availability
LTC2364CDE-16#PBF is available at Aetrix Electronics and suitable for medical imaging front-ends, portable data loggers, and industrial process controllers requiring stable component supply, long-term production continuity, and traceable sourcing.
Supply support for LTC2364CDE-16#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC2364 family was designed for precision, low-power, high-speed data acquisition in space-constrained and thermally demanding applications - emphasizing no-missing-codes integrity, internal timing autonomy, and flexible I/O voltage compatibility.
FAQ
What is the operating temperature range for LTC2364CDE-16#PBF?
The LTC2364CDE-16#PBF is specified for 0°C to +70°C ambient operation. This C-grade variant uses the 16-lead DFN package (4mm × 3mm) with exposed pad, and its electrical specifications - including ±0.75LSB INL max and 94.7dB SNR - are guaranteed across this full range. For extended temperature applications, the H-grade LTC2364HDE-16#PBF (–40°C to +125°C) shares identical pinout and footprint.
Does LTC2364CDE-16#PBF require an external clock source?
No, LTC2364CDE-16#PBF does not require an external clock source. It integrates an internal oscillator that sets conversion time (tCONV = 1.9–3µs) and enforces fixed 4µs conversion cycle (tCYC). External timing is simplified to CNV edge triggering and SCK for serial readout - eliminating clock distribution complexity and jitter sensitivity in system design.
Can LTC2364CDE-16#PBF interface directly with a 1.8V microcontroller?
Yes, LTC2364CDE-16#PBF supports 1.8V logic directly via its OVDD pin. When OVDD = 1.8V, VIH = 1.44V (min) and VOL = 0.2V (max) ensure reliable communication with 1.8V MCUs. The SDO output is level-shifted to OVDD, and BUSY/CNV/RDL/SDI/SCK inputs are OVDD-referenced - enabling seamless integration without level translators.
What is the purpose of the dual REF pins (7 and 8) on LTC2364CDE-16#PBF?
The dual REF pins (7 and 8) provide low-impedance, parallel connection points for the external reference voltage (2.5V–5.1V), minimizing inductance and voltage drop under dynamic current demand. During each conversion, the internal CDAC draws transient charge from the REF pin; splitting the return path across two pins reduces IR drop and improves reference stability - directly supporting the guaranteed 94.7dB SNR and ±0.75LSB INL performance.
How does the pseudo-differential input architecture of LTC2364CDE-16#PBF improve noise immunity?
The pseudo-differential input (IN+, IN–) rejects common-mode noise by sampling the voltage difference while referencing IN– to local ground (±100mV range). Unlike true differential ADCs, it maintains unipolar 0V–VREF range on IN+, simplifying sensor interfacing. This architecture provides >80dB CMRR at 125kHz, making LTC2364CDE-16#PBF highly resilient to EMI and ground-loop interference in industrial and medical environments.
LTC2364CDE-16#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 250k
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.375V ~ 2.625V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 16-DFN (4x3)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2364CDE-16#PBF FAQ
1.How can I place an order for LTC2364CDE-16#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2364CDE-16#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2364CDE-16#PBF reliable?
The price and inventory of LTC2364CDE-16#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2364CDE-16#PBF is usually 5 days.
3.What payment methods are accepted for LTC2364CDE-16#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2364CDE-16#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2364CDE-16#PBF?
LTC2364CDE-16#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2364CDE-16#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2364CDE-16#PBF?
For technical support, including LTC2364CDE-16#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2364CDE-16#PBF requirements.
6.How does Aetrix verify that LTC2364CDE-16#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2364CDE-16#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2364CDE-16#PBF meets industry standards.
7.What is the process for return or replacement of LTC2364CDE-16#PBF?
All LTC2364CDE-16#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2364CDE-16#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2364CDE-16#PBF part is unused and in its original packaging.
Return procedure for LTC2364CDE-16#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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