Analog Devices Inc. LTC2364CDE-18#PBF
- Part No.:
- LTC2364CDE-18#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-WFDFN Exposed Pad
- Datasheet:
-
LTC2364CDE-18#PBF.pdf
- Description:
- IC ADC 18BIT SAR 16DFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,370
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC2364CDE-18#PBF from Analog Devices (formerly Linear Technology) is an 18-bit, 250ksps pseudo-differential unipolar successive approximation register (SAR) ADC operating from a single 2.5V supply. It delivers 97dB typical SNR, ±2.5LSB max INL, and guaranteed no missing codes at 18 bits, with VREF support from 2.5V to 5.1V. It is used in high-speed data acquisition systems requiring precision, low power, and wide dynamic range.
For engineers reviewing the LTC2364CDE-18#PBF datasheet, LTC2364CDE-18#PBF pinout, LTC2364CDE-18#PBF application, or LTC2364CDE-18#PBF equivalent, key selection criteria include its 250ksps throughput with zero cycle latency, SPI-compatible serial interface supporting 1.8V–5V I/O, internal conversion clock, and 4mm × 3mm DFN package with exposed thermal pad.
Technical Context
The LTC2364CDE-18#PBF implements a charge-redistribution SAR architecture with a pseudo-differential input stage where IN+ accepts 0V to VREF and IN– operates as a ground-sense node (±100mV). Conversion is initiated by a rising edge on CNV, and timing is fully self-contained via an internal oscillator - eliminating external clock dependencies.
Its SPI-compatible serial interface supports both normal mode (RDL/SDI as bus enable) and daisy-chain mode (RDL/SDI as SDI), with SDO outputting straight-binary 18-bit data MSB-first on SCK rising edges. Power management includes automatic power-down between conversions, reducing current draw to 0.9µA in shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 18-bit - delivers 262,144 discrete output levels for high dynamic range measurement. |
| Sampling Rate | 250ksps - enables real-time capture of signals up to 125kHz Nyquist bandwidth. |
| SNR (Typ) | 97dB at fIN = 2kHz, VREF = 5V - corresponds to ~19µV LSB noise floor, suitable for precision instrumentation. |
| INL (Max) | ±2.5LSB - ensures monotonicity and linearity critical for closed-loop control and calibration systems. |
| Power @ 250ksps | 3.4mW total (1.7mA VDD + 0.1mA OVDD + 0.2mA REF) - enables battery-powered portable instrumentation. |
| Reference Range | 2.5V to 5.1V - allows flexible full-scale scaling while maintaining 18-bit no-missing-codes performance. |
| Operating Temp | 0°C to 70°C - specified for commercial-grade embedded and industrial test equipment. |
Pinout & Package
Package: 16-lead (4mm × 3mm) plastic DFN with exposed GND pad (Pin 17), RoHS-compliant, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CHAIN (1) | Mode selector | High = daisy-chain mode (RDL/SDI becomes SDI); Low = normal mode (RDL/SDI enables SDO). |
| VDD (2) | Analog supply | 2.5V ±62.5mV supply for core ADC; bypass with 10µF ceramic capacitor to GND. |
| GND (3,6,10,16) | Analog/digital reference | Four dedicated GND pins minimize ground bounce; exposed pad (Pin 17) must be soldered to PCB ground plane. |
| IN+ (4) | Pseudo-differential input | Accepts 0V to VREF input voltage; sees 45pF sampling capacitance and 40Ω switch resistance during acquisition. |
| IN– (5) | Ground sense node | ±100mV range relative to GND; ties to system ground or remote ground point to reject common-mode noise. |
| REF (7,8) | Reference input | Dual-pin connection for 2.5V–5.1V external reference; requires 47µF X5R ceramic decoupling at pin. |
| CNV (9) | Convert trigger | Rising-edge–initiated conversion start; no minimum pulse width required; powers up ADC if in shutdown. |
| BUSY (11) | Status indicator | Active-high open-drain signal indicating conversion in progress; logic referenced to OVDD. |
| RDL/SDI (12) | Configurable I/O | Function depends on CHAIN state: bus enable (low) or serial data input (high); OVDD-referenced. |
| SCK (13) | Serial clock | Accepts up to 100MHz SCK (10ns min period); controls data shift-out timing on SDO. |
| SDO (14) | Serial data output | 18-bit straight-binary output MSB-first; tri-state when RDL/SDI = low in normal mode. |
| OVDD (15) | I/O supply | 1.71V–5.25V digital interface supply; sets logic thresholds for all digital pins; bypass with 0.1µF. |
Key Features
| Feature | Design Value |
|---|---|
| No pipeline delay / zero cycle latency | Enables deterministic real-time control loops without output buffering or timing uncertainty. |
| Internal conversion clock | Eliminates need for external timing circuitry; simplifies PCB layout and reduces BOM count. |
| Auto power-down between conversions | Reduces average power proportionally to sampling rate - e.g., 3.4µW at 250sps idle operation. |
| SPI-compatible interface with daisy-chain mode | Supports multi-ADC synchronization and compact wiring in dense channel-count systems. |
| Guaranteed 18-bit no missing codes | Ensures absolute monotonicity across full temperature range - critical for position sensing and metrology. |
| 1.8V–5V I/O voltage compatibility | Interoperates directly with FPGA, MCU, or ASIC I/O banks without level-shifting components. |
Applications
| Medical Imaging Signal Chain | Portable High-Speed Data Logger |
|---|---|
|
Use Scenario: Digitizing low-noise analog outputs from ultrasound beamformer channels or MRI gradient sensors. IC Role / Device Role / Timing Role: Primary 18-bit digitizer capturing transient RF envelope signals at 250ksps with minimal added noise. Use Value: 97dB SNR preserves weak signal integrity; ±2.5LSB INL ensures accurate amplitude mapping across imaging frames. |
Use Scenario: Battery-powered field recorder acquiring vibration, temperature, and pressure waveforms in industrial maintenance. IC Role / Device Role / Timing Role: Low-power SAR ADC enabling long-duration logging with microcontroller-triggered burst sampling. Use Value: 3.4mW active power and auto shutdown extend runtime; 250ksps captures transients missed by slower sigma-delta converters. |
| Industrial Process Control Loop | Automated Test Equipment (ATE) |
|
Use Scenario: Closed-loop feedback in servo drive systems measuring motor current and back-EMF for real-time torque regulation. IC Role / Device Role / Timing Role: High-accuracy analog front-end digitizer interfacing with isolation amplifiers and precision shunt monitors. Use Value: Zero cycle latency enables sub-microsecond control response; no missing codes prevents step errors in PID integrators. |
Use Scenario: Multi-channel parametric tester verifying analog IC performance across voltage, frequency, and temperature sweeps. IC Role / Device Role / Timing Role: Precision acquisition engine synchronized across multiple DUTs using daisy-chained CNV and BUSY signals. Use Value: Daisy-chain mode reduces GPIO count and routing complexity; 18-bit resolution meets Class I accuracy requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 18-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS8860IDRCT | 16-bit resolution, 1MSPS, 2.5V supply, SPI interface, no daisy-chain mode. | Higher speed but lower resolution; lacks chain mode and 18-bit monotonicity guarantee. | Select when 16-bit resolution suffices and >250ksps throughput is prioritized over SNR and linearity. |
| AD7960BCPZ-RL7 | 18-bit, 5MSPS, differential input, 5V supply, LVDS/CMOS parallel interface, no internal clock. | Requires external clock and high-speed interface design; higher power (43mW), larger 48-lead LFCSP package. | Select for ultra-high-speed applications where latency and interface bandwidth outweigh size and power constraints. |
Compared with ADS8860IDRCT and AD7960BCPZ-RL7, the LTC2364CDE-18#PBF uniquely balances 18-bit no-missing-codes assurance, 97dB SNR, 250ksps throughput, and ultra-low 3.4mW power in a compact DFN - making it optimal for space-constrained, battery-aware, high-fidelity acquisition where deterministic timing and minimal external components are essential.
Availability
LTC2364CDE-18#PBF is available at Aetrix Electronics and suitable for medical imaging signal chains, portable high-speed data loggers, and industrial process control systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LTC2364CDE-18#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC2364CDE-18#PBF belongs to ADI's legacy Linear Technology precision SAR ADC product line, engineered for applications demanding high resolution, low power, and deterministic timing - especially in portable instrumentation and high-fidelity data acquisition.
FAQ
What is the maximum sampling rate of the LTC2364CDE-18#PBF?
The LTC2364CDE-18#PBF achieves a guaranteed maximum sampling rate of 250ksps across its full 0°C to 70°C operating temperature range. This rate is supported with zero cycle latency and no pipeline delay, enabling immediate use of each conversion result in time-critical control or acquisition systems. The internal oscillator ensures consistent timing without external clock dependency.
Does the LTC2364CDE-18#PBF require an external reference voltage?
Yes, the LTC2364CDE-18#PBF requires an external reference voltage applied to the REF pins (7 and 8). It supports VREF from 2.5V to 5.1V, and performance specifications including 97dB SNR and ±2.5LSB INL are validated within this range. A low-noise, low-drift reference such as the LTC6655-5 is recommended to maintain datasheet accuracy.
What package type does the LTC2364CDE-18#PBF use?
The LTC2364CDE-18#PBF uses a 16-lead (4mm × 3mm) plastic DFN package with an exposed thermal pad (Pin 17), designated as the DE package. This RoHS-compliant package provides excellent thermal performance and compact footprint - ideal for space-constrained PCB layouts in portable and embedded systems.
How does the daisy-chain mode work on the LTC2364CDE-18#PBF?
Daisy-chain mode is enabled by driving the CHAIN pin (Pin 1) high. In this mode, RDL/SDI (Pin 12) functions as a serial data input, allowing multiple LTC2364CDE-18#PBF devices to share a single SCK and SDO line. Each device shifts its 18-bit result into the next, enabling synchronized multi-channel acquisition with minimal GPIO usage and simplified routing.
What is the power consumption of the LTC2364CDE-18#PBF at 250ksps?
At 250ksps, the LTC2364CDE-18#PBF consumes 3.4mW total - comprising 1.7mA from VDD (2.5V), 0.1mA from OVDD (e.g., 2.5V), and up to 0.2mA from the REF pin depending on VREF and code transitions. Its auto power-down feature further reduces current to 0.9µA in shutdown, making it suitable for duty-cycled or battery-operated applications.
LTC2364CDE-18#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 18
- Sampling Rate (Per Second):
- 250k
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.375V ~ 2.625V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 16-DFN (4x3)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2364CDE-18#PBF FAQ
1.How can I place an order for LTC2364CDE-18#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2364CDE-18#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2364CDE-18#PBF reliable?
The price and inventory of LTC2364CDE-18#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2364CDE-18#PBF is usually 5 days.
3.What payment methods are accepted for LTC2364CDE-18#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2364CDE-18#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2364CDE-18#PBF?
LTC2364CDE-18#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2364CDE-18#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2364CDE-18#PBF?
For technical support, including LTC2364CDE-18#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2364CDE-18#PBF requirements.
6.How does Aetrix verify that LTC2364CDE-18#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2364CDE-18#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2364CDE-18#PBF meets industry standards.
7.What is the process for return or replacement of LTC2364CDE-18#PBF?
All LTC2364CDE-18#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2364CDE-18#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2364CDE-18#PBF part is unused and in its original packaging.
Return procedure for LTC2364CDE-18#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC2364CDE-18#PBF Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
