Analog Devices Inc. LTC2364CMS-16#TRPBF
- Part No.:
- LTC2364CMS-16#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-TFSOP (0.118", 3.00mm Width)
- Datasheet:
-
LTC2364CMS-16#TRPBF.pdf
- Description:
- IC ADC 16BIT SAR 16MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2364CMS-16#TRPBF from Analog Devices (formerly Linear Technology) is a 16-bit pseudo-differential unipolar successive approximation register (SAR) ADC with 250ksps throughput, ±0.75LSB INL max, 94.7dB SNR (typ), and operation from a single 2.5V supply. It supports VREF from 2.5V to 5.1V and delivers no missing codes at 16 bits - ideal for high-speed data acquisition in portable instrumentation and industrial process control.
For engineers reviewing the LTC2364CMS-16#TRPBF datasheet, LTC2364CMS-16#TRPBF pinout, LTC2364CMS-16#TRPBF application, or LTC2364CMS-16#TRPBF equivalent, key selection criteria include guaranteed 125°C operation (H-grade variant), daisy-chain SPI interface compatibility, low 3.4mW power at full rate, and pseudo-differential input architecture enabling common-mode noise rejection in noisy environments.
Technical Context
The LTC2364CMS-16#TRPBF implements a charge-redistribution SAR architecture with internal conversion clock, eliminating external timing dependencies. Its pseudo-differential input stage uses IN+ and IN– pins with ±100mV common-mode range on IN–, supporting unipolar 0V to VREF sampling while rejecting shared noise.
It features dual supply domains: 2.5V analog core (VDD) and flexible 1.8V–5.25V digital I/O (OVDD), enabling direct interfacing with mixed-voltage host systems. Conversion is initiated by CNV rising edge, with BUSY signal indicating completion and zero-cycle latency - critical for deterministic real-time sampling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit - guarantees full-scale quantization into 65,536 discrete levels with no missing codes. |
| Sampling Rate | 250ksps - enables real-time capture of signals up to 125kHz Nyquist bandwidth. |
| SNR | 94.7dB (typ, fIN = 2kHz, VREF = 5V) - corresponds to ~15.8 effective bits (ENOB) under specified conditions. |
| INL | ±0.75LSB (max) - ensures monotonicity and linearity error within ±47µV (at 5V ref). |
| Power Consumption | 3.4mW at 250ksps - enables battery-operated designs with thermal headroom in compact enclosures. |
| Reference Range | 2.5V to 5.1V - allows system-level scaling of input dynamic range without changing hardware. |
| Operating Temp | 0°C to 70°C (C-grade) - validated for commercial temperature stability per MSOP package specification. |
Pinout & Package
Package: 16-lead plastic MSOP (small-outline package), 3mm × 4.9mm footprint, exposed pad not present (unlike DFN variant). Compatible with standard surface-mount reflow profiles.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CHAIN (1) | Mode selector | High = daisy-chain mode (RDL/SDI becomes serial input); low = normal mode (RDL/SDI enables SDO bus). |
| VDD (2) | Analog supply | 2.5V ±62.5mV core supply; bypass required with 10µF ceramic capacitor to GND. |
| GND (3,6,10,16) | Ground reference | Four dedicated ground pins minimize ground bounce and improve PSRR in high-speed operation. |
| IN+ (4) | Positive analog input | Pseudo-differential input with 0V to VREF range; sees 45pF capacitance during acquisition phase. |
| IN– (5) | Common-mode sense | Accepts ±100mV relative to GND; must be tied to ground plane or remote sense point for CMRR optimization. |
| REF (7,8) | Reference voltage input | Dual-pin connection for low-impedance decoupling; requires 47µF X5R ceramic capacitor close to pins. |
| CNV (9) | Convert trigger | Rising-edge–initiated conversion; powers up ADC and starts acquisition cycle with no setup delay. |
| BUSY (11) | Status indicator | Active-high open-drain output signaling conversion in progress; synchronized to internal clock. |
| RDL/SDI (12) | Serial control/data input | Function depends on CHAIN state: bus enable (low) or serial data input (high) - supports multi-device chains. |
| SCK (13) | Serial clock | Accepts 10ns min period (100MHz max); controls MSB-first data shift timing for SDO output. |
| SDO (14) | Serial data output | 3-state output driven by OVDD; outputs straight-binary 16-bit code aligned to SCK rising edges. |
| OVDD (15) | I/O supply | 1.71V–5.25V logic interface supply; sets VIH/VIL thresholds and drives SDO/SCK/RDL/SDI/BUSY levels. |
Key Features
| Feature | Design Value |
|---|---|
| No pipeline delay / zero cycle latency | Enables immediate post-conversion processing without FIFO buffering or timing uncertainty. |
| Internal conversion oscillator | Removes need for external clock source or precise timing circuitry - simplifies PCB layout and BOM. |
| Auto power-down between conversions | Reduces average power proportionally to sampling rate; drops to 3.4µW at 250sps for ultra-low-power wake-on-event use. |
| SPI-compatible daisy-chain mode | Allows synchronous readout of multiple LTC2364-16 devices using single SCK/SCKCH line - cuts GPIO count in multi-channel systems. |
| Guaranteed operation to 125°C (H-grade variants) | Validated thermal performance enables deployment in engine control units, downhole tools, and industrial motor drives. |
Applications
| Medical Imaging Signal Chain | Portable Data Logger |
|---|---|
|
Use Scenario: Digitizing low-amplitude analog outputs from ultrasound transducer front-ends or ECG amplifiers with minimal added noise. IC Role / Device Role / Timing Role: Primary SAR ADC capturing 250ksps waveform data with 94.7dB SNR to preserve diagnostic fidelity in time-domain and frequency-domain analysis. Use Value: Enables >15-bit ENOB performance without oversampling or external filtering, reducing system latency and FPGA resource usage. |
Use Scenario: Battery-powered environmental sensor node acquiring temperature, pressure, and humidity over extended field deployments. IC Role / Device Role / Timing Role: Low-power 16-bit ADC operating at variable sample rates (250sps–250ksps) with automatic power-down to extend battery life. Use Value: 3.4µW standby current at 250sps and 3.4mW active power allow multi-year operation on coin-cell batteries. |
| Industrial Process Controller | Automated Test Equipment (ATE) |
|
Use Scenario: Closed-loop feedback acquisition in PLC analog I/O modules monitoring motor current, voltage, and position signals. IC Role / Device Role / Timing Role: High-accuracy, deterministic-sampling ADC with ±0.75LSB INL and no missing codes ensuring reliable fault detection and PID computation. Use Value: Eliminates calibration drift concerns across 0°C–70°C ambient range, reducing maintenance intervals and field recalibration costs. |
Use Scenario: Multi-channel precision measurement subsystem validating DUT performance across DC and AC stimulus conditions. IC Role / Device Role / Timing Role: Synchronized sampling node in modular ATE rack, leveraging daisy-chain SPI to coordinate 8+ channels with sub-microsecond skew. Use Value: 250ksps throughput with zero latency enables real-time pass/fail decisions on production-line test cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7960BCPZ | 2.5MSPS, 18-bit, differential input only; requires external reference and driver; consumes 39mW at full rate. | Targeted at higher-resolution, lower-throughput metrology; lacks pseudo-differential flexibility and integrated reference buffer. | Select when ENOB >16.5 bits is mandatory and power budget allows >10× increase; not drop-in due to pinout, drive, and timing differences. |
| ADS8860IDRCT | 1MSPS, 16-bit, pseudo-differential; 1.8V supply; 4.8mW at 1MSPS; no daisy-chain mode; max temp 85°C. | Optimized for ultra-low-voltage portable systems; lacks 125°C H-grade option and chain-mode synchronization. | Prefer for battery-powered handheld instruments where 1.8V IO compatibility is essential and 250ksps is sufficient. |
Compared with AD7960BCPZ and ADS8860IDRCT, the LTC2364CMS-16#TRPBF uniquely balances 250ksps speed, 16-bit accuracy, ultra-low 3.4mW power, and daisy-chain capability in a compact MSOP - making it optimal for space-constrained, thermally demanding, multi-channel embedded data acquisition.
Availability
LTC2364CMS-16#TRPBF is available at Aetrix Electronics and suitable for medical imaging signal chains, portable data loggers, and industrial process controllers requiring stable component supply with guaranteed long-term manufacturability and consistent parametric performance.
Supply support for LTC2364CMS-16#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC2364-16 belongs to ADI's precision SAR ADC product line, engineered for applications demanding high resolution, low power, and deterministic timing - especially where thermal robustness and SPI interoperability are critical.
FAQ
What is the maximum recommended reference voltage for LTC2364CMS-16#TRPBF?
The LTC2364CMS-16#TRPBF supports VREF from 2.5V to 5.1V per Absolute Maximum Ratings and Electrical Characteristics tables. Operation above 5.1V risks damage; 5.0V is commonly used to maximize SNR and maintain margin. The REF pin draws up to 0.2mA at 250ksps, so the reference source must sustain this load without droop exceeding 0.5LSB (e.g., <125µV at 5V).
Does LTC2364CMS-16#TRPBF require external clocking for conversion timing?
No - the LTC2364CMS-16#TRPBF integrates an internal oscillator that sets conversion time (tCONV = 1.9–3µs). External clocking is unnecessary for basic operation; only the SCK signal is needed for serial data readout. This eliminates timing jitter from external sources and simplifies system-level clock tree design.
Can LTC2364CMS-16#TRPBF operate with 1.8V digital I/O while using 2.5V analog supply?
Yes - the LTC2364CMS-16#TRPBF separates analog (VDD = 2.5V) and digital I/O (OVDD = 1.71V–5.25V) supplies. With OVDD = 1.8V, VIH = 1.44V and VIL = 0.36V are guaranteed, enabling direct interfacing to 1.8V FPGAs or microcontrollers without level shifters.
How does the pseudo-differential input architecture of LTC2364CMS-16#TRPBF improve noise immunity?
The LTC2364CMS-16#TRPBF accepts IN+ (0V to VREF) and IN– (±100mV around GND), rejecting common-mode noise coupled equally to both inputs. With 80dB CMRR at 125kHz, it suppresses interference from switching power supplies or motor drives - critical in industrial settings where ground loops and EMI degrade single-ended measurements.
Is LTC2364CMS-16#TRPBF pin-compatible with other variants like LTC2364IMS-16#TRPBF?
Yes - all LTC2364-16 MSOP variants (C/I/H grades) share identical 16-lead MSOP pinout and footprint. The LTC2364CMS-16#TRPBF (0°C to 70°C) can be substituted with LTC2364IMS-16#TRPBF (–40°C to 85°C) or LTC2364HMS-16#TRPBF (–40°C to 125°C) without PCB changes, provided thermal and reliability requirements align.
LTC2364CMS-16#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TFSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 250k
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.375V ~ 2.625V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 16-MSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2364CMS-16#TRPBF FAQ
1.How can I place an order for LTC2364CMS-16#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2364CMS-16#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2364CMS-16#TRPBF reliable?
The price and inventory of LTC2364CMS-16#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2364CMS-16#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC2364CMS-16#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2364CMS-16#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2364CMS-16#TRPBF?
LTC2364CMS-16#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2364CMS-16#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2364CMS-16#TRPBF?
For technical support, including LTC2364CMS-16#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2364CMS-16#TRPBF requirements.
6.How does Aetrix verify that LTC2364CMS-16#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC2364CMS-16#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2364CMS-16#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC2364CMS-16#TRPBF?
All LTC2364CMS-16#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2364CMS-16#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2364CMS-16#TRPBF part is unused and in its original packaging.
Return procedure for LTC2364CMS-16#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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