Analog Devices Inc. LTC2364IMS-16#PBF
- Part No.:
- LTC2364IMS-16#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-TFSOP (0.118", 3.00mm Width)
- Datasheet:
-
LTC2364IMS-16#PBF.pdf
- Description:
- IC ADC 16BIT SAR 16MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,571
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC2364IMS-16#PBF from Analog Devices (formerly Linear Technology) is a 16-bit pseudo-differential unipolar successive approximation register (SAR) ADC optimized for high-speed, low-noise data acquisition. Operating from a single 2.5V supply with 2.5V–5.1V external reference support, it delivers 250ksps throughput, ±0.75LSB INL (max), guaranteed no missing codes, and 94.7dB typical SNR at 2kHz input-enabling precision measurement in portable instrumentation and industrial process control.
For engineers reviewing the LTC2364IMS-16#PBF datasheet, LTC2364IMS-16#PBF pinout, LTC2364IMS-16#PBF application, or LTC2364IMS-16#PBF equivalent, key selection considerations include its 16-lead MSOP package with –40°C to +85°C operating range, SPI-compatible serial interface with daisy-chain mode, internal conversion clock eliminating external timing constraints, and ultra-low 3.4mW power consumption at full speed.
Technical Context
The LTC2364IMS-16#PBF implements a charge-redistribution SAR architecture with a 16-bit CDAC and differential comparator, sampling the pseudo-differential IN+/IN– input during acquisition and executing binary-weighted voltage comparisons against VREF during conversion. It features no pipeline delay or cycle latency, enabling deterministic real-time sampling.
Its dual-supply design separates analog core (VDD = 2.5V) from digital I/O (OVDD = 1.8V–5.25V), supporting interoperability with mixed-voltage host systems. The internal oscillator governs conversion timing (tCONV = 1.9–3µs), while automatic power-down between conversions scales quiescent current from 1.7mA at 250ksps to 0.9µA in idle state.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit-guarantees full-scale quantization into 65,536 discrete levels with no missing codes. |
| Sampling Rate | 250ksps-supports real-time capture of signals up to 125kHz Nyquist bandwidth without undersampling. |
| SNR | 94.7dB typical at fIN = 2kHz, VREF = 5V-enables >15.7 effective number of bits (ENOB) in narrowband applications. |
| INL | ±0.75LSB maximum over temperature-ensures monotonicity and linearity critical for closed-loop control feedback. |
| Power Consumption | 3.4mW at 250ksps, 3.4µW at 250sps-facilitates battery-powered operation with dynamic power scaling. |
| Reference Range | 2.5V to 5.1V-allows flexible full-scale adjustment while maintaining 76µV LSB size at 5V reference. |
| Operating Temperature | –40°C to +85°C-qualified for industrial environments without derating. |
Pinout & Package
Package: 16-lead plastic MSOP (4.0mm × 3.0mm × 1.1mm), exposed pad not present (DFN variant has exposed pad; MSOP does not).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| CHAIN (1) | Mode selector | Low = normal SPI mode (RDL/SDI enables SDO); high = daisy-chain mode (RDL/SDI becomes SDI input). |
| VDD (2) | Analog core supply | 2.375V–2.625V; powers SAR core and reference buffer-requires 10µF ceramic bypass to GND. |
| GND (3,6,10,16) | Ground reference | Four dedicated ground pins minimize ground bounce and improve PSRR in high-speed sampling. |
| IN+ (4) | Pseudo-differential analog input (+) | Accepts 0V to VREF input; sees 45pF sampling capacitance and 40Ω switch resistance during acquisition. |
| IN– (5) | Pseudo-differential analog input (–) | Common-mode sense node; ±100mV range relative to GND-must connect to ground plane or remote sense point. |
| REF (7,8) | Reference voltage inputs | Dual-pin connection for low-impedance 2.5V–5.1V reference; requires 47µF X5R ceramic decoupling at pin. |
| CNV (9) | Convert trigger | Rising-edge–initiated conversion start; powers up ADC and begins acquisition phase-no minimum pulse width required. |
| BUSY (11) | Conversion status indicator | Active-high open-drain output signaling conversion progress; logic level referenced to OVDD. |
| RDL/SDI (12) | Serial bus control / data input | Function depends on CHAIN state; enables SDO tri-state (normal) or accepts daisy-chain data (chain mode). |
| SCK (13) | Serial clock input | Accepts 10ns min period (100MHz max); rising edge clocks out MSB-first 16-bit straight-binary result on SDO. |
| SDO (14) | Serial data output | Three-state output driven by OVDD; outputs conversion result or daisy-chain data synchronized to SCK. |
| OVDD (15) | Digital I/O supply | 1.71V–5.25V-sets logic thresholds for all digital pins, enabling direct interfacing with 1.8V/2.5V/3.3V/5V controllers. |
Key Features
| Feature | Design Value |
|---|---|
| No cycle latency | Immediate data availability after BUSY goes low-eliminates pipeline delay for time-critical control loops. |
| Auto power-down | Reduces supply current to 0.9µA between conversions-cuts average power in burst-sampling applications. |
| SPI-compatible interface | Supports 1.8V–5V logic levels and daisy-chain mode-enables multi-ADC synchronization without additional glue logic. |
| Guaranteed 16-bit no missing codes | Validated across –40°C to +85°C-ensures monotonic response in safety-critical sensor interfaces. |
| Internal conversion clock | Removes need for external timing circuitry-simplifies PCB layout and reduces BOM count. |
Applications
| Medical Imaging Signal Chain | Portable Data Logger |
|---|---|
Use Scenario: Digitizing low-amplitude analog outputs from ultrasound transducer front-ends or ECG amplifiers with minimal added noise. IC Role / Device Role / Timing Role: Primary SAR ADC capturing baseband signals at 250ksps with 94.7dB SNR to preserve diagnostic fidelity. Use Value: Enables 16-bit resolution without oversampling or digital filtering-reducing FPGA/DSP processing load in handheld scanners. |
Use Scenario: Battery-powered environmental monitoring node recording temperature, pressure, and humidity over extended periods. IC Role / Device Role / Timing Role: Low-power ADC sampling sensors at variable rates (250sps–250ksps) with automatic power-down between samples. Use Value: 3.4µW idle power extends battery life to years in low-duty-cycle deployments while maintaining 16-bit accuracy. |
| Industrial PLC Analog Input Module | Automated Test Equipment (ATE) |
Use Scenario: High-density I/O card acquiring multiple sensor channels in factory automation with tight channel-to-channel isolation. IC Role / Device Role / Timing Role: Precision ADC with pseudo-differential inputs rejecting common-mode noise from motor drives and switching power supplies. Use Value: 80dB CMRR at 125kHz and ±0.75LSB INL ensure accurate readings despite electrically noisy plant-floor environments. |
Use Scenario: High-speed functional test system validating mixed-signal ICs using fast, repeatable DC and AC parametric measurements. IC Role / Device Role / Timing Role: Reference-grade ADC providing traceable 16-bit measurements with <1LSB integral nonlinearity for calibration verification. Use Value: 94.7dB SNR and –120dB THD enable precise characterization of device spectral performance without external averaging. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7682BCPZ-RL7 | 250ksps, 16-bit, pseudo-differential, but requires external reference and has higher 5.5mW power at full speed. | Lacks integrated reference buffer and daisy-chain mode-needs external REF driver and additional logic for multi-ADC sync. | Choose when existing design uses ADI ecosystem and external reference is already available; avoid if minimizing board area is critical. |
| ADS8860IDRCT | 16-bit, 1MSPS, but unipolar single-ended only and consumes 11mW at full speed-no pseudo-differential input or auto power-down. | Higher speed trades off noise performance (89dB SNR) and power efficiency-unsuitable for battery operation or noise-sensitive inputs. | Choose only for applications requiring >250ksps with relaxed SNR requirements; not a drop-in replacement due to different input structure and pinout. |
Compared with AD7682BCPZ-RL7 and ADS8860IDRCT, the LTC2364IMS-16#PBF uniquely combines pseudo-differential input, internal clock, daisy-chain capability, and sub-4mW power at 250ksps-making it optimal for space-constrained, low-noise, multi-channel industrial and portable systems where signal integrity and energy efficiency are co-prioritized.
Availability
LTC2364IMS-16#PBF is available at Aetrix Electronics and suitable for medical imaging signal chains, portable data loggers, and industrial PLC analog input modules requiring stable component supply with guaranteed long-term manufacturability.
Supply support for LTC2364IMS-16#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed through the acquisition of Linear Technology in 2017.
The LTC2364IMS-16#PBF belongs to ADI's precision SAR ADC product line, engineered for applications demanding high resolution, low power, and robust noise immunity-including portable instrumentation, industrial control, and medical diagnostics.
FAQ
What is the operating temperature range for the LTC2364IMS-16#PBF?
The LTC2364IMS-16#PBF is rated for operation from –40°C to +85°C, making it suitable for industrial environments where ambient temperatures exceed commercial grade limits. All key specifications-including INL, SNR, and power consumption-are guaranteed across this full range, with no derating required.
Does the LTC2364IMS-16#PBF require an external reference voltage?
Yes, the LTC2364IMS-16#PBF requires an external reference voltage applied to the REF pins (7 and 8). It supports 2.5V to 5.1V references, and performance metrics like SNR and INL are specified with a 5V reference. A low-noise, low-drift reference such as the LTC6655-5 is recommended to achieve datasheet performance.
How does the daisy-chain mode work on the LTC2364IMS-16#PBF?
Daisy-chain mode is enabled by pulling the CHAIN pin (1) high. In this mode, RDL/SDI (12) becomes a serial data input, allowing multiple LTC2364IMS-16#PBF devices to share one SCK and SDO line. Conversion results cascade through the chain, reducing GPIO count and simplifying synchronization in multi-channel systems.
What is the significance of the pseudo-differential input architecture in the LTC2364IMS-16#PBF?
The pseudo-differential input (IN+, IN–) rejects common-mode noise while maintaining unipolar input range (0V to VREF). IN– serves as a ground sense node (±100mV range), enabling accurate measurement in noisy environments-such as motor drives or switching power supplies-without requiring true differential signal sources.
Can the LTC2364IMS-16#PBF interface directly with a 1.8V microcontroller?
Yes-the LTC2364IMS-16#PBF supports 1.8V to 5V logic levels via the OVDD pin (15). When OVDD = 1.8V, all digital inputs (CNV, SCK, CHAIN, RDL/SDI) recognize 0.2×OVDD and 0.8×OVDD thresholds, and SDO outputs are compatible with 1.8V receivers-enabling seamless integration with ultra-low-voltage MCUs without level shifters.
LTC2364IMS-16#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TFSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 250k
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.375V ~ 2.625V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 16-MSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2364IMS-16#PBF FAQ
1.How can I place an order for LTC2364IMS-16#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2364IMS-16#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2364IMS-16#PBF reliable?
The price and inventory of LTC2364IMS-16#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2364IMS-16#PBF is usually 5 days.
3.What payment methods are accepted for LTC2364IMS-16#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2364IMS-16#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2364IMS-16#PBF?
LTC2364IMS-16#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2364IMS-16#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2364IMS-16#PBF?
For technical support, including LTC2364IMS-16#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2364IMS-16#PBF requirements.
6.How does Aetrix verify that LTC2364IMS-16#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2364IMS-16#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2364IMS-16#PBF meets industry standards.
7.What is the process for return or replacement of LTC2364IMS-16#PBF?
All LTC2364IMS-16#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2364IMS-16#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2364IMS-16#PBF part is unused and in its original packaging.
Return procedure for LTC2364IMS-16#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC2364IMS-16#PBF Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

