Analog Devices Inc. LTC2364IMS-18#PBF
- Part No.:
- LTC2364IMS-18#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-TFSOP (0.118", 3.00mm Width)
- Datasheet:
-
LTC2364IMS-18#PBF.pdf
- Description:
- IC ADC 18BIT SAR 16MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2364IMS-18#PBF from Analog Devices (formerly Linear Technology) is an 18-bit, 250ksps pseudo-differential unipolar successive approximation register (SAR) ADC operating from a single 2.5V supply. It delivers 97dB typical SNR, ±2.5LSB max INL, and guaranteed no missing codes at 18 bits, with VREF support from 2.5V to 5.1V. Designed for high-speed data acquisition in industrial process control and portable instrumentation.
For engineers reviewing the LTC2364IMS-18#PBF datasheet, LTC2364IMS-18#PBF pinout, LTC2364IMS-18#PBF application, or LTC2364IMS-18#PBF equivalent, key selection criteria include its 250ksps throughput with zero cycle latency, internal conversion clock, SPI-compatible serial interface supporting 1.8V–5V I/O, and operation across –40°C to +85°C.
Technical Context
The LTC2364IMS-18#PBF implements a charge redistribution capacitor DAC (CDAC) architecture with pseudo-differential sampling, where IN+ accepts 0V to VREF and IN– operates as a ground-sense input with ±100mV range. Conversion is initiated by a rising edge on CNV, and the internal oscillator eliminates external timing dependencies.
Its SPI-compatible serial interface supports both normal mode (RDL/SDI as bus enable) and daisy-chain mode (RDL/SDI as SDI), with SDO outputting straight-binary 18-bit data MSB-first on SCK rising edges. Power-down between conversions reduces current to 0.9µA at 250sps, scaling dynamically with sample rate.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 18-bit - delivers 262,144 distinct output levels for high dynamic range measurement |
| Sampling Rate | 250ksps - enables real-time capture of signals up to 125kHz Nyquist bandwidth |
| SNR | 97dB typical at fIN = 2kHz - supports >16 effective bits (ENOB ≈ 16.1) under standard conditions |
| INL | ±2.5LSB maximum - ensures monotonicity and accurate full-scale linearity across temperature |
| Power Consumption | 3.4mW at 250ksps - enables battery-operated designs with low thermal footprint |
| VREF Range | 2.5V to 5.1V - allows flexible signal scaling while maintaining LSB size from 9.5µV to 19µV |
| Operating Temp | –40°C to +85°C - qualified for industrial environments without derating |
Pinout & Package
Package: 16-lead plastic MSOP (small outline package), 3mm × 4.9mm body, exposed pad not present (unlike DFN variant). Pin pitch: 0.65mm. RoHS-compliant lead-free finish (#PBF).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CHAIN (1) | Mode selector | High enables daisy-chain mode (RDL/SDI becomes serial input); low enables normal mode (RDL/SDI acts as bus enable) |
| VDD (2) | Analog power supply | 2.5V ±62.5mV supply; powers core ADC and reference buffer; requires 10µF ceramic bypass to GND |
| GND (3,6,10,16) | Analog/digital ground | Four dedicated GND pins minimize ground bounce and improve PSRR; must be connected to low-impedance ground plane |
| IN+ (4) | Pseudo-differential analog input | Accepts 0V to VREF input voltage; sees 45pF sampling capacitance and 40Ω switch resistance during acquisition |
| IN– (5) | Ground sense reference | Input range ±100mV w.r.t. GND; used to reject common-mode noise; must connect to local ground or remote sense point |
| REF (7,8) | Reference voltage inputs | Dual-pin connection for low-inductance decoupling; accepts 2.5V–5.1V; requires 47µF X5R ceramic capacitor at pin |
| CNV (9) | Convert trigger | Rising-edge–sensitive; initiates acquisition and conversion; minimum high time 20ns; no pipeline delay |
| BUSY (11) | Conversion status indicator | Active-high open-drain output; asserts ~13ns after CNV↑; deasserts when 18-bit result is ready for readout |
| RDL/SDI (12) | Configurable serial I/O | Function depends on CHAIN state; in chain mode, receives serial data from upstream ADC in daisy chain |
| SCK (13) | Serial clock input | Accepts 10ns min period (100MHz max); controls timing of SDO output and SDI sampling; logic level referenced to OVDD |
| SDO (14) | Serial data output | MSB-first straight-binary 18-bit output; valid 9.5ns after SCK↑ (CL = 20pF); driven to OVDD/GND rails |
| OVDD (15) | I/O interface supply | 1.71V–5.25V digital supply; sets logic thresholds for all digital pins; bypass with 0.1µF ceramic capacitor |
Key Features
| Feature | Design Value |
|---|---|
| No missing codes at 18 bits | Guaranteed monotonic transfer function across full temperature range, eliminating code ambiguity in precision systems |
| Internal conversion clock | Removes need for external timing circuitry or master clock synchronization, simplifying PCB layout and reducing BOM count |
| Zero cycle latency | Each conversion completes before next CNV edge arrives - enables deterministic real-time control loop timing |
| Auto power-down between conversions | Reduces average current to sub-µA levels during idle periods, critical for burst-mode battery-powered applications |
| 1.8V–5V I/O compatibility | Interoperates directly with mixed-voltage host systems (e.g., 1.8V FPGA, 3.3V MCU) without level shifters or additional logic |
Applications
| Medical Imaging Signal Chain | Industrial Process Monitoring |
|---|---|
Use Scenario: Digitizing low-noise analog outputs from ultrasound transducer front-ends or MRI gradient amplifiers requiring high resolution and low distortion. IC Role / Device Role / Timing Role: Primary SAR ADC capturing 18-bit samples at 250ksps with 97dB SNR to preserve diagnostic image fidelity and contrast resolution. Use Value: Enables >16-bit ENOB performance without oversampling or digital filtering, reducing post-processing latency in real-time imaging pipelines. | Use Scenario: High-accuracy monitoring of pressure, temperature, and flow sensors in PLC-based factory automation systems operating across wide ambient temperatures. IC Role / Device Role / Timing Role: Precision analog-to-digital converter interfacing with isolated sensor signal conditioners, delivering stable 18-bit readings over –40°C to +85°C. Use Value: ±2.5LSB INL and guaranteed no missing codes ensure traceable calibration compliance and eliminate interpolation errors in closed-loop control feedback paths. |
| Portable Test Equipment | Battery-Powered Data Loggers |
Use Scenario: Handheld oscilloscopes and spectrum analyzers requiring high-resolution waveform capture with minimal power draw and compact form factor. IC Role / Device Role / Timing Role: Core ADC in multi-channel acquisition subsystem, leveraging daisy-chain mode to reduce SPI bus loading and simplify routing on dense PCBs. Use Value: 3.4mW active power and auto power-down cut system-level battery load, extending field operation time without sacrificing 250ksps throughput. | Use Scenario: Environmental monitoring nodes deployed in remote locations, acquiring slow-varying sensor data (e.g., soil moisture, air quality) with infrequent bursts of high-rate sampling. IC Role / Device Role / Timing Role: Low-power ADC triggered by microcontroller wake-up events, achieving 0.9µA shutdown current and fast 4µs conversion cycle time. Use Value: Sub-µA quiescent current during idle periods and rapid wake-to-acquisition response enable multi-year battery life in IoT edge deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 18-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS8860IDRCT | 16-bit resolution, 1MSPS max, SPI interface, 2.5V supply, 92dB SNR | Higher speed but lower resolution; lacks daisy-chain mode and wider VREF range | Select when 16-bit resolution suffices and >250ksps sampling is required; verify reference drive capability for 1MSPS operation |
| AD7960BCPZ-RL7 | 18-bit, 5MSPS, differential input, 3.3V supply, 96dB SNR, LVDS interface | Higher speed and differential input, but requires external reference and complex LVDS timing; no auto power-down | Choose for ultra-high-speed applications with FPGA/LVDS infrastructure; avoid if system lacks LVDS receivers or needs low-power burst operation |
Compared with ADS8860IDRCT and AD7960BCPZ-RL7, the LTC2364IMS-18#PBF uniquely balances 18-bit precision, 250ksps throughput, ultra-low power (3.4mW), integrated daisy-chain capability, and wide VREF flexibility - making it optimal for space-constrained, battery-aware industrial and portable instrumentation where resolution and ease of integration outweigh raw speed.
Availability
LTC2364IMS-18#PBF is available at Aetrix Electronics and suitable for industrial process control, portable instrumentation, and medical imaging systems requiring stable component supply, extended temperature operation, and long-term design-in continuity.
Supply support for LTC2364IMS-18#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC2364IMS-18#PBF belongs to ADI's legacy Linear Technology precision SAR ADC product line, engineered specifically for high-resolution, low-power, high-speed data acquisition in demanding industrial and portable applications.
FAQ
What is the maximum sampling rate supported by the LTC2364IMS-18#PBF?
The LTC2364IMS-18#PBF supports a maximum sampling rate of 250ksps, with guaranteed timing performance across its full operating temperature range (–40°C to +85°C). At this rate, conversion time is 1.9–3µs and cycle time is 4µs, enabling deterministic real-time acquisition without pipeline delay or cycle latency.
Does the LTC2364IMS-18#PBF require an external reference voltage?
Yes, the LTC2364IMS-18#PBF requires an external reference voltage applied to the REF pins (7 and 8). It accepts VREF from 2.5V to 5.1V, and the reference must be low-noise and low-drift to achieve datasheet performance. The LTC6655-5 is a recommended companion reference for high-precision applications.
How does the daisy-chain mode work on the LTC2364IMS-18#PBF?
Daisy-chain mode is enabled by driving the CHAIN pin (1) high. In this mode, RDL/SDI (12) becomes a serial data input, allowing multiple LTC2364IMS-18#PBF devices to share one SPI bus. Each device shifts its 18-bit result into the next, enabling synchronized multi-channel acquisition with minimal GPIO usage.
What is the power consumption of the LTC2364IMS-18#PBF at 250ksps?
At 250ksps, the LTC2364IMS-18#PBF consumes 3.4mW total (1.36mA from VDD and 0.1mA from OVDD, plus reference current). Its auto power-down feature reduces current to just 0.9µA in shutdown mode, making it highly efficient for burst-sampling or battery-powered use cases.
Is the LTC2364IMS-18#PBF pin-compatible with other variants in the LTC2364-18 family?
Yes, the LTC2364IMS-18#PBF shares identical pinout and functionality with other MSOP-packaged variants (e.g., LTC2364CMS-18#PBF, LTC2364HMS-18#PBF), differing only in temperature grade (–40°C to +85°C for the 'I' grade). All MSOP versions use the same 16-pin layout, PCB footprint, and electrical interface.
LTC2364IMS-18#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TFSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 18
- Sampling Rate (Per Second):
- 250k
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.375V ~ 2.625V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 16-MSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2364IMS-18#PBF FAQ
1.How can I place an order for LTC2364IMS-18#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2364IMS-18#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2364IMS-18#PBF reliable?
The price and inventory of LTC2364IMS-18#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2364IMS-18#PBF is usually 5 days.
3.What payment methods are accepted for LTC2364IMS-18#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2364IMS-18#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2364IMS-18#PBF?
LTC2364IMS-18#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2364IMS-18#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2364IMS-18#PBF?
For technical support, including LTC2364IMS-18#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2364IMS-18#PBF requirements.
6.How does Aetrix verify that LTC2364IMS-18#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2364IMS-18#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2364IMS-18#PBF meets industry standards.
7.What is the process for return or replacement of LTC2364IMS-18#PBF?
All LTC2364IMS-18#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2364IMS-18#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2364IMS-18#PBF part is unused and in its original packaging.
Return procedure for LTC2364IMS-18#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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