Analog Devices Inc. LTC2377IDE-20#PBF
- Part No.:
- LTC2377IDE-20#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-WFDFN Exposed Pad
- Datasheet:
-
LTC2377IDE-20#PBF.pdf
- Description:
- IC ADC 20BIT SAR 16DFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,041
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC2377IDE-20#PBF from Analog Devices (formerly Linear Technology) is a 20-bit, 500ksps successive approximation register (SAR) analog-to-digital converter with ±0.5ppm typical integral nonlinearity, 104dB SNR at 2kHz, and digital gain compression (DGC) for single-supply amplifier interfacing. It operates from a 2.5V analog supply and supports ±VREF fully differential input ranges with VREF from 2.5V to 5.1V, targeting high-precision data acquisition in medical imaging and portable instrumentation.
For engineers reviewing the LTC2377IDE-20#PBF datasheet, LTC2377IDE-20#PBF pinout, LTC2377IDE-20#PBF application, or LTC2377IDE-20#PBF equivalent, key selection criteria include guaranteed 20-bit no-missing-codes performance, daisy-chain SPI interface compatibility across 1.8V–5V logic levels, internal conversion clock, and DGC-enabled 0.5V–4.5V input range with 5V reference.
Technical Context
The LTC2377IDE-20#PBF implements a charge-redistribution SAR architecture with a 20-bit CDAC and differential comparator, achieving no pipeline delay and zero cycle latency. Its internal oscillator eliminates external timing dependencies, while auto power-down between conversions scales dissipation from 10.5mW at 500ksps to 10.5µW at 500sps.
Digital gain compression (DGC) remaps the transfer function so zero-scale shifts from 0V to 0.1·VREF and full-scale from VREF to 0.9·VREF, enabling rail-to-rail input swing without negative supply for driving amplifiers. The device supports daisy-chain mode via CHAIN pin control and SPI-compatible serial I/O with MSB-first 2's complement output.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 20-bit SAR ADC with guaranteed no missing codes - ensures monotonicity and full dynamic range utilization in precision measurement systems. |
| Sampling Rate | 500ksps maximum throughput - enables real-time capture of signals up to 34MHz bandwidth (–3dB input BW) without latency. |
| INL | ±0.5ppm typical, ±2ppm max - delivers sub-1ppm linearity error critical for metrology-grade calibration and sensor digitization. |
| SNR | 104dB typical at fIN = 2kHz with 5V reference - supports >17 effective bits (ENOB) for low-noise signal chain design. |
| Power Dissipation | 10.5mW at 500ksps, 10.5µW at 500sps - ultra-low active and standby power ideal for battery-operated instrumentation. |
| Reference Range | VREF = 2.5V to 5.1V - allows flexible scaling from low-voltage portable systems to industrial full-scale ranges. |
| Digital Interface | SPI-compatible with 1.8V–5V OVDD support and daisy-chain mode - simplifies multi-channel synchronization without FPGA logic overhead. |
Pinout & Package
Package: 16-lead (4mm × 3mm) plastic DFN with exposed pad (Pin 17 = GND). Rated for –40°C to +85°C operation (I-grade).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CHAIN (1) | Mode selector | Low = normal SPI mode (RDL/SDI = bus enable); high = daisy-chain mode (RDL/SDI = serial data input). |
| VDD (2) | Analog supply | 2.5V ±62.5mV supply for core ADC; requires 10µF ceramic bypass to GND for noise immunity. |
| GND (3,6,10,16) | Ground reference | Four dedicated ground pins minimize ground bounce; exposed pad (Pin 17) must be soldered to PCB ground plane. |
| IN+, IN– (4,5) | Differential analog inputs | ±VREF fully differential input with 45pF sampling capacitance; require matched 10Ω–50Ω source impedances for optimal linearity. |
| REF (7) | Reference voltage input | 2.5V–5.1V external reference; decoupled with 47µF X7R ceramic capacitor (1210 size, 10V rating). |
| REF/DGC (8) | Reference/DGC control | Tied to REF = standard ±VREF range; tied to GND = DGC enabled (0.1·VREF to 0.9·VREF input span). |
| CNV (9) | Convert trigger | Rising edge initiates conversion and powers up ADC; timing-critical for synchronous sampling applications. |
| BUSY (11) | Conversion status | Active-high open-drain indicator; asserts at CNV↑ and deasserts when 20-bit result is ready on SDO. |
| RDL/SDI (12) | Serial interface control/data | Function depends on CHAIN state; enables SDO tri-state or accepts daisy-chain input data. |
| SCK (13) | Serial clock input | Accepts up to 100MHz clock (10ns period); rising edge clocks out MSB-first 2's complement data on SDO. |
| SDO (14) | Serial data output | 20-bit result shifted MSB first; compatible with standard SPI master devices across 1.8V–5V logic levels. |
| OVDD (15) | I/O supply | 1.71V–5.25V digital interface supply; sets logic thresholds for all digital pins; bypassed with 0.1µF capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| Digital Gain Compression (DGC) | Eliminates need for negative supply in front-end amplifiers by digitally mapping 0V–VREF to 0.1·VREF–0.9·VREF, preserving full 20-bit resolution with single 5.5V rail. |
| No Pipeline Delay / Zero Latency | Immediate availability of conversion result after BUSY deassertion - essential for closed-loop control and real-time feedback systems. |
| Internal Conversion Clock | Removes requirement for external timing circuitry; simplifies PCB layout and reduces BOM count in space-constrained designs. |
| Auto Power-Down Between Conversions | Reduces average power proportionally to sampling rate - extends battery life in portable instruments without firmware intervention. |
| 16-Lead DFN (4mm × 3mm) | Compact footprint with thermal-enhanced exposed pad - supports high-density layouts in handheld test equipment and embedded sensors. |
Applications
| Medical Imaging | High-Speed Data Acquisition |
|---|---|
Use Scenario: Digitizing low-noise CT/MRI detector outputs requiring >17 ENOB and minimal harmonic distortion. IC Role / Device Role / Timing Role: Primary 20-bit SAR ADC capturing analog sensor data at 500ksps with deterministic timing and no latency. Use Value: 104dB SNR and –125dB THD preserve signal fidelity across wide dynamic range, enabling accurate tissue differentiation. | Use Scenario: Multi-channel synchronized sampling in automated test equipment (ATE) for semiconductor characterization. IC Role / Device Role / Timing Role: High-accuracy channel digitizer with daisy-chain SPI enabling precise inter-channel phase alignment. Use Value: Guaranteed 20-bit no-missing-codes and ±0.5ppm INL ensure traceable metrology-grade measurements per IEEE 1057. |
| Portable Instrumentation | Industrial Process Control |
Use Scenario: Battery-powered handheld oscilloscopes or spectrum analyzers needing extended runtime and high resolution. IC Role / Device Role / Timing Role: Low-power 20-bit ADC with auto power-down and DGC to simplify analog front-end design. Use Value: 10.5mW active power and 10.5µW standby draw enable >24-hour operation on single Li-ion cell. | Use Scenario: Precision analog input modules in PLCs monitoring temperature, pressure, and strain gauges. IC Role / Device Role / Timing Role: Isolated analog-to-digital interface with robust ±VREF input range and 85°C operating capability. Use Value: ±2ppm INL max and guaranteed operation to +85°C ensure long-term stability in factory-floor environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-resolution SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS127L11IRHBT | 24-bit delta-sigma ADC, 400ksps, 110dB SNR, external clock required, no DGC | Higher resolution but lower speed; suited for DC/low-frequency precision, not high-speed transient capture | Select for ultra-low-noise DC measurements where speed is secondary to ENOB. |
| AD4022BCPZ-RL7 | 20-bit SAR ADC, 2MSPS, ±1.5ppm INL, 100dB SNR, 3V supply only, no DGC | Faster sampling but higher power (24mW), narrower VREF range (2.5V–3.6V), no single-supply DGC option | Select when system requires >500ksps and can accommodate dual-supply front-end or higher power budget. |
Compared with ADS127L11IRHBT and AD4022BCPZ-RL7, the LTC2377IDE-20#PBF uniquely balances 500ksps speed, 104dB SNR, ±0.5ppm INL, and DGC-enabled single-supply operation - making it optimal for portable, high-fidelity data acquisition where power, size, and analog interface simplicity are jointly constrained.
Availability
LTC2377IDE-20#PBF is available at Aetrix Electronics and suitable for medical imaging systems, portable instrumentation, and industrial process control requiring stable component supply with guaranteed long-term availability and full temperature-grade compliance.
Supply support for LTC2377IDE-20#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC2377IDE-20#PBF belongs to ADI's precision SAR ADC product line, engineered for applications demanding metrology-grade accuracy, low power, and simplified analog interface design - especially where single-supply operation and deterministic timing are critical.
FAQ
What is the operating temperature range for the LTC2377IDE-20#PBF?
The LTC2377IDE-20#PBF is rated for –40°C to +85°C operation (I-grade), verified across all electrical specifications including INL, SNR, and timing parameters. This makes it suitable for industrial and automotive-adjacent applications where ambient temperatures exceed commercial grade limits. The DFN package's exposed pad enhances thermal performance under sustained 500ksps operation.
Does the LTC2377IDE-20#PBF require an external clock for conversion timing?
No, the LTC2377IDE-20#PBF features an internal oscillator that sets conversion time, eliminating the need for an external clock source. This simplifies system design and improves timing predictability. External clocks are only used for the SPI interface (SCK), which operates independently and supports frequencies up to 100MHz - the LTC2377IDE-20#PBF itself handles all internal sampling and conversion timing autonomously.
How does Digital Gain Compression (DGC) work in the LTC2377IDE-20#PBF?
Digital Gain Compression (DGC) in the LTC2377IDE-20#PBF is activated by grounding the REF/DGC pin. It digitally remaps the transfer function so zero-scale corresponds to 0.1·VREF and full-scale to 0.9·VREF, effectively compressing the usable input range to 0.5V–4.5V with a 5V reference. This preserves full 20-bit resolution while allowing the driving amplifier to operate from a single 5.5V supply - eliminating the need for a negative rail.
What are the key layout recommendations for the LTC2377IDE-20#PBF's REF and analog input pins?
For optimal performance, the REF pin must be decoupled with a 47µF X7R ceramic capacitor (1210 size, 10V rating) placed as close as possible to the pin. Analog inputs (IN+, IN–) require matched 10Ω–50Ω series source impedances and symmetric routing. The exposed pad (Pin 17) must be soldered to a solid ground plane. Avoid sharing analog and digital ground traces; use separate AGND and DGND planes joined at a single point near the VDD/GND bypass capacitors.
Can the LTC2377IDE-20#PBF be used in daisy-chain configuration with other ADCs?
Yes, the LTC2377IDE-20#PBF supports daisy-chain mode via the CHAIN pin. When CHAIN is high, RDL/SDI functions as serial data input, allowing multiple LTC2377IDE-20#PBF devices to share a single SPI bus. Each device shifts its 20-bit result into the next, enabling synchronized multi-channel acquisition with minimal GPIO usage. The SCK period in chain mode is specified at 13.5ns minimum to accommodate propagation delays.
LTC2377IDE-20#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 20
- Sampling Rate (Per Second):
- 500k
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.375V ~ 2.625V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 16-DFN (4x3)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2377IDE-20#PBF FAQ
1.How can I place an order for LTC2377IDE-20#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2377IDE-20#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2377IDE-20#PBF reliable?
The price and inventory of LTC2377IDE-20#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2377IDE-20#PBF is usually 5 days.
3.What payment methods are accepted for LTC2377IDE-20#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2377IDE-20#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2377IDE-20#PBF?
LTC2377IDE-20#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2377IDE-20#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2377IDE-20#PBF?
For technical support, including LTC2377IDE-20#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2377IDE-20#PBF requirements.
6.How does Aetrix verify that LTC2377IDE-20#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2377IDE-20#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2377IDE-20#PBF meets industry standards.
7.What is the process for return or replacement of LTC2377IDE-20#PBF?
All LTC2377IDE-20#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2377IDE-20#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2377IDE-20#PBF part is unused and in its original packaging.
Return procedure for LTC2377IDE-20#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC2377IDE-20#PBF Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

