Analog Devices Inc. LTC2380CMS-16#PBF

Overview

LTC2380CMS-16#PBF from Analog Devices (formerly Linear Technology) is a 16-bit, 2 Msps successive approximation register (SAR) analog-to-digital converter with ±0.6 LSB INL max, 96.2 dB SNR at 2 kHz, and fully differential ±VREF input range (2.5 V to 5.1 V). It operates from a single 2.5 V supply, consumes only 19 mW at full speed, and features digital gain compression (DGC) for single-supply amplifier interfacing - enabling use in high-speed medical imaging and portable instrumentation.

For engineers reviewing the LTC2380CMS-16#PBF datasheet, LTC2380CMS-16#PBF pinout, LTC2380CMS-16#PBF application, or LTC2380CMS-16#PBF equivalent, key selection considerations include guaranteed 16-bit no-missing-codes operation, daisy-chain SPI interface compatibility, internal conversion clock, 125°C extended temperature support (H-grade variant), and DGC-enabled 0.5 V to 4.5 V input range with 5 V reference.

Technical Context

The LTC2380CMS-16#PBF implements a charge-redistribution SAR architecture with a 16-bit CDAC and differential comparator, achieving zero-cycle latency and no pipeline delay. Its internal oscillator eliminates external clock dependency, while auto power-down between conversions scales dissipation with sampling rate - dropping to 19 µW at 2 ksps.

Digital Gain Compression (DGC) redefines full-scale mapping from ±VREF to 0.1×VREF–0.9×VREF, enabling rail-to-rail single-supply amplifier drive without sacrificing resolution. The device supports 1.8 V to 5 V I/O logic via dedicated OVDD, and its daisy-chain mode allows synchronous multi-ADC acquisition with shared SCK and BUSY signals.

Key Specifications

Pinout & Package

Package: 16-lead MSOP (small outline package), 3 mm × 4.9 mm, exposed pad not present (unlike DFN variant). Compatible with standard surface-mount reflow profiles and automated optical inspection.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed SAR ADC applications.

Compared with AD7960BCPZ-RL7 and ADS8860IDRCT, the LTC2380CMS-16#PBF uniquely balances 2 Msps throughput, SPI compatibility, DGC-enabled single-supply drive, and 19 mW power - making it optimal for space- and power-constrained high-speed systems where interface simplicity and amplifier supply reduction matter.

Availability

LTC2380CMS-16#PBF is available at Aetrix Electronics and suitable for medical imaging, portable instrumentation, and industrial process control requiring stable component supply, long-term lifecycle support, and guaranteed 0°C to 70°C commercial-grade performance.

Supply support for LTC2380CMS-16#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.

The LTC2380-16 product line was designed by Linear Technology (acquired by ADI in 2017) to deliver high-speed, low-power, precision SAR ADC performance in compact packages - specifically targeting applications demanding no missing codes, low latency, and flexible reference interfacing.

FAQ

What is the maximum sampling rate of the LTC2380CMS-16#PBF?

The LTC2380CMS-16#PBF achieves a maximum sampling rate of 2 Msps with no pipeline delay or cycle latency. This is guaranteed across the full 0°C to 70°C operating temperature range and supported by internal timing circuitry - eliminating dependency on external clock jitter or setup/hold constraints. At this rate, the LTC2380CMS-16#PBF delivers 96.2 dB SNR and ±0.6 LSB INL.

Does the LTC2380CMS-16#PBF require an external reference voltage?

Yes, the LTC2380CMS-16#PBF requires an external reference voltage applied to the REF pin, with a valid range of 2.5 V to 5.1 V. The device does not include an internal reference. Reference stability directly impacts DC accuracy and SNR; Analog Devices recommends low-noise, low-drift references such as the LT6657 or ADR4550, decoupled with a 47 µF X5R ceramic capacitor placed adjacent to the REF pin.

How does Digital Gain Compression (DGC) work on the LTC2380CMS-16#PBF?

Digital Gain Compression (DGC) on the LTC2380CMS-16#PBF is enabled by grounding the REF/DGC pin. When active, the ADC digitally remaps zero-scale from 0 V to 0.1×V_REF and full-scale from V_REF to 0.9×V_REF, resulting in an effective input range of 0.1–0.9×V_REF (e.g., 0.5 V–4.5 V with 5 V reference). This preserves full 16-bit resolution while allowing single-supply amplifier operation - a key advantage over conventional ±V_REF interfaces.

What package type is used for the LTC2380CMS-16#PBF?

The LTC2380CMS-16#PBF uses a 16-lead plastic MSOP (Mini Small Outline Package) measuring 3 mm × 4.9 mm, with no exposed thermal pad. This package is distinct from the DFN variant (e.g., LTC2380CDE-16#PBF) and is optimized for manual prototyping, automated pick-and-place, and compatibility with standard reflow profiles. Pin 17 (exposed pad) is absent in the MSOP version.

Can the LTC2380CMS-16#PBF interface with 1.8 V logic systems?

Yes, the LTC2380CMS-16#PBF supports 1.8 V logic through its independent OVDD supply pin (Pin 15), which accepts 1.71 V to 5.25 V. When OVDD = 1.8 V, all digital inputs (CNV, CHAIN, RDL/SDI, SCK) recognize 0.2×OVDD (0.36 V) as logic low and 0.8×OVDD (1.44 V) as logic high, and the SDO output swings rail-to-rail between 0 V and 1.8 V - enabling direct connection to 1.8 V FPGAs or microcontrollers without level shifters.