Analog Devices Inc. LTC2383IDE-16#PBF

Overview

LTC2383IDE-16#PBF from Analog Devices (formerly Linear Technology) is a 16-bit, 1 Msps successive approximation register (SAR) analog-to-digital converter with fully differential ±2.5 V input range, 92 dB SNR at 20 kHz, ±2 LSB INL max, and 13 mW power consumption at full speed. It operates from a 2.5 V VDD supply and supports 1.8 V to 5 V I/O logic via separate OVDD, enabling direct interfacing with diverse host processors in high-speed data acquisition systems.

For engineers reviewing the LTC2383IDE-16#PBF datasheet, LTC2383IDE-16#PBF pinout, LTC2383IDE-16#PBF application, or LTC2383IDE-16#PBF equivalent, key selection criteria include guaranteed 16-bit no-missing-codes operation, internal conversion clock eliminating external timing constraints, daisy-chain SPI compatibility for multi-ADC systems, and –40°C to +85°C industrial temperature rating in a 4 mm × 3 mm DFN package.

Technical Context

The LTC2383IDE-16#PBF implements a charge-redistribution SAR architecture with a 16-bit CDAC and differential comparator, sampling the IN+/IN– inputs during acquisition and executing binary-search conversion without pipeline latency. Its internal oscillator fixes tCONV at 610–730 ns, ensuring deterministic timing independent of external clocks.

It features dual supply domains: 2.375–2.625 V VDD powers core logic and ADC, while 1.71–5.25 V OVDD sets I/O voltage levels-enabling interoperability with 1.8 V, 2.5 V, 3.3 V, or 5 V digital systems. The REF pins accept a 2.4–2.6 V external reference, defining the full-scale range as ±VREF with 76 µV LSB (at VREF = 2.5 V).

Key Specifications

Pinout & Package

The LTC2383IDE-16#PBF is housed in a 16-lead (4 mm × 3 mm) plastic DFN package with exposed pad (Pin 17) soldered to PCB ground for thermal and electrical integrity. Pin count, layout, and thermal characteristics match the MSOP variant but in a smaller footprint.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed SAR ADC applications.

Compared with AD7960BCPZ-RL7 and LTC2378-16#PBF, the LTC2383IDE-16#PBF uniquely combines industrial temperature rating, internal clock, daisy-chain capability, and minimal external component count-making it optimal for ruggedized, space-constrained, multi-channel field-deployable systems.

Availability

LTC2383IDE-16#PBF is available at Aetrix Electronics and suitable for medical imaging, high-speed data acquisition, and industrial process control requiring stable component supply, guaranteed long-term availability, and traceable sourcing through authorized channels.

Supply support for LTC2383IDE-16#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed by the acquisition of Linear Technology in 2017.

The LTC2383-16 family was designed for high-speed, low-power, precision data acquisition in space-, power-, and thermal-constrained applications-including portable instrumentation, ATE, and industrial monitoring-where deterministic timing and guaranteed 16-bit linearity are essential.

FAQ

What is the maximum sampling frequency supported by the LTC2383IDE-16#PBF?

The LTC2383IDE-16#PBF supports a maximum sampling frequency of 1 Msps, with guaranteed timing parameters (tCYC = 1 µs, tCONV = 610–730 ns) specified over its full –40°C to +85°C operating range. This enables real-time capture of signals with up to 30 MHz input bandwidth (–3 dB point), making the LTC2383IDE-16#PBF suitable for ultrasound, transient recording, and high-speed ATE applications without interpolation or oversampling.

Does the LTC2383IDE-16#PBF require an external clock source?

No, the LTC2383IDE-16#PBF does not require an external clock source for conversion timing. It integrates an internal oscillator that sets the conversion time deterministically, eliminating external clock dependencies and jitter concerns. However, the SCK pin still requires an external serial clock (up to 100 MHz) for SPI data transfer-this clock is independent of the conversion engine timing and serves only for reading results.

How does the daisy-chain mode work on the LTC2383IDE-16#PBF?

In daisy-chain mode (CHAIN pin high), the LTC2383IDE-16#PBF accepts serial data on RDL/SDI and shifts its own 16-bit conversion result out on SDO in response to SCK pulses, enabling cascaded readout of multiple devices on a single SPI bus. Each device's BUSY signal remains independent, allowing synchronized start-of-conversion across the chain while sharing one SCK and one SDO line-reducing GPIO count and routing complexity in multi-channel systems.

What reference voltage source is recommended for the LTC2383IDE-16#PBF?

Analog Devices recommends the LTC6652-2.5 for the LTC2383IDE-16#PBF: a precision 2.5 V reference with 0.05% initial accuracy, 5 ppm/°C max drift, and H-grade temperature support up to 125°C. It provides the low noise and fast settling required to maintain 92 dB SNR and ±2 LSB INL. The REF pins must be decoupled with a 47 µF X5R ceramic capacitor placed adjacent to Pins 7 and 8 to handle the 910 µA peak current drawn at 1 Msps.

Can the LTC2383IDE-16#PBF operate with different I/O voltage levels than its core supply?

Yes, the LTC2383IDE-16#PBF supports independent I/O voltage operation via the OVDD pin (1.71 V to 5.25 V), while the VDD pin supplies the core ADC and logic at 2.375–2.625 V. This allows direct interfacing with 1.8 V, 2.5 V, 3.3 V, or 5 V microcontrollers and FPGAs without level shifters. Digital input thresholds scale with OVDD (VIH = 0.8 × OVDD, VIL = 0.2 × OVDD), and SDO output swing matches OVDD rail, ensuring robust signal integrity across mixed-voltage systems.