Analog Devices Inc. LTC2385CUH-16#PBF

Overview

LTC2385CUH-16#PBF from Analog Devices (formerly Linear Technology) is a 16-bit, 5 Msps successive approximation register (SAR) analog-to-digital converter with serial LVDS interface, ±0.5 LSB INL (max), 93.8 dB SNR at 1 MHz input, and 78 mW power dissipation. It operates from 5 V and dual 2.5 V supplies, features an internal 2.048 V reference with ±20 ppm/°C tempco, and targets high-speed imaging, instrumentation, and control-loop applications requiring no pipeline latency.

For engineers reviewing the LTC2385CUH-16#PBF datasheet, LTC2385CUH-16#PBF pinout, LTC2385CUH-16#PBF application, or LTC2385CUH-16#PBF equivalent, key selection considerations include its guaranteed 16-bit no-missing-codes performance, differential ±4.096 V input range, two-lane LVDS output mode, 32-pin 5 mm × 5 mm QFN package, and operation over 0°C to 70°C.

Technical Context

The LTC2385CUH-16#PBF implements a true SAR architecture with zero-cycle latency-conversion completes before the next sample begins-enabling deterministic timing for closed-loop control. Its internal 2× gain reference buffer delivers 4.096 V (±0.15 LSB full-scale error), and the analog front-end supports Nyquist sampling up to 2.5 MHz with 200 MHz –3 dB input bandwidth.

Timing is synchronized via LVDS clock inputs (CLK+/CLK–), with conversion start triggered by differential CNV+/CNV– or single-ended CNV+ (CNV– tied to GND). The serial LVDS interface supports one-lane (16-bit serial) or two-lane (8-bit parallel per lane) modes, reducing data line count while maintaining 5 Msps throughput.

Key Specifications

Pinout & Package

Package: 32-lead (5 mm × 5 mm) plastic QFN (UH), exposed pad (Pin 33) soldered to PCB ground plane.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed SAR ADC applications.

Compared with AD7960BCPZ-RL7, LTC2385CUH-16#PBF offers integrated LVDS and reference at lower power but trades 2 bits of resolution; compared with ADS8860IRGET, it delivers 5× higher throughput with deterministic latency, at the cost of 5× higher power and more complex layout.

Availability

LTC2385CUH-16#PBF is available at Aetrix Electronics and suitable for high-speed imaging, automated test equipment, and real-time control loop applications requiring stable component supply, consistent parametric performance across production lots, and long-term lifecycle support.

Supply support for LTC2385CUH-16#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.

The LTC2385CUH-16#PBF belongs to ADI's high-speed precision SAR ADC product line, designed specifically for applications demanding both speed (≥5 Msps) and DC accuracy (≤0.5 LSB INL) without pipeline delay-targeting instrumentation, medical imaging, and closed-loop control.

FAQ

What is the operating temperature range for the LTC2385CUH-16#PBF?

The LTC2385CUH-16#PBF is specified for operation from 0°C to 70°C (Commercial grade). This is confirmed by the "C" suffix in the part number and the ORDER INFORMATION table, which lists "LTC2385CUH-16#PBF" with "0°C to 70°C" under Temperature Range. The absolute maximum junction temperature is 125°C, and thermal resistance θ_JA is 34°C/W.

Does the LTC2385CUH-16#PBF require an external reference?

No-the LTC2385CUH-16#PBF includes an internal 2.048 V bandgap reference with ±20 ppm/°C max temperature coefficient and a 2× gain reference buffer delivering 4.096 V. An external reference may be applied to REFIN only if higher initial accuracy or lower tempco is required; otherwise, the internal reference is fully functional and eliminates external component count.

How does the two-lane LVDS mode affect timing and FPGA interface design for the LTC2385CUH-16#PBF?

In two-lane LVDS mode (TWOLANES = high), the LTC2385CUH-16#PBF outputs bits [15:8] on DA+/DA– and bits [7:0] on DB+/DB– simultaneously per conversion, halving the LVDS data rate per lane to 20 MHz (vs. 40 MHz in one-lane mode). This relaxes FPGA I/O timing closure, reduces trace length matching requirements, and allows use of lower-speed I/O standards-while retaining full 5 Msps throughput.

What is the analog input common-mode voltage requirement for the LTC2385CUH-16#PBF?

The LTC2385CUH-16#PBF requires the analog input common-mode voltage (V_CM = (IN+ + IN–)/2) to be maintained within V_REFBUF/2 ± 0.1 V, i.e., 2.048 V ± 0.1 V (1.948 V to 2.148 V). This is specified in the ELECTRICAL CHARACTERISTICS table under VINCM and enforced by the internal reference buffer's output tolerance and bias network.

Can the LTC2385CUH-16#PBF operate with single-ended CNV signaling?

Yes-the LTC2385CUH-16#PBF supports single-ended conversion start: tie CNV– to GND and drive CNV+ with a 2.5 V CMOS signal meeting VIH ≥ 1.7 V and VIL ≤ 0.6 V (per DIGITAL INPUTS section). This simplifies controller interface when differential LVDS clocking is not available, though differential CNV provides better noise immunity.