Analog Devices Inc. LTC2386IUH-16#PBF
- Part No.:
- LTC2386IUH-16#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LTC2386IUH-16#PBF.pdf
- Description:
- IC ADC 16BIT SAR 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,341
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC2386IUH-16#PBF from Analog Devices (formerly Linear Technology) is a 16-bit, 10Msps successive approximation register (SAR) analog-to-digital converter with serial LVDS interface, ±0.5LSB INL (max), 93.8dB SNR (typ @ 1MHz), and 8.192VP-P differential input range. It operates from 5V and dual 2.5V supplies, features an internal 2.048V reference with ±20ppm/°C tempco, and targets high-speed imaging, instrumentation, and control-loop applications requiring no pipeline latency.
For engineers reviewing the LTC2386IUH-16#PBF datasheet, LTC2386IUH-16#PBF pinout, LTC2386IUH-16#PBF application, or LTC2386IUH-16#PBF equivalent, key selection considerations include guaranteed 16-bit no-missing-codes operation, LVDS one/two-lane output mode flexibility, Nyquist sampling up to 5MHz, 97mW power dissipation at full rate, and –40°C to +85°C industrial temperature grade.
Technical Context
The LTC2386IUH-16#PBF implements a true SAR architecture with no pipeline delay, enabling deterministic timing for closed-loop control. Its fully differential input stage accepts ±4.096V signals referenced to VCM = 2.048V, with 200MHz –3dB input bandwidth and 75dB CMRR at 1MHz.
Conversion is initiated by a differential LVDS CNV+ / CNV– signal or single-ended CNV+ (CNV– tied to GND), with tCONV = 72ns (typ) from CNV edge to valid data. The serial LVDS interface supports programmable one-lane (16-bit serial) or two-lane (8-bit parallel per lane) output modes, synchronized to DCO-echoed version of CLK-minimizing skew (±200ps).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit, guaranteed no missing codes across full operating range |
| Sampling Rate | 10Msps maximum, enabling 5MHz Nyquist-bandwidth signal capture |
| INL | ±0.5LSB max, ensuring <0.0076% full-scale linearity error for precision measurement |
| SNR | 93.8dB typical at fIN = 1MHz, supporting >15.6 effective bits (ENOB) |
| Input Range | ±4.096V differential (8.192VP-P), with 2.048V common-mode requirement |
| Power Dissipation | 97mW at 10Msps, dropping to 10μW in power-down mode |
| Reference | Internal 2.048V bandgap reference with ±20ppm/°C max drift over –40°C to +85°C |
Pinout & Package
Package: 32-lead (5mm × 5mm) plastic QFN (UH package) with exposed pad (Pin 33) required to be soldered to PCB ground plane. Thermal resistance θJA = 34°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN+, IN– (Pins 2, 3) | Differential analog inputs | Accept ±4.096V swing centered at 2.048V common mode; require 180° phase alignment and low-impedance drive |
| REFBUF (Pins 7, 8) | 2× gain reference buffer output | Provides 4.096V buffered reference; must be bypassed with 10μF X7R capacitor to REFGND |
| REFIN (Pin 9) | Internal reference output / external reference input | Outputs 2.048V internal reference; accepts external 2.048V source if higher accuracy needed |
| CNV+, CNV– (Pins 27, 28) | Differential conversion start input | Rising edge initiates sample-and-hold hold mode and conversion; supports single-ended CNV+ with CNV– grounded |
| CLK+, CLK– (Pins 23, 24) | LVDS clock input | Externally supplied master clock (up to 10MHz) that times serial data output and DCO generation |
| DA+, DA– / DB+, DB– (Pins 15–18) | LVDS serial data outputs | In one-lane mode: DA carries all 16 bits; in two-lane mode: DA and DB each carry 8 bits simultaneously |
| DCO+, DCO– (Pins 19, 20) | LVDS data clock output | Echoed version of CLK used to latch DA/DB data; enables source-synchronous timing at receiver |
| TWOLANES (Pin 25) | Output mode select | High = two-lane mode (reduces data rate per lane); low = one-lane mode (simplifies receiver design) |
Key Features
| Feature | Design Value |
|---|---|
| No pipeline latency | True SAR architecture delivers first valid conversion result within 72ns of CNV edge-critical for real-time feedback control |
| LVDS serial interface | Reduces pin count vs parallel interfaces while maintaining noise immunity and timing margin at 10Msps |
| Internal reference system | Integrated 2.048V reference + 2× buffer eliminates need for external precision reference in many applications |
| Industrial temperature grade | Specified from –40°C to +85°C with full performance guarantees, including INL, SNR, and timing |
| Low power at high speed | 97mW at 10Msps enables dense mixed-signal PCB layouts without excessive thermal management |
Applications
| High-Speed Imaging | Automated Test Equipment (ATE) |
|---|---|
Use Scenario: Digitizing fast-ramping video or X-ray detector outputs in medical CT or industrial NDT systems. IC Role / Device Role / Timing Role: Primary ADC capturing transient analog waveforms with deterministic latency and minimal harmonic distortion. Use Value: 93.8dB SNR and 102dB SFDR at 1MHz preserve signal fidelity across wide dynamic range; no missing codes prevents image artifacts. | Use Scenario: High-accuracy parametric testing of semiconductor devices requiring sub-LSB linearity and repeatable measurements. IC Role / Device Role / Timing Role: Precision digitizer in automated test head, interfacing directly with DUT analog stimulus/response paths. Use Value: ±0.5LSB INL ensures measurement traceability; LVDS interface simplifies routing in noisy ATE backplanes. |
| Real-Time Control Loops | Communications Signal Analysis |
Use Scenario: Sampling current/voltage feedback in servo drives or RF power amplifier envelope tracking. IC Role / Device Role / Timing Role: Low-latency sensor interface feeding FPGA-based PID controllers with cycle-accurate timing. Use Value: No pipeline delay enables sub-100ns loop closure; 10Msps throughput supports kHz-bandwidth control bandwidths. | Use Scenario: Capturing IF or baseband signals in spectrum analyzers or software-defined radio receivers. IC Role / Device Role / Timing Role: Wideband digitizer front-end handling multi-MHz instantaneous bandwidth with high spurious-free dynamic range. Use Value: 200MHz input bandwidth and 102dB SFDR at 1MHz support clean capture of modulated carriers with adjacent-channel interference rejection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9268BCPZ-105 | 16-bit, 105Msps pipelined ADC; requires external reference; consumes ~500mW | Higher speed but introduces pipeline latency (~6 cycles); less suitable for deterministic control loops | Select when >10Msps sampling is required and latency tolerance exists |
| ADS8860IRGET | 16-bit, 1Msps SAR ADC; SPI interface; 1.8V supply; 15mW power | Lower speed and simpler interface; lacks LVDS, internal reference buffer, and industrial temp grade | Select for cost-sensitive, lower-speed portable instrumentation where power and board space are critical |
Compared with AD9268BCPZ-105, LTC2386IUH-16#PBF offers deterministic latency and lower power at 10Msps, while ADS8860IRGET trades speed and integration for ultra-low power and simplicity-making LTC2386IUH-16#PBF optimal for industrial-grade, latency-sensitive 10Msps applications.
Availability
LTC2386IUH-16#PBF is available at Aetrix Electronics and suitable for high-speed imaging, automated test equipment, and real-time control loop applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC2386IUH-16#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed through the acquisition of Linear Technology in 2017.
The LTC2386-16 family was designed specifically for high-fidelity, low-latency data acquisition in demanding industrial, medical, and test systems-emphasizing precision, speed, and robustness over wide temperature ranges without sacrificing power efficiency.
FAQ
What is the operating temperature range for the LTC2386IUH-16#PBF?
The LTC2386IUH-16#PBF is rated for industrial operation from –40°C to +85°C. All key specifications-including INL (±0.5LSB max), SNR (93.8dB typ), and timing parameters-are guaranteed across this full range. This distinguishes it from the commercial-grade LTC2386CUH-16#PBF (0°C to 70°C) and confirms its suitability for harsh-environment applications like factory automation and outdoor instrumentation.
Does the LTC2386IUH-16#PBF require an external reference?
No, the LTC2386IUH-16#PBF includes a fully integrated 2.048V internal reference with ±20ppm/°C max temperature coefficient and a 2× gain reference buffer delivering 4.096V. An external reference is optional-only needed when higher initial accuracy or lower drift than the internal reference provides is required. If using the internal reference, REFIN should be bypassed to GND with ≥0.1μF ceramic capacitance.
How does the LVDS interface of the LTC2386IUH-16#PBF operate in one-lane versus two-lane mode?
In one-lane mode (TWOLANES = low), the LTC2386IUH-16#PBF outputs all 16 bits sequentially on DA+/DA– at 160MHz (10Msps × 16 bits). In two-lane mode (TWOLANES = high), it outputs even bits on DA+/DA– and odd bits on DB+/DB– simultaneously at 80MHz (10Msps × 8 bits per lane), halving the data rate per lane and easing receiver timing closure-especially beneficial in dense PCB layouts or with slower FPGA I/O banks.
Can the LTC2386IUH-16#PBF be used with single-ended input signals?
The LTC2386IUH-16#PBF is designed exclusively for fully differential analog inputs (IN+, IN–) with strict common-mode requirements (2.048V ±0.1V). Single-ended signals must be converted to differential format using a high-performance transformer or fully differential amplifier (FDA) such as the LTC6409 or ADA4941-1. Direct single-ended connection violates the input specification and degrades CMRR, INL, and THD performance.
What is the power consumption of the LTC2386IUH-16#PBF in power-down mode?
In power-down mode (PD pin low), the LTC2386IUH-16#PBF reduces total supply current to ≤10μW-comprising ≤1μA from VDD, ≤2μA from VDDL, and ≤2μA from OVDD. This ultra-low quiescent state preserves system energy budget during idle periods while allowing full functionality restoration within nanoseconds upon PD assertion, making it ideal for battery-powered or duty-cycled high-speed acquisition systems.
LTC2386IUH-16#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 10M
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- LVDS - Serial
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 2.375V ~ 2.625V, 5V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V, 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 32-QFN (5x5)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2386IUH-16#PBF FAQ
1.How can I place an order for LTC2386IUH-16#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2386IUH-16#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2386IUH-16#PBF reliable?
The price and inventory of LTC2386IUH-16#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2386IUH-16#PBF is usually 5 days.
3.What payment methods are accepted for LTC2386IUH-16#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2386IUH-16#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2386IUH-16#PBF?
LTC2386IUH-16#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2386IUH-16#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2386IUH-16#PBF?
For technical support, including LTC2386IUH-16#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2386IUH-16#PBF requirements.
6.How does Aetrix verify that LTC2386IUH-16#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2386IUH-16#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2386IUH-16#PBF meets industry standards.
7.What is the process for return or replacement of LTC2386IUH-16#PBF?
All LTC2386IUH-16#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2386IUH-16#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2386IUH-16#PBF part is unused and in its original packaging.
Return procedure for LTC2386IUH-16#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC2386IUH-16#PBF Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
