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Analog Devices Inc. LTC2387CUH-16#PBF
- Part No.:
- LTC2387CUH-16#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LTC2387CUH-16#PBF.pdf
- Description:
- IC ADC 16BIT SAR 32QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,826
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Product details
Overview
LTC2387CUH-16#PBF from Analog Devices (formerly Linear Technology) is a 16-bit, 15 Msps successive approximation register (SAR) analog-to-digital converter with serial LVDS interface, ±0.8 LSB max INL, 93.8 dB SNR at 1 MHz input, and 5 V / 2.5 V dual-supply operation. It serves as the high-speed digitization front-end in precision data acquisition systems requiring no pipeline latency.
For engineers reviewing the LTC2387CUH-16#PBF datasheet, LTC2387CUH-16#PBF pinout, LTC2387CUH-16#PBF application, or LTC2387CUH-16#PBF equivalent, key selection criteria include guaranteed 16-bit no-missing-codes performance, differential ±4.096 V input range, internal 2.048 V reference with ±20 ppm/°C max drift, LVDS one/two-lane serial output, and 32-pin 5 mm × 5 mm QFN package with exposed thermal pad.
Technical Context
The LTC2387CUH-16#PBF implements a true SAR architecture with no pipeline delay, enabling deterministic timing for closed-loop control. Its conversion cycle begins on a rising edge of the differential CNV+ signal and completes within 63 ns, delivering fully settled 16-bit two's complement data synchronized to the LVDS clock.
It integrates a 2× gain internal reference buffer (REFBUF = 4.096 V), supports external reference injection via REFIN (2.048 V), and features programmable LVDS output modes - one-lane (16 bits per frame) or two-lane (8 bits per frame on DA+/DA− and DB+/DB−) - allowing trade-offs between data rate and PCB routing complexity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit, guaranteed no missing codes - ensures full dynamic range utilization without code gaps in critical measurement applications. |
| Sampling Rate | 15 Msps maximum - supports Nyquist sampling up to 7.5 MHz input bandwidth for wideband signal capture. |
| SNR | 93.8 dB (typ) at fIN = 1 MHz - enables >15.6 effective bits of resolution for high-fidelity instrumentation digitization. |
| INL | ±0.8 LSB (max) - limits integral nonlinearity error to <0.0012% of full scale, critical for calibration-sensitive systems. |
| Input Range | Differential ±4.096 V (8.192 VP-P) - matches standard precision reference levels and simplifies anti-alias filter design. |
| Power Dissipation | 125 mW at 15 Msps - achieves high-speed ADC performance with low thermal load in space-constrained layouts. |
| Reference | Internal 2.048 V bandgap reference with ±20 ppm/°C max tempco - eliminates need for external reference in cost-sensitive designs. |
Pinout & Package
Package: 32-lead (5 mm × 5 mm) plastic QFN (UH package) with exposed thermal pad (Pin 33, connected to GND). Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1, 4, 10, 21, 26, 29) | Analog/Digital Ground Reference | Multiple dedicated ground pins minimize ground bounce and ensure stable reference for analog and digital sections. |
| IN+, IN– (Pins 2, 3) | Differential Analog Input | Accepts fully differential ±4.096 V input centered at 2.048 V common mode; high CMRR (>75 dB) rejects noise coupled to both inputs. |
| REFGND (Pins 5, 6) | Reference Ground Return | Separate low-impedance return path for reference circuitry; must be shorted together and tied to exposed pad. |
| REFBUF (Pins 7, 8) | 2× Reference Buffer Output | Provides 4.096 V buffered reference; can drive external circuitry or serve as ADC input common-mode reference (VCM). |
| REFIN (Pin 9) | Internal Reference Output / External Reference Input | Outputs 2.048 V internal reference; accepts external 2.008–2.088 V reference for improved accuracy or temperature stability. |
| VDD (Pins 11, 12) | 5 V Analog Supply | Supplies core analog circuitry; requires 4.75–5.25 V with local 0.1 µF + 10 µF bypassing to maintain SNR performance. |
| PD (Pin 13) | Power-Down Control | Active-low digital input (OVDD-referenced); reduces total supply current to 10 µW when asserted. |
| TESTPAT (Pin 14) | LVDS Test Pattern Enable | Forces deterministic LVDS output pattern (not conversion data), enabling interface validation without analog stimulus. |
| DA+, DA– (Pins 17, 18) | Lane A LVDS Data Output | Primary serial data lane; carries all 16 bits in one-lane mode or odd-numbered bits (D15, D13…D1) in two-lane mode. |
| DB+, DB– (Pins 15, 16) | Lane B LVDS Data Output | Secondary lane active only in two-lane mode; carries even-numbered bits (D14, D12…D0) to halve clock frequency requirement. |
| DCO+, DCO– (Pins 19, 20) | LVDS Data Clock Output | Echoes CLK+ / CLK–; used to latch LVDS data on receiving FPGA/ASIC, eliminating clock skew concerns. |
| OVDD (Pin 22) | 2.5 V LVDS Output Supply | Supplies LVDS drivers; requires 2.375–2.625 V with 0.1 µF bypassing to meet LVDS voltage swing specs (247–454 mV diff). |
| CLK+, CLK– (Pins 23, 24) | LVDS Clock Input | Differential clock input (175–650 mV diff, 0.8–1.7 V common mode); determines sampling rate and data transfer timing. |
| TWOLANES (Pin 25) | Two-Lane Mode Select | High = two-lane LVDS output (8 bits/clock edge); low = one-lane (16 bits/clock edge); reduces required clock frequency by 2×. |
| CNV+, CNV– (Pins 27, 28) | Differential Conversion Start | Rising edge on CNV+ initiates sample-and-hold hold phase and conversion; supports single-ended CNV (CNV– = GND) for simplified control. |
| VDDL (Pins 30, 31) | 2.5 V Digital Logic Supply | Supplies internal logic and LVDS receiver circuits; requires 2.375–2.625 V with 0.1 µF + 10 µF bypassing. |
| VCM (Pin 32) | Common Mode Output | Provides 2.048 V common-mode bias for external driver stages; optional-bypass with 0.1 µF if used. |
| Exposed Pad (Pin 33) | Thermal & Electrical Ground | Mandatory connection to PCB ground plane via multiple vias; essential for thermal dissipation (θJA = 34°C/W) and noise reduction. |
Key Features
| Feature | Design Value |
|---|---|
| No pipeline latency | Delivers first valid conversion result within one clock cycle after CNV edge - essential for real-time feedback control loops. |
| Serial LVDS interface | Reduces pin count vs parallel interfaces; supports one- or two-lane modes to balance clock speed, routing density, and jitter sensitivity. |
| Internal 2.048 V reference | Eliminates external reference component while maintaining ±0.25% initial accuracy and ±20 ppm/°C max drift over temperature. |
| ±0.8 LSB max INL | Ensures monotonicity and predictable transfer function across full operating temperature range (0°C to 70°C). |
| 125 mW power at 15 Msps | Enables high-speed digitization in thermally constrained environments without forced air or heatsinking. |
| Power-down mode (10 µW) | Allows rapid entry/exit from ultra-low-power state during idle periods - critical for battery-powered or duty-cycled systems. |
Applications
| High-Speed Imaging | Communications Receiver |
|---|---|
|
Use Scenario: Digitizing video signals from scientific CMOS sensors or ultrasound transducer arrays at >10 Msps. IC Role / Device Role / Timing Role: Primary ADC front-end capturing baseband I/Q or time-of-flight waveforms with deterministic latency. Use Value: 93.8 dB SNR and 102 dB SFDR preserve signal fidelity across multi-MHz bandwidths; no missing codes prevents image artifacts. |
Use Scenario: Sampling IF or baseband signals in software-defined radio (SDR) and LTE/5G test equipment. IC Role / Device Role / Timing Role: High-linearity digitizer interfacing directly to RF demodulator outputs or IQ mixers. Use Value: ±4.096 V differential input range accommodates high-level IF signals; LVDS interface minimizes EMI in dense RF subsystems. |
| Industrial Control Loop | Automated Test Equipment (ATE) |
|
Use Scenario: Real-time position/speed feedback in servo drives or adaptive power supply regulation. IC Role / Device Role / Timing Role: Low-latency ADC feeding FPGA-based PID controllers with sub-100 ns timing determinism. Use Value: No pipeline delay enables closed-loop response within one 15 Msps sample period - improves system stability margin. |
Use Scenario: Precision DC/AC parametric testing of semiconductors and passive components on production test handlers. IC Role / Device Role / Timing Role: Metrology-grade digitizer capturing transient responses, leakage currents, and settling behavior. Use Value: ±0.8 LSB INL and 94 dB SNR support 16-bit measurement repeatability; internal reference reduces calibration overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9268BCPZ-16 | 16-bit, 125 MSPS pipeline ADC; higher speed but introduces 11-cycle pipeline latency and lower SNR (78.2 dB). | Suitable for streaming applications where latency is acceptable; not viable for real-time control loops requiring immediate data. | Select AD9268BCPZ-16 only when throughput >15 Msps is mandatory and latency tolerance exceeds 80 ns. |
| ADS8860IRGET | 16-bit, 1 MSPS SAR ADC; no latency, same architecture, but 15× slower sampling rate and lower power (15 mW). | Targeted at portable instrumentation and low-power data loggers - insufficient for imaging or comms IF sampling. | Choose ADS8860IRGET for battery-operated, lower-bandwidth applications where 125 mW dissipation is prohibitive. |
Compared with AD9268BCPZ-16 and ADS8860IRGET, the LTC2387CUH-16#PBF uniquely balances 15 Msps throughput, zero-cycle latency, and 93.8 dB SNR in a single-chip solution - making it optimal for latency-sensitive, wide-dynamic-range digitization where pipeline ADCs introduce unacceptable delay and slower SARs lack bandwidth.
Availability
LTC2387CUH-16#PBF is available at Aetrix Electronics and suitable for high-speed data acquisition, medical imaging, communications infrastructure, and industrial control systems requiring stable component supply, long-term manufacturability, and guaranteed 0°C to 70°C operation.
Supply support for LTC2387CUH-16#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing ICs, serving industrial, automotive, communications, and healthcare markets.
The LTC2387 family was designed specifically for high-speed, high-accuracy digitization in applications demanding both wide dynamic range and deterministic timing - bridging the gap between traditional SAR and pipeline ADC architectures.
FAQ
What is the operating temperature range for the LTC2387CUH-16#PBF?
The LTC2387CUH-16#PBF is specified for operation from 0°C to 70°C (Commercial grade). This is confirmed by the "C" suffix in the part number and the ORDER INFORMATION table, which lists "0°C to 70°C" under Temperature Range for LTC2387CUH-16#PBF. The device meets all electrical specifications across this full range.
Does the LTC2387CUH-16#PBF require an external reference?
No, the LTC2387CUH-16#PBF includes an internal 2.048 V bandgap reference with ±20 ppm/°C max temperature coefficient and can operate autonomously. An external reference may be applied to REFIN only if higher initial accuracy or lower drift is required - the internal reference is sufficient for most precision applications.
How does the LVDS interface of the LTC2387CUH-16#PBF support different data rates?
The LTC2387CUH-16#PBF supports both one-lane (16 bits per clock cycle) and two-lane (8 bits per clock cycle on DA+/DA− and DB+/DB−) LVDS output modes. Configuring TWOLANES high halves the required LVDS clock frequency - e.g., 15 Msps sampling uses 15 MHz clock in one-lane mode or 7.5 MHz in two-lane mode - easing timing closure on FPGAs.
What is the significance of the exposed pad (Pin 33) on the LTC2387CUH-16#PBF?
The exposed pad (Pin 33) on the LTC2387CUH-16#PBF is electrically and thermally connected to GND. It must be soldered to the PCB ground plane using multiple thermal vias to achieve the specified θJA = 34°C/W and ensure stable ground reference for analog performance - omission causes thermal overload and degraded SNR/INL.
Can the LTC2387CUH-16#PBF interface directly with a 3.3 V FPGA I/O bank?
No - the LTC2387CUH-16#PBF LVDS outputs (DA+/DA−, DB+/DB−, DCO+/DCO−) are compliant with ANSI TIA/EIA-644-A LVDS standards and require a 2.5 V OVDD supply, producing 247–454 mV differential swing. Direct connection to 3.3 V FPGA banks risks damage; use LVDS-compatible 2.5 V I/O banks or level-shifting buffers.
LTC2387CUH-16#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 15M
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- LVDS - Serial
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 32-QFN (5x5)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2387CUH-16#PBF FAQ
1.How can I place an order for LTC2387CUH-16#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2387CUH-16#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2387CUH-16#PBF reliable?
The price and inventory of LTC2387CUH-16#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2387CUH-16#PBF is usually 5 days.
3.What payment methods are accepted for LTC2387CUH-16#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2387CUH-16#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2387CUH-16#PBF?
LTC2387CUH-16#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2387CUH-16#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2387CUH-16#PBF?
For technical support, including LTC2387CUH-16#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2387CUH-16#PBF requirements.
6.How does Aetrix verify that LTC2387CUH-16#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2387CUH-16#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2387CUH-16#PBF meets industry standards.
7.What is the process for return or replacement of LTC2387CUH-16#PBF?
All LTC2387CUH-16#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2387CUH-16#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2387CUH-16#PBF part is unused and in its original packaging.
Return procedure for LTC2387CUH-16#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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