Analog Devices Inc. LTC2440IGN#PBF
- Part No.:
- LTC2440IGN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC2440IGN#PBF.pdf
- Description:
- IC ADC 24BIT SIGMA-DELTA 16SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:527
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Product details
Overview
LTC2440IGN#PBF from Analog Devices (formerly Linear Technology) is a 24-bit no-latency delta-sigma ADC with differential input and reference, 5 ppm INL, <5 µV offset, and programmable output rates from 6.9 Hz to 3.5 kHz. It operates from 4.5 V to 5.5 V, supports 50/60 Hz rejection at ultralow noise mode, and targets high-precision industrial sensing and metrology applications.
For engineers reviewing the LTC2440IGN#PBF datasheet, LTC2440IGN#PBF pinout, LTC2440IGN#PBF application, or LTC2440IGN#PBF equivalent, key selection criteria include guaranteed 24-bit no-missing-codes resolution, autosleep current as low as 25 µA at 6.9 Hz, differential input common-mode range from GND – 0.3 V to VCC + 0.3 V, and pin compatibility with LTC2410 for drop-in upgrades in existing designs.
Technical Context
The LTC2440IGN#PBF implements a proprietary delta-sigma architecture with real-time speed/resolution reconfiguration-no latency between conversion cycles. Ten discrete OSR modes (e.g., 6.9 Hz/200 nVRMS, 880 Hz/2 µVRMS, 3.5 kHz/25 µVRMS) are selected via SDI pin state or serial command, with accuracy and power independent of selected speed.
It features continuous internal offset and full-scale calibration per conversion cycle, eliminating drift-related errors across temperature (–40°C to +85°C), supply voltage (4.5 V to 5.5 V), and time. The 32-bit serial output includes 24-bit result + status bits (EOC, sign, over/underrange), and supports both internal SCK (EXT = HIGH) and external clocking (EXT = LOW) without register programming.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 24-bit with no missing codes - guarantees monotonicity and unambiguous digital representation across full input range. |
| INL | ±5 ppm of VREF - enables 0.0005% linearity error in precision weight scales and DVMs. |
| Offset Error | <5 µV (–40°C to +85°C) - eliminates need for system-level offset trimming in temperature-sensitive instrumentation. |
| Noise (RMS) | 200 nV at 6.9 Hz with 50/60 Hz rejection - supports direct AC-line-immune thermocouple or strain gauge measurements. |
| Output Rate Range | 6.9 Hz to 3.5 kHz - allows dynamic trade-off between noise floor and throughput without hardware change. |
| Supply Current | 25 µA average at 6.9 Hz (autosleep active) - enables battery-powered portable DMMs with multi-year runtime. |
| Differential Input Range | ±0.5 × VREF with GND–0.3 V to VCC+0.3 V common-mode - accommodates wide-range sensor outputs without external level-shifting. |
Pinout & Package
Narrow 16-lead SSOP package (GN) with four dedicated ground pins (1, 8, 9, 16) for low-impedance return paths and optimal decoupling. Requires 10 µF tantalum + 0.1 µF ceramic bypass on VCC (Pin 2).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (1, 8, 9, 16) | Ground reference | All four pins must be connected to PCB ground plane; internal connection ensures stable reference and minimizes ground bounce during conversion. |
| VCC (2) | Positive supply | 4.5 V to 5.5 V operation; bypassing critical for noise-sensitive delta-sigma modulator stability. |
| REF+ / REF– (3, 4) | Differential reference inputs | Accept 0.1 V to VCC differential voltage; common-mode range spans GND to VCC - enables ratiometric or isolated reference configurations. |
| IN+ / IN– (5, 6) | Differential analog inputs | Bipolar input range = ±0.5 × VREF; absolute voltage range extends beyond rails (GND–0.3 V to VCC+0.3 V) for robust sensor interfacing. |
| SDI (7) | Speed/resolution select | Logic LOW = 880 Hz / 2 µVRMS; HIGH = 6.9 Hz / 200 nVRMS + 50/60 Hz rejection; can be changed mid-operation with immediate effect. |
| EXT (10) | SCK source control | LOW = external clock on SCK pin; HIGH = internal SCK generated and output on SCK pin - determines interface timing responsibility. |
| CS (11) | Chip select / wake-up | Active LOW enables SDO and exits sleep; rising edge during data transfer aborts output and starts new conversion. |
| SDO (12) | 3-state serial data output | Outputs 32-bit frame (status + 24-bit result + sub-LSBs); high-Z when CS = HIGH - enables bus sharing. |
| SCK (13) | Bidirectional serial clock | Input in external mode; output in internal mode - eliminates need for external clock generator in standalone systems. |
| fO (14) | Oscillator control | Tie to GND or VCC to enable internal oscillator; no external crystal required - reduces BOM count and layout complexity. |
| BUSY (15) | Conversion status indicator | HIGH during conversion; LOW during sleep and data output - provides hardware-ready signal for microcontroller polling or interrupt triggering. |
Key Features
| Feature | Design Value |
|---|---|
| No latency architecture | Each conversion result corresponds exactly to its input sample - enables real-time multiplexed acquisition without settling delay or filter artifacts. |
| Per-conversion auto-calibration | Continuous offset and full-scale correction eliminates long-term drift and supply/temperature-induced gain errors - removes need for periodic recalibration in field-deployed instruments. |
| Programmable speed/resolution | 10 discrete OSR modes selectable via pin strap or serial command - allows single hardware design to serve multiple performance tiers (e.g., handheld DMM vs benchtop analyzer). |
| Autosleep power management | Reduces average current to 25 µA at 6.9 Hz output rate - extends battery life in portable test equipment without sacrificing resolution. |
| Differential input & reference | True differential topology rejects common-mode noise; independent CM range (GND–0.3 V to VCC+0.3 V) supports grounded, floating, or isolated sensor interfaces. |
Applications
| Weight Scales | Auto-Ranging 6-Digit DVMs |
|---|---|
Use Scenario: High-precision load cell readout in commercial weighing systems requiring NTEP certification and thermal stability over –10°C to +40°C ambient. IC Role / Device Role / Timing Role: Primary 24-bit ADC digitizing mV-level bridge outputs; performs continuous offset calibration to reject thermal EMF drift in solder joints and connectors. Use Value: 5 ppm INL and <5 µV offset ensure repeatability within 0.001% of full scale - meets Class III and Class IIIB metrological requirements without firmware compensation. | Use Scenario: Benchtop digital multimeter supporting autoranging across 100 mV to 1000 V DC ranges with 6½-digit display resolution. IC Role / Device Role / Timing Role: Core measurement engine acquiring voltage, current, and resistance; uses programmable OSR to match integration time to range (e.g., 3.5 kHz for fast continuity check, 6.9 Hz for ultra-low-noise 100 mV range). Use Value: 200 nVRMS noise at 6.9 Hz with 50/60 Hz rejection enables true 6.5-digit resolution on AC-mains-powered units without external notch filters. |
| Direct Temperature Measurement | High-Speed Data Acquisition |
Use Scenario: Industrial RTD or thermocouple front-end in PLC analog input modules where cold-junction compensation and linearity are critical. IC Role / Device Role / Timing Role: Digitizes conditioned sensor signals with differential input; leverages wide common-mode range to interface directly with isolated amplifiers or transformer-coupled sensors. Use Value: Differential reference support allows ratiometric measurement against stable reference ICs - eliminates VREF drift impact on absolute temperature accuracy. | Use Scenario: Multi-channel vibration monitoring system sampling piezoelectric accelerometers at up to 3.5 kHz per channel with synchronized trigger capability. IC Role / Device Role / Timing Role: High-throughput ADC in time-critical acquisition node; uses BUSY pin for hardware-triggered sampling and CS-controlled data streaming to FPGA buffer. Use Value: No-latency output and seamless speed switching allow dynamic adaptation to transient events - e.g., increasing OSR only during shock detection windows without interrupting baseline sampling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-resolution delta-sigma ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2410CGN#PBF | Fixed 880 Hz output rate, no 50/60 Hz rejection, identical pinout and interface. | Limited to medium-speed, medium-noise applications; lacks programmable resolution and ultralow-noise mode. | Select when cost sensitivity outweighs need for flexible noise/speed trade-offs and line-frequency immunity. |
| ADS1258IPWR | 24-bit, 125 kSPS max, SPI interface, integrated PGA, but no built-in 50/60 Hz rejection or per-cycle auto-calibration. | Higher throughput but requires external filtering and calibration routines; larger 28-pin TSSOP package. | Choose for multi-channel systems needing simultaneous sampling and programmable gain, accepting added firmware overhead for line rejection. |
Compared with LTC2410CGN#PBF, the LTC2440IGN#PBF adds selectable speed/resolution and 50/60 Hz rejection - critical for mains-powered instrumentation. Versus ADS1258IPWR, it delivers superior drift stability and simpler implementation for single-channel, ultra-low-noise use cases despite lower maximum rate.
Availability
LTC2440IGN#PBF is available at Aetrix Electronics and suitable for high-precision weight scales, auto-ranging 6-digit DVMs, and direct temperature measurement systems requiring stable component supply across extended industrial temperature ranges.
Supply support for LTC2440IGN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC2440IGN#PBF belongs to ADI's legacy Linear Technology precision delta-sigma ADC family, designed specifically for metrology-grade applications demanding zero-latency, high linearity, and exceptional noise immunity without complex configuration.
FAQ
What is the operating temperature range for the LTC2440IGN#PBF?
The LTC2440IGN#PBF is rated for –40°C to +85°C industrial temperature operation, as confirmed by its "I" grade suffix and Absolute Maximum Ratings table. This range covers full specification compliance for offset error (<5 µV), INL (±5 ppm), and noise performance - making it suitable for deployment in harsh environments such as factory automation controllers and outdoor test equipment where thermal cycling occurs.
Does the LTC2440IGN#PBF require an external crystal or oscillator?
No, the LTC2440IGN#PBF does not require an external crystal or oscillator. Its fO pin is designed to accept either a direct GND or VCC connection to enable the internal oscillator - eliminating external timing components. When fO is tied low, the device uses its proprietary on-chip oscillator, delivering stable conversion timing across temperature and supply voltage variations without added BOM cost or layout area.
How does the LTC2440IGN#PBF achieve 50/60 Hz rejection at 6.9 Hz output rate?
The LTC2440IGN#PBF achieves simultaneous 50 Hz and 60 Hz rejection at its 6.9 Hz output rate through inherent delta-sigma modulation and decimation filter design - specifically, its 32768 oversampling ratio (OSR) creates nulls precisely at 50 Hz and 60 Hz in the noise transfer function. This is a hardware-level feature activated automatically when SDI is logic HIGH; no software configuration or external filtering is needed to suppress AC mains interference in sensitive sensor measurements.
Can the LTC2440IGN#PBF interface directly with a microcontroller GPIO without level-shifting?
Yes, the LTC2440IGN#PBF is fully compatible with standard 5 V-tolerant microcontroller GPIOs. Its digital inputs (CS, SDI, EXT, fO, SCK) accept VIH ≥ 2.5 V and VIL ≤ 0.8 V at VCC = 4.5–5.5 V, matching typical 5 V logic thresholds. Outputs (SDO, BUSY, SCK in internal mode) drive VOH ≥ VCC – 0.5 V and VOL ≤ 0.4 V under specified loads - enabling direct connection to MCU SPI peripherals without level translators or buffers.
What is the meaning of the 32-bit output format of the LTC2440IGN#PBF?
The LTC2440IGN#PBF outputs a 32-bit serial frame: bits 31–28 convey status (EOC, dummy, sign, MSB), bits 27–4 contain the 24-bit conversion result (MSB first), and bits 3–0 are sub-LSBs usable for averaging or discarded without resolution loss. This structure enables immediate identification of over/underrange conditions (via bits 29 & 28) and end-of-conversion signaling (bit 31), simplifying host firmware parsing and real-time decision-making without post-processing.
LTC2440IGN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 24
- Sampling Rate (Per Second):
- 3.5k
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- SPI
- Configuration:
- ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- Sigma-Delta
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 16-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2440IGN#PBF FAQ
1.How can I place an order for LTC2440IGN#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2440IGN#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2440IGN#PBF reliable?
The price and inventory of LTC2440IGN#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2440IGN#PBF is usually 5 days.
3.What payment methods are accepted for LTC2440IGN#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2440IGN#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2440IGN#PBF?
LTC2440IGN#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2440IGN#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2440IGN#PBF?
For technical support, including LTC2440IGN#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2440IGN#PBF requirements.
6.How does Aetrix verify that LTC2440IGN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2440IGN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2440IGN#PBF meets industry standards.
7.What is the process for return or replacement of LTC2440IGN#PBF?
All LTC2440IGN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2440IGN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2440IGN#PBF part is unused and in its original packaging.
Return procedure for LTC2440IGN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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