Analog Devices Inc. LTC2512CDKD-24#PBF
- Part No.:
- LTC2512CDKD-24#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-WFDFN Exposed Pad
- Datasheet:
-
LTC2512CDKD-24#PBF.pdf
- Description:
- IC ADC 24BIT SAR 24DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2512CDKD-24#PBF from Analog Devices (formerly Linear Technology) is a 24-bit oversampling successive approximation register (SAR) analog-to-digital converter with dual-output architecture: a 24-bit digitally filtered low-noise output and a 22-bit no-latency composite output (14-bit differential + 8-bit common-mode). It operates from a single 2.5V analog supply, supports VREF from 2.5V to 5.1V, delivers 117dB dynamic range at 50ksps, and uses a 24-lead 7mm × 4mm DFN package. It is used in high-accuracy instrumentation requiring simultaneous precision and real-time feedback.
For engineers reviewing the LTC2512CDKD-24#PBF datasheet, LTC2512CDKD-24#PBF pinout, LTC2512CDKD-24#PBF application, or LTC2512CDKD-24#PBF equivalent, key selection considerations include its configurable digital filter (down-sampling factors 4–32), ±1ppm INL, guaranteed 24-bit no-missing-codes operation, wide 0V–VREF common-mode input range, and SPI-compatible 1.8V–5V I/O interface.
Technical Context
The LTC2512CDKD-24#PBF integrates a 24-bit SAR ADC core with a pin-strappable flat-passband digital lowpass filter that performs decimation and noise shaping. Its dual-output architecture separates high-precision measurement (24-bit filtered SDOA) from cycle-accurate monitoring (22-bit no-latency SDOB), enabling concurrent high-resolution data acquisition and real-time control loop feedback without pipeline delay.
It features fully differential inputs with 128dB CMRR, supports synchronization across multiple devices via SYNC, and uses separate analog (VDD) and digital I/O (OVDD) supplies to isolate noise-sensitive conversion from interface logic. The device guarantees operation from 0°C to 70°C and achieves aperture jitter of 4psRMS for sub-ppm linearity stability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 24-bit filtered output; 14-bit differential + 8-bit common-mode no-latency output - enables simultaneous precision measurement and real-time system state monitoring. |
| Dynamic Range | 117dB at 50ksps (DF=32); 108dB at 400ksps (DF=4) - determines minimum detectable signal in presence of quantization and thermal noise. |
| INL Error | ±1ppm typical (±3.5ppm max) - ensures <0.0001% gain/offset nonlinearity over full scale, critical for metrology-grade calibration. |
| Input Common-Mode Range | 0V to VREF (2.5V–5.1V) - simplifies front-end design by accepting unipolar, pseudo-differential, or true bipolar signals without level-shifting. |
| Power Consumption | 30mW at 1.6Msps - enables high-speed precision conversion in thermally constrained or battery-assisted systems. |
| Sampling Rate | 1.6Msps maximum - defines maximum Nyquist bandwidth (800kHz) for anti-aliasing filter design. |
| Reference Voltage Range | 2.5V to 5.1V - sets LSB size from 298nV (5.1V ref) to 596nV (5V ref), directly scaling measurement resolution. |
Pinout & Package
Package: 24-lead plastic DFN (7mm × 4mm), exposed pad (Pin 25) connected to GND. Requires soldering of exposed pad to PCB ground plane for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RDLA (1) | Filtered Output Read Enable | Active-low control for SDOA; enables 24-bit filtered serial output when asserted - allows multiplexed bus sharing with other devices. |
| RDLB (2) | No-Latency Output Read Enable | Active-low control for SDOB; enables 22-bit composite output each conversion cycle - supports real-time closed-loop response. |
| VDD (3) | Analog Power Supply | 2.5V ±62.5mV supply for SAR core and reference buffer - must be bypassed with 10µF ceramic capacitor to minimize noise coupling. |
| IN+ / IN– (5,6) | Differential Analog Inputs | Accept ±VREF differential range with 0V–VREF common-mode swing - eliminates need for external level-shifting circuitry. |
| SEL0 / SEL1 (11,12) | Down-Sampling Factor Select | Binary-coded pins selecting DF = 4, 8, 16, or 32 - configures digital filter bandwidth and dynamic range trade-off without software overhead. |
| MCLK (13) | Master Clock Input | Rising edge initiates conversion and powers up internal logic - serves as both timing reference and power-on trigger. |
| SYNC (14) | Synchronization Input | Edge-triggered input aligning digital filter phase across multiple LTC2512CDKD-24#PBF devices - essential for coherent multi-channel sampling. |
| DRL (15) | Data Ready Low Output | Falling edge indicates new 24-bit filtered code ready in SDOA register - provides hardware handshaking for deterministic read timing. |
| SDOA / SCKA (17,18) | Filtered Output Data & Clock | 24-bit 2's complement data shifted MSB-first on SCKA rising edges - supports standard SPI timing with programmable clock rate up to 100MHz. |
| SDOB / SCKB (20,19) | No-Latency Output Data & Clock | 22-bit composite code (14+8) shifted MSB-first on SCKB rising edges - delivers cycle-accurate differential and common-mode values for real-time diagnostics. |
| BUSY (21) | Conversion Status Indicator | High during conversion, low when complete - provides asynchronous status for interrupt-driven firmware or logic control. |
| OVDD (22) | Digital I/O Supply | 1.71V–5.25V supply for all digital pins (RDLx, SDOx, SCKx, SYNC, etc.) - enables direct interfacing with 1.8V, 2.5V, 3.3V, or 5V controllers. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent output streams | 24-bit filtered output (SDOA) and 22-bit no-latency composite output (SDOB) enable concurrent high-accuracy measurement and real-time system monitoring without architectural compromise. |
| Configurable flat-passband digital filter | Four pin-selectable down-sampling factors (4–32) allow dynamic adjustment of noise floor vs. throughput - eliminates need for external DSP or FPGA filtering. |
| Wide common-mode input range (0V to VREF) | Supports arbitrary unipolar, pseudo-differential, and true bipolar input configurations without external biasing - reduces BOM count and layout complexity. |
| Guaranteed 24-bit no missing codes | Ensures monotonicity and absence of code gaps across full temperature range - required for closed-loop control and metrology applications where code rollover must be predictable. |
| Multi-device synchronization via SYNC pin | Enables phase-aligned sampling across multiple LTC2512CDKD-24#PBF units - critical for coherent multi-channel data acquisition in seismic or ATE systems. |
| Low aperture jitter (4psRMS) | Minimizes sampling time uncertainty, preserving SNR at high input frequencies - directly supports >100dB SINAD up to 2kHz input tones. |
Applications
| Seismology Data Acquisition | Energy Exploration Sensors |
|---|---|
|
Use Scenario: High-fidelity recording of microseismic events using geophone arrays deployed in boreholes or surface grids. IC Role / Device Role / Timing Role: Primary 24-bit digitizer capturing low-amplitude, low-frequency (<100Hz) ground motion signals with ultra-low noise floor. Use Value: 117dB dynamic range at 50ksps resolves sub-nanovolt-level signals buried in thermal noise, while SYNC pin enables precise time-of-arrival correlation across distributed sensor nodes. |
Use Scenario: Downhole logging tools measuring resistivity, gamma ray, and acoustic impedance in oil/gas exploration. IC Role / Device Role / Timing Role: Precision ADC in harsh-environment sensor front-ends operating at elevated temperatures and high EMI. Use Value: Guaranteed operation to 70°C, ±1ppm INL, and 128dB CMRR reject common-mode interference from motor drives and telemetry signals, ensuring measurement integrity. |
| Automated Test Equipment (ATE) | High-Accuracy Instrumentation |
|
Use Scenario: Calibration-grade source-measure units verifying DMMs, calibrators, and sensor transmitters. IC Role / Device Role / Timing Role: Reference-grade digitizer providing traceable DC and AC voltage/current measurements. Use Value: 24-bit no-missing-codes performance and <±1ppm INL meet ANSI/NCSL Z540 and ISO/IEC 17025 metrological requirements for accredited calibration labs. |
Use Scenario: Portable power quality analyzers monitoring harmonic distortion, flicker, and transient events in grid infrastructure. IC Role / Device Role / Timing Role: Dual-output ADC feeding real-time FFT engine (via SDOB) and archival storage (via SDOA). Use Value: Simultaneous 22-bit no-latency output captures fast transients (e.g., voltage sags) while 24-bit filtered output logs long-term trends - eliminating trade-offs between speed and resolution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS1282IPWR | 24-bit delta-sigma ADC; 78dB dynamic range at 4ksps; integrated PGA and sensor bias; no no-latency output mode. | Optimized for ultra-low-frequency (<10Hz) geophysical sensing with built-in gain; lacks cycle-accurate real-time output. | Select ADS1282IPWR when ultra-low power and integrated analog front-end outweigh need for high-speed no-latency output. |
| AD7768-1BCPZ | 24-bit sigma-delta ADC; 112dB DR at 256ksps; 8-channel mux; requires external reference; no pin-strappable filter. | Targets multi-channel data acquisition with flexible channel sequencing; higher power (80mW) and larger 40-lead LFCSP package. | Select AD7768-1BCPZ when channel density and integrated digital filters outweigh need for single-chip dual-output simplicity. |
Compared with ADS1282IPWR and AD7768-1BCPZ, the LTC2512CDKD-24#PBF uniquely delivers both 24-bit precision and true no-latency 22-bit output in a compact DFN, enabling real-time control decisions without sacrificing metrology-grade accuracy - a capability not replicated by either alternative.
Availability
LTC2512CDKD-24#PBF is available at Aetrix Electronics and suitable for seismology data acquisition, energy exploration sensors, and automated test equipment requiring stable component supply, long-term lifecycle support, and guaranteed 0°C to 70°C industrial temperature grade performance.
Supply support for LTC2512CDKD-24#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed through the acquisition of Linear Technology in 2017.
The LTC2512CDKD-24#PBF belongs to ADI's precision data conversion product line, designed specifically for applications demanding simultaneous high resolution, low latency, and robustness in challenging measurement environments such as geophysical sensing and metrology.
FAQ
What is the operating temperature range for the LTC2512CDKD-24#PBF?
The LTC2512CDKD-24#PBF is specified for operation from 0°C to 70°C. This commercial-grade temperature range is indicated by the "C" suffix in the part number and is validated per the Absolute Maximum Ratings table and Electrical Characteristics tested across the full range. The device maintains ±1ppm INL and 117dB dynamic range performance within this interval.
Does the LTC2512CDKD-24#PBF support true bipolar input signals?
Yes, the LTC2512CDKD-24#PBF supports true bipolar differential inputs. With VREF set to 5V and common-mode voltage at 2.5V, the IN+/IN– inputs accept a differential range of ±5V (i.e., –5V to +5V) while maintaining full 24-bit linearity. Its 0V to VREF common-mode range allows direct connection of bipolar sources without external level-shifting circuitry.
How does the dual-output architecture of the LTC2512CDKD-24#PBF work in practice?
The LTC2512CDKD-24#PBF outputs two independent data streams: a 24-bit digitally filtered code on SDOA (with latency dependent on down-sampling factor) and a 22-bit no-latency composite code on SDOB (14-bit differential + 8-bit common-mode) delivered every conversion cycle. This allows one processor thread to log high-precision data while another executes real-time control based on instantaneous input conditions - all from a single IC.
Can multiple LTC2512CDKD-24#PBF devices be synchronized, and how?
Yes, multiple LTC2512CDKD-24#PBF devices can be synchronized using the dedicated SYNC pin (Pin 14). A synchronous pulse applied to SYNC aligns the phase of the internal digital filters across all connected devices, ensuring coherent sampling for multi-channel applications such as phased-array seismic sensors or parallel ATE channels.
What are the power supply requirements for the LTC2512CDKD-24#PBF?
The LTC2512CDKD-24#PBF requires two independent supplies: VDD = 2.5V ±62.5mV (2.375V–2.625V) for the analog core, and OVDD = 1.71V–5.25V for all digital I/O pins (RDLA/RDLB/SDOA/SDOB/SCKA/SCKB/SYNC/MCLK/BUSY/DRL). Separate bypassing - 10µF at VDD and 0.1µF at OVDD - is mandatory for specified noise and timing performance.
LTC2512CDKD-24#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 24
- Sampling Rate (Per Second):
- 1.6M
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.375V ~ 2.625V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 24-DFN (7x4)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2512CDKD-24#PBF FAQ
1.How can I place an order for LTC2512CDKD-24#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2512CDKD-24#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2512CDKD-24#PBF reliable?
The price and inventory of LTC2512CDKD-24#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2512CDKD-24#PBF is usually 5 days.
3.What payment methods are accepted for LTC2512CDKD-24#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2512CDKD-24#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2512CDKD-24#PBF?
LTC2512CDKD-24#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2512CDKD-24#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2512CDKD-24#PBF?
For technical support, including LTC2512CDKD-24#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2512CDKD-24#PBF requirements.
6.How does Aetrix verify that LTC2512CDKD-24#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2512CDKD-24#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2512CDKD-24#PBF meets industry standards.
7.What is the process for return or replacement of LTC2512CDKD-24#PBF?
All LTC2512CDKD-24#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2512CDKD-24#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2512CDKD-24#PBF part is unused and in its original packaging.
Return procedure for LTC2512CDKD-24#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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