Analog Devices Inc. LTC2512CDKD-24#TRPBF
- Part No.:
- LTC2512CDKD-24#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-WFDFN Exposed Pad
- Datasheet:
-
LTC2512CDKD-24#TRPBF.pdf
- Description:
- IC ADC 24BIT SAR 24DFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,055
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Product details
Overview
LTC2512CDKD-24#TRPBF from Analog Devices (formerly Linear Technology) is a 24-bit oversampling successive approximation register (SAR) analog-to-digital converter with integrated configurable digital filter, operating from a single 2.5V supply and supporting ±VREF differential input range up to ±5.1V. It delivers dual simultaneous outputs: a 24-bit low-noise filtered code (117dB dynamic range at 50ksps) and a 22-bit no-latency composite code (14-bit differential + 8-bit common-mode), targeting high-accuracy DC-coupled measurement systems in seismology and energy exploration.
For engineers reviewing the LTC2512CDKD-24#TRPBF datasheet, LTC2512CDKD-24#TRPBF pinout, LTC2512CDKD-24#TRPBF application, or LTC2512CDKD-24#TRPBF equivalent, key selection criteria include guaranteed 24-bit no-missing-codes performance, ±1ppm INL, configurable down-sampling factors (4–32), SPI-compatible 1.8V–5V I/O, and synchronization capability across multiple devices.
Technical Context
The LTC2512CDKD-24#TRPBF implements a 24-bit SAR ADC core followed by a pin-strappable digital lowpass filter that performs decimation and noise shaping, enabling dynamic range scaling from 108dB at 400ksps to 117dB at 50ksps. Its dual-output architecture separates precision measurement (SDOA) from real-time monitoring (SDOB), with independent serial interfaces (SCKA/SDOA and SCKB/SDOB) and dedicated data-ready signals (DRL, BUSY).
It supports wide common-mode input range (0V to VREF), operates with reference voltages from 2.5V to 5.1V, and features 128dB CMRR at 2kHz for filtered output. The device uses a charge redistribution capacitor DAC and achieves 405ns conversion time with 1.6Msps maximum sampling rate, while maintaining 30mW power consumption at full speed.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 24-bit filtered output; 14-bit differential + 8-bit common-mode no-latency output |
| Dynamic Range | 117dB at 50ksps (DF=32), 108dB at 400ksps (DF=4) - enables high-fidelity low-frequency signal capture |
| INL Error | ±1ppm typical - ensures sub-ppm linearity critical for metrology-grade instrumentation |
| Power Consumption | 30mW at 1.6Msps - supports low-power high-precision sensing without thermal drift penalties |
| Reference Range | 2.5V to 5.1V - allows flexible system-level voltage scaling and noise-performance tradeoffs |
| Common-Mode Range | 0V to VREF - simplifies front-end design for unipolar, pseudo-differential, and bipolar signal conditioning |
| Sampling Rate | 1.6Msps maximum - provides oversampling headroom for digital filtering and aliasing suppression |
Pinout & Package
24-lead 7mm × 4mm plastic DFN package (DKD) with exposed pad (Pin 25 = GND). Pinout optimized for low-noise analog layout: dedicated REF pins (8,9,10), separated analog/digital grounds (Pins 4,7,16,23,24), and independent I/O supplies (VDD = 2.5V, OVDD = 1.71V–5.25V).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RDLA (1) | Filtered Output Read Enable | Active-low control for SDOA; enables 24-bit filtered data transfer via SCKA |
| RDLB (2) | No-Latency Output Read Enable | Active-low control for SDOB; enables 22-bit composite output (14+8) via SCKB |
| VDD (3) | Analog Core Supply | 2.375V–2.625V supply for SAR core and internal references; requires 10µF bypass |
| IN+ / IN– (5,6) | Differential Analog Inputs | Support ±VREF full-scale range with 0V–VREF common-mode; 45pF input capacitance in sample mode |
| REF (8,9,10) | Reference Voltage Input | 2.5V–5.1V reference; three pins for low-impedance connection and 47µF X7R decoupling |
| SEL0 / SEL1 (11,12) | Down-Sampling Factor Select | Pin-strapped configuration for DF=4,8,16,32 - sets filter bandwidth and dynamic range |
| MCLK (13) | Master Clock Input | Rising-edge-triggered conversion start; powers up device and initiates acquisition phase |
| SYNC (14) | Synchronization Input | Aligns digital filter phase across multiple LTC2512CDKD-24#TRPBF devices for coherent sampling |
| DRL (15) | Data Ready Low Output | Falling edge indicates new 24-bit filtered code ready in SDOA output register |
| SDOA / SCKA (17,18) | Filtered Output Serial Interface | 24-bit 2's complement MSB-first output synchronized to SCKA rising edges |
| SDOB / SCKB (20,19) | No-Latency Output Serial Interface | 22-bit composite (14+8) MSB-first output synchronized to SCKB rising edges |
| BUSY (21) | Conversion Status Indicator | High during conversion; low when 24-bit filtered result is latched and ready |
| OVDD (22) | Digital I/O Supply | 1.71V–5.25V interface supply; sets logic thresholds for all digital pins (RDLA, RDLB, SYNC, etc.) |
Key Features
| Feature | Design Value |
|---|---|
| Dual Simultaneous Outputs | 24-bit filtered low-noise code (SDOA) and 22-bit no-latency composite code (SDOB) enable precision measurement + real-time diagnostics in one device |
| Configurable Digital Filter | Four pin-selectable down-sampling factors (4–32) allow dynamic tradeoff between throughput (400ksps) and resolution (117dB DR) |
| Wide Common-Mode Range | 0V to VREF operation eliminates need for level-shifting circuitry in unipolar, pseudo-differential, and true bipolar sensor interfaces |
| Guaranteed No Missing Codes | 24-bit monotonicity ensured over temperature - critical for closed-loop control and calibration applications requiring absolute code integrity |
| Multi-Device Synchronization | SYSNC pin enables deterministic phase alignment of digital filters across multiple LTC2512CDKD-24#TRPBF units for distributed high-channel-count systems |
| Low Power at Full Speed | 30mW at 1.6Msps sampling - maintains thermal stability in dense PCB layouts without forced air or heatsinking |
Applications
| Seismology Data Acquisition | Energy Exploration Sensors |
|---|---|
|
Use Scenario: High-resolution recording of microseismic events using geophone arrays deployed in boreholes or surface grids. IC Role / Device Role / Timing Role: Primary 24-bit digitizer for low-frequency (<100Hz), low-amplitude (<100µV) analog signals with ultra-low noise floor and minimal harmonic distortion. Use Value: 117dB dynamic range at 50ksps captures weak seismic reflections while rejecting ambient noise; ±1ppm INL ensures accurate amplitude calibration across channel banks. |
Use Scenario: Downhole logging tools measuring resistivity, gamma radiation, and acoustic impedance in oil/gas wellbores under extreme temperature conditions. IC Role / Device Role / Timing Role: Precision ADC for DC-coupled sensor front-ends requiring stable offset and gain over –40°C to +85°C operating range. Use Value: Guaranteed operation to 85°C with <±0.05ppm/°C full-scale drift enables long-duration logging runs without recalibration; wide common-mode range accommodates varying sensor bias levels. |
| Automated Test Equipment (ATE) | High-Accuracy Instrumentation |
|
Use Scenario: Calibration-grade source-measure units verifying DMMs, calibrators, and sensor simulators with traceable accuracy. IC Role / Device Role / Timing Role: Metrology-grade ADC providing reference-grade measurements with 24-bit no-missing-codes assurance and low aperture jitter (4ps RMS). Use Value: 108dB dynamic range at 400ksps supports fast settling tests; dual-output architecture allows concurrent verification of both differential and common-mode behavior in stimulus-response validation. |
Use Scenario: Portable laboratory-grade multimeters and impedance analyzers requiring battery-operated precision without external reference buffers. IC Role / Device Role / Timing Role: Integrated ADC subsystem delivering calibrated 24-bit results directly to microcontroller via SPI, eliminating external digital filtering hardware. Use Value: On-chip configurable digital filter relaxes anti-aliasing requirements, reducing BOM count and board area; 1.8V–5V OVDD compatibility enables direct interfacing with diverse host processors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7768-1BCPZ | 24-bit Σ-Δ architecture; 118.5dB DR at 128ksps; fixed 128× oversampling; single-output only | Superior low-frequency noise but lacks no-latency output; requires external clock and reference; larger 40-lead LFCSP package | Select AD7768-1BCPZ when ultimate 1/f noise performance is required and real-time differential monitoring is not needed. |
| ADS127L01IPWR | 24-bit Σ-Δ ADC; 112dB DR at 512ksps; integrated PGA; SPI interface; 20-lead TSSOP | Includes programmable gain amplifier and lower power (18mW); no dual-output capability; limited common-mode range (0.3V to AVDD–0.3V) | Select ADS127L01IPWR when signal conditioning gain is required on-chip and board space constraints favor TSSOP over DFN. |
Compared with AD7768-1BCPZ and ADS127L01IPWR, the LTC2512CDKD-24#TRPBF uniquely combines SAR speed (1.6Msps), dual-output latency separation, and pin-strappable filtering - making it optimal for systems needing both high-fidelity measurement and cycle-accurate monitoring without external logic.
Availability
LTC2512CDKD-24#TRPBF is available at Aetrix Electronics and suitable for seismology data acquisition, energy exploration sensors, and automated test equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing for industrial OEM programs.
Supply support for LTC2512CDKD-24#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, communications, automotive, and healthcare markets.
The LTC2512CDKD-24#TRPBF belongs to ADI's precision data acquisition product line, designed specifically for applications demanding metrology-grade accuracy, low power, and flexible digital filtering in harsh environments.
FAQ
What is the operating temperature range for the LTC2512CDKD-24#TRPBF?
The LTC2512CDKD-24#TRPBF is specified for commercial temperature operation from 0°C to 70°C. This grade is confirmed by the "C" suffix in the part number and documented in the Absolute Maximum Ratings table. It is distinct from the industrial-grade LTC2512IDKD-24#TRPBF (–40°C to +85°C) and must be selected based on end-equipment environmental requirements. Thermal derating is not required within this range.
Does the LTC2512CDKD-24#TRPBF support true bipolar input operation?
Yes, the LTC2512CDKD-24#TRPBF supports true bipolar differential input operation with a full-scale range of ±VREF (e.g., ±5V with 5V reference), enabled by its fully differential architecture and wide 0V to VREF common-mode input range. The transfer function is defined in 2's complement format, and the device guarantees ±1ppm integral nonlinearity across the entire input span - essential for precision bipolar sensor interfaces.
How does the digital filter configuration affect the output data rate of the LTC2512CDKD-24#TRPBF?
The digital filter down-sampling factor (DF = 4, 8, 16, or 32) directly determines the filtered output data rate (fDRA) of the LTC2512CDKD-24#TRPBF. With a 1.6Msps sampling rate, fDRA equals 400ksps (DF=4), 200ksps (DF=8), 100ksps (DF=16), or 50ksps (DF=32). This relationship is fixed and deterministic - no firmware or register writes are needed, as configuration is performed via SEL0/SEL1 pin strapping.
Can the LTC2512CDKD-24#TRPBF operate with different supply voltages for analog and digital I/O sections?
Yes, the LTC2512CDKD-24#TRPBF uses separate supplies: VDD (2.375V–2.625V) powers the analog SAR core, while OVDD (1.71V–5.25V) powers all digital I/O pins (RDLA, RDLB, SCKA, SCKB, etc.). This allows interfacing with 1.8V, 2.5V, 3.3V, or 5V host processors without level shifters. Logic thresholds scale with OVDD (VIH = 0.8×OVDD, VIL = 0.2×OVDD), ensuring robust signal integrity.
What is the significance of the "no latency" 22-bit output in the LTC2512CDKD-24#TRPBF?
The "no latency" 22-bit output (SDOB) of the LTC2512CDKD-24#TRPBF consists of a 14-bit differential voltage code and an 8-bit common-mode voltage code, delivered each conversion cycle with zero cycles of delay. Unlike the filtered 24-bit output, it bypasses the digital decimation filter - enabling real-time monitoring of input transients, fault detection, or adaptive gain control while the high-precision filtered output undergoes noise reduction.
LTC2512CDKD-24#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 24
- Sampling Rate (Per Second):
- 1.6M
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.375V ~ 2.625V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 24-DFN (7x4)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2512CDKD-24#TRPBF FAQ
1.How can I place an order for LTC2512CDKD-24#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2512CDKD-24#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2512CDKD-24#TRPBF reliable?
The price and inventory of LTC2512CDKD-24#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2512CDKD-24#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC2512CDKD-24#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2512CDKD-24#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2512CDKD-24#TRPBF?
LTC2512CDKD-24#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2512CDKD-24#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2512CDKD-24#TRPBF?
For technical support, including LTC2512CDKD-24#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2512CDKD-24#TRPBF requirements.
6.How does Aetrix verify that LTC2512CDKD-24#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC2512CDKD-24#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2512CDKD-24#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC2512CDKD-24#TRPBF?
All LTC2512CDKD-24#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2512CDKD-24#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2512CDKD-24#TRPBF part is unused and in its original packaging.
Return procedure for LTC2512CDKD-24#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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