Analog Devices Inc. LTC2512IDKD-24#PBF
- Part No.:
- LTC2512IDKD-24#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-WFDFN Exposed Pad
- Datasheet:
-
LTC2512IDKD-24#PBF.pdf
- Description:
- IC ADC 24BIT SAR 24DFN
- Quantity:
- Payment:

- Shipping:

Inventory:207
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Product details
Overview
LTC2512IDKD-24#PBF from Analog Devices (formerly Linear Technology) is a 24-bit successive approximation register (SAR) analog-to-digital converter with integrated configurable digital filter, operating from a single 2.5V supply and supporting ±VREF differential input range up to ±5.1V. It delivers dual simultaneous outputs: a 24-bit low-noise filtered code (117dB DR at 50ksps) and a 22-bit no-latency composite code (14-bit differential + 8-bit common-mode), in a 24-lead 7mm × 4mm DFN package rated for –40°C to +85°C operation.
For engineers reviewing the LTC2512IDKD-24#PBF datasheet, LTC2512IDKD-24#PBF pinout, LTC2512IDKD-24#PBF application, or LTC2512IDKD-24#PBF equivalent, key selection criteria include guaranteed 24-bit no-missing-codes performance, configurable down-sampling factors (4–32), relaxed anti-aliasing requirements due to on-chip digital filtering, and synchronization capability across multiple devices via SYNC pin.
Technical Context
The LTC2512IDKD-24#PBF implements a charge redistribution capacitor DAC-based SAR core with 24-bit resolution and ±1ppm typical INL. Its dual-output architecture separates high-precision filtered data (SDOA) from real-time composite data (SDOB), enabling concurrent high-accuracy measurement and fast control loop feedback.
Digital filtering is implemented as a flat-passband lowpass decimator with four pin-strappable down-sampling ratios (DF = 4, 8, 16, 32), directly determining output data rate (400ksps to 50ksps) and dynamic range (108dB to 117dB). Synchronization across multiple units is supported via dedicated SYNC input, and timing is governed by MCLK-initiated conversion cycles with BUSY and DRL status signals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 24-bit filtered output; 14-bit differential + 8-bit common-mode no-latency output |
| Dynamic Range | 117dB typical at 50ksps (DF=32), 108dB at 400ksps (DF=4) |
| INL Error | ±1ppm typical over full input range, guaranteeing ±3.5ppm max |
| Input Range | Fully differential ±VREF (up to ±5.1V); common-mode 0V to VREF |
| Power Consumption | 30mW at 1.6Msps sampling rate; 2.5µW in power-down mode |
| Digital Interface | SPI-compatible serial I/O with 1.8V–5V OVDD; dual independent SCKA/SDOA and SCKB/SDOB ports |
| Operating Temp | –40°C to +85°C (Industrial grade, denoted by 'I' in part number) |
Pinout & Package
Package: 24-lead plastic DFN (7mm × 4mm), exposed pad (Pin 25) connected to GND and required to be soldered to PCB ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RDLA (1) | Filtered Output Enable | Active-low control for SDOA port; enables 24-bit filtered data output when low |
| RDLB (2) | No-Latency Output Enable | Active-low control for SDOB port; enables 22-bit composite output each conversion cycle |
| VDD (3) | Analog Core Supply | 2.5V ±62.5mV supply for SAR ADC core; requires 10µF ceramic bypass to GND |
| IN+ / IN– (5/6) | Differential Analog Inputs | High-impedance inputs with 45pF sampling capacitance; support 0V to VREF common-mode range |
| REF (8–10) | Reference Voltage Input | Accepts 2.5V–5.1V reference; requires 47µF X7R ceramic decoupling at pin |
| SEL0 / SEL1 (11/12) | Filter Configuration | Pin-strapped inputs selecting down-sampling factor: 00=4, 01=8, 10=16, 11=32 |
| MCLK (13) | Master Clock Input | Rising edge initiates conversion; also powers up device from standby |
| SYNC (14) | Multi-Device Sync | External pulse aligns digital filter phase across multiple LTC2512IDKD-24#PBF units |
| DRL (15) | Filtered Data Ready | Active-low signal indicating new 24-bit filtered code is available in SDOA register |
| SDOA / SCKA (17/18) | Filtered Data Port | MSB-first 2's complement serial output clocked by SCKA; supports up to 100MHz SCKA frequency |
| SDOB / SCKB (20/19) | No-Latency Data Port | MSB-first 22-bit composite output clocked by SCKB; available every conversion cycle with zero latency |
| BUSY (21) | Conversion Status | High during conversion; transitions low when 24-bit filtered result is ready |
| OVDD (22) | I/O Interface Supply | 1.71V–5.25V digital interface supply; sets logic thresholds for all digital pins |
Key Features
| Feature | Design Value |
|---|---|
| Dual Simultaneous Outputs | 24-bit filtered low-noise code (SDOA) and 22-bit no-latency composite code (SDOB) available concurrently per conversion |
| Configurable Digital Filter | Four selectable down-sampling factors (4–32) via SEL0/SEL1 pins, enabling trade-off between data rate and dynamic range |
| Relaxed Anti-Aliasing | On-chip digital lowpass filtering reduces analog front-end filter complexity and component count |
| Wide Common-Mode Range | 0V to VREF input common-mode support simplifies signal conditioning for bipolar, unipolar, and pseudo-differential sources |
| Multi-Unit Synchronization | Synchronous operation of multiple LTC2512IDKD-24#PBF devices via shared SYNC signal ensures coherent sampling across channels |
Applications
| Seismology Data Acquisition | Energy Exploration Sensors |
|---|---|
Use Scenario: High-resolution seismic waveform capture in geophone arrays deployed in remote field environments with wide temperature variation. IC Role / Device Role / Timing Role: Primary 24-bit digitizer for low-frequency (<100Hz) earth motion signals, leveraging 117dB dynamic range at 50ksps and –40°C to +85°C operation. Use Value: Enables detection of sub-microvolt signals buried in noise without external amplification, reducing system power and component count. | Use Scenario: Downhole logging tools measuring resistivity, gamma radiation, and acoustic emissions under extreme thermal and mechanical stress. IC Role / Device Role / Timing Role: Precision ADC for sensor front-ends requiring guaranteed 24-bit monotonicity and ±1ppm INL over full industrial temperature range. Use Value: Eliminates calibration drift concerns in long-duration deployments due to ultra-stable zero-scale and full-scale error specifications. |
| Automated Test Equipment (ATE) | High-Accuracy Instrumentation |
Use Scenario: Modular ATE mainframe digitizer card performing DC parametric testing and low-frequency AC measurements on semiconductor devices. IC Role / Device Role / Timing Role: Dual-output ADC providing real-time pass/fail decision (via SDOB) while simultaneously capturing high-fidelity characterization data (via SDOA). Use Value: Reduces test time by eliminating separate fast/slow ADC stages; 22-bit no-latency output enables immediate go/no-go decisions within same conversion cycle. | Use Scenario: Portable calibrator and metrology-grade multimeter requiring traceable accuracy and minimal warm-up drift. IC Role / Device Role / Timing Role: Core ADC in precision voltage/current measurement path, using internal 5V reference and configurable filter to optimize SNR for specific measurement bandwidth. Use Value: Achieves 117dB DR with 50ksps output rate-sufficient for 6½-digit resolution-without external averaging or oversampling firmware. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS1287IRHBT | 24-bit delta-sigma ADC; 128ksps max output rate; integrated PGA and reference; SPI interface | Higher integration but lower maximum throughput; optimized for low-speed, high-gain sensor interfaces rather than wide-bandwidth dual-output use cases | Select when system requires on-chip programmable gain amplifier and built-in reference, accepting lower sample rate and different noise shaping behavior |
| AD7768-1ACPZ | 24-bit sigma-delta ADC; 256ksps output rate; 118.5dB DR at 128ksps; integrated digital filter and reference | Superior dynamic range at higher data rates but lacks true no-latency output; uses different digital filter architecture (not pin-configurable down-sampling) | Select when highest possible DR at >100ksps is critical and real-time 22-bit composite output is not required |
Compared with ADS1287IRHBT and AD7768-1ACPZ, the LTC2512IDKD-24#PBF uniquely provides simultaneous 24-bit filtered and 22-bit no-latency outputs in a single chip, with pin-selectable digital filtering and multi-device synchronization-enabling hybrid measurement/control architectures not possible with delta-sigma alternatives.
Availability
LTC2512IDKD-24#PBF is available at Aetrix Electronics and suitable for seismology data acquisition, energy exploration sensors, and automated test equipment requiring stable component supply, extended temperature operation, and guaranteed 24-bit monotonicity.
Supply support for LTC2512IDKD-24#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed through the acquisition of Linear Technology in 2017.
The LTC2512IDKD-24#PBF belongs to ADI's precision SAR ADC product line, designed specifically for applications demanding ultra-low noise, high linearity, and deterministic timing-such as instrumentation, industrial sensing, and scientific measurement systems.
FAQ
What is the guaranteed operating temperature range for the LTC2512IDKD-24#PBF?
The LTC2512IDKD-24#PBF is specified for industrial temperature operation from –40°C to +85°C, as indicated by the 'I' grade designation in the part number. This rating is verified across all electrical parameters including INL, dynamic range, and power consumption, ensuring reliable performance in harsh environmental conditions encountered in energy exploration and outdoor instrumentation.
How does the dual-output architecture of the LTC2512IDKD-24#PBF function in practice?
The LTC2512IDKD-24#PBF generates two independent digital outputs per conversion cycle: a 24-bit filtered code on SDOA (with latency dependent on down-sampling factor) and a 22-bit no-latency composite code on SDOB (14-bit differential + 8-bit common-mode). This allows real-time control decisions using SDOB while simultaneously capturing high-precision measurement data via SDOA-eliminating the need for separate fast/slow ADCs in systems like ATE and closed-loop monitoring.
Can the LTC2512IDKD-24#PBF synchronize multiple devices, and how is this implemented?
Yes, the LTC2512IDKD-24#PBF supports multi-device synchronization via its dedicated SYNC input (Pin 14). Applying a synchronous pulse to this pin aligns the phase of the internal digital filter across all connected LTC2512IDKD-24#PBF units, enabling coherent sampling in multi-channel systems such as phased-array seismometers or parallel ATE digitizer cards-critical for accurate time-domain analysis and channel-to-channel matching.
What reference voltage range is supported by the LTC2512IDKD-24#PBF, and how does it affect LSB size?
The LTC2512IDKD-24#PBF accepts reference voltages from 2.5V to 5.1V on its REF pins. With a 5V reference, the 24-bit full-scale range is ±5V, yielding an LSB size of 596nV (10V / 2²⁴). Lower reference voltages proportionally reduce LSB size and dynamic range; for example, a 2.5V reference halves the input range and LSB size while maintaining the same 24-bit resolution and no-missing-codes guarantee.
What are the power supply requirements for the LTC2512IDKD-24#PBF, and how is decoupling implemented?
The LTC2512IDKD-24#PBF requires two supplies: VDD (2.375V–2.625V, 2.5V nominal) for the analog core, bypassed with a 10µF ceramic capacitor to GND; and OVDD (1.71V–5.25V) for digital I/O, bypassed with a 0.1µF capacitor. The REF pins require a 47µF X7R ceramic capacitor (1210 size, 10V rating) placed directly at the pin. These decoupling values are specified in the datasheet to ensure stable operation and optimal dynamic performance.
LTC2512IDKD-24#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 24
- Sampling Rate (Per Second):
- 1.6M
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.375V ~ 2.625V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 24-DFN (7x4)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
LTC2512IDKD-24#PBF FAQ
1.How can I place an order for LTC2512IDKD-24#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2512IDKD-24#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2512IDKD-24#PBF reliable?
The price and inventory of LTC2512IDKD-24#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2512IDKD-24#PBF is usually 5 days.
3.What payment methods are accepted for LTC2512IDKD-24#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2512IDKD-24#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2512IDKD-24#PBF?
LTC2512IDKD-24#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2512IDKD-24#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2512IDKD-24#PBF?
For technical support, including LTC2512IDKD-24#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2512IDKD-24#PBF requirements.
6.How does Aetrix verify that LTC2512IDKD-24#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2512IDKD-24#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2512IDKD-24#PBF meets industry standards.
7.What is the process for return or replacement of LTC2512IDKD-24#PBF?
All LTC2512IDKD-24#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2512IDKD-24#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2512IDKD-24#PBF part is unused and in its original packaging.
Return procedure for LTC2512IDKD-24#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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