Analog Devices Inc. LTC2904CDDB#TRMPBF
- Part No.:
- LTC2904CDDB#TRMPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
LTC2904CDDB#TRMPBF.pdf
- Description:
- IC SUPERVISOR 2 CHANNEL 8DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2904CDDB#TRMPBF from Analog Devices (formerly Linear Technology) is a precision dual-supply voltage monitor IC with pin-selectable thresholds and fixed 200ms reset timeout. It monitors two independent supply rails (e.g., 5V/3.3V, 3.3V/1.2V), delivers ±1.5% threshold accuracy over 0°C to 70°C, guarantees RST operation down to 1V input, and features open-drain RST output for wired-OR reset signaling in embedded power management systems.
For engineers reviewing the LTC2904CDDB#TRMPBF datasheet, LTC2904CDDB#TRMPBF pinout, LTC2904CDDB#TRMPBF application, or LTC2904CDDB#TRMPBF equivalent, this page provides verified pin functions, nine programmable V1/V2 threshold combinations (e.g., 5.0V/3.3V, 3.3V/1.2V), three tolerance options (5%/7.5%/10%), glitch-immune reset timing, and DFN-8 package layout guidance - all critical for reliable power-up sequencing and brownout detection in space-constrained designs.
Technical Context
The LTC2904CDDB#TRMPBF implements dual high-accuracy comparators with a shared bandgap reference and resistor network decoder, enabling precise undervoltage detection on V1 and V2 inputs without external components. Its internal VCC auto-select logic uses the higher of V1 or V2 as the supply rail for internal circuitry and RST driver stages.
Reset assertion is triggered when either monitored supply falls below its programmed threshold; recovery requires both supplies to remain above threshold for the full 200ms delay. The device incorporates first-order comparator filtering and 200ms timeout to reject transients and ensure noise immunity - no external capacitor required for timing, unlike the LTC2905 variant.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Monitoring Channels | Two independent inputs (V1, V2) with simultaneous monitoring and common reset output |
| Threshold Accuracy | ±1.5% over full temperature range (0°C to 70°C), ensuring tight trip-point control for reliable system reset |
| Reset Timeout | Fixed 200ms (typical), guaranteed 140–260ms, eliminating need for external timing capacitor |
| Minimum Operating Input | RST guaranteed functional with V1 ≥ 1V or V2 ≥ 1V, enabling early reset assertion during power-up |
| Output Type | Open-drain RST with weak internal pull-up to VCC and strong pull-down (≤0.4V at 2.5mA), supporting wired-OR topology |
| Programming Interface | Three 3-state pins (S1, S2, TOL) selecting 9 V1/V2 combinations and 3 tolerances (5%/7.5%/10%) - zero external resistors needed |
| Package | 8-lead (3mm × 2mm) plastic DFN with exposed GND pad, optimized for thermal performance and board area efficiency |
Pinout & Package
Package: 8-lead plastic DFN (3mm × 2mm), exposed pad (Pin 9) soldered to PCB ground for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| V2 (Pin 1) | Voltage Input 2 | Monitors second supply rail (selectable: 3.3V, 2.5V, 1.8V, 1.5V, 1.2V, or 1.0V); also contributes to internal VCC |
| RST (Pin 2) | Reset Output | Active-low open-drain output; asserts low when any supply drops below threshold and holds for 200ms after recovery |
| RST (Pin 3) | Inverted Reset Output | Active-high open-drain output; pulls high (weakly) only when both supplies are valid for full timeout period |
| GND (Pin 4) | Ground Reference | Primary ground connection; exposed pad (Pin 9) must be soldered to PCB ground plane |
| TOL (Pin 5) | Tolerance Select Input | 3-state pin setting common tolerance: V1 = 5%, Open = 7.5%, GND = 10% |
| S1 (Pin 6) | Voltage Threshold Select 1 | 3-state pin defining V1/V2 combination per Table 1 (e.g., V1, GND, or Open) |
| S2 (Pin 7) | Voltage Threshold Select 2 | 3-state pin completing V1/V2 combination selection (e.g., V1, GND, or Open) |
| V1 (Pin 8) | Voltage Input 1 | Monitors primary supply rail (selectable: 5V, 3.3V, or 2.5V); also contributes to internal VCC |
Key Features
| Feature | Design Value |
|---|---|
| Pin-selectable thresholds | 27 total combinations (9 V1/V2 pairs × 3 tolerances) via S1/S2/TOL - eliminates BOM proliferation across voltage variants |
| Glitch-immune reset logic | First-order comparator filtering + 200ms timeout prevents false resets from supply noise or microsecond transients |
| 1V minimum supply support | RST remains functional with V1 ≥ 1V or V2 ≥ 1V, enabling robust power-up sequencing in low-voltage systems |
| Space-efficient DFN packaging | 3mm × 2mm footprint with exposed thermal pad reduces PCB area by >50% vs. SOIC-8 while improving thermal dissipation |
| Zero-component programming | All threshold/tolerance settings configured via 3-state pins - no external resistors, capacitors, or firmware required |
Applications
| Desktop & Notebook Computers | Network Servers |
|---|---|
Use Scenario: Monitoring core CPU (1.2V) and I/O (3.3V) rails during boot and runtime. IC Role / Device Role / Timing Role: Dual-supply monitor asserting system reset if either rail drops below 1.14V (1.2V @ 5% tol.) or 3.135V (3.3V @ 5% tol.) for >200ms. Use Value: Prevents corrupted BIOS execution or PCIe link training failure due to marginal supply conditions. |
Use Scenario: Ensuring stable operation of 5V auxiliary and 3.3V main logic supplies in redundant power architectures. IC Role / Device Role / Timing Role: Simultaneous monitoring with common RST output coordinating reset across multiple server blades. Use Value: Eliminates need for discrete supervisors per rail, reducing component count and inter-board synchronization complexity. |
| Handheld Devices | Core/I/O Power Monitoring |
Use Scenario: Validating battery-backed 3.3V system rail and 1.8V application processor core rail in smartphones. IC Role / Device Role / Timing Role: Detecting brownout on either rail and holding processor in reset until both stabilize for 200ms. Use Value: Avoids data corruption during battery voltage sag or fast transient load switching. |
Use Scenario: Coordinating power-good sequencing between FPGA core (1.0V) and I/O bank (2.5V) supplies. IC Role / Device Role / Timing Role: Enabling safe configuration loading only after both supplies exceed their 10% tolerance thresholds. Use Value: Guarantees FPGA configuration integrity by enforcing strict dual-rail power-up order without external timing logic. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-supply monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6816EUT+T | Single-channel supervisor with manual reset input; no dual-rail monitoring or pin-selectable thresholds | Requires separate devices per rail; lacks integrated V1/V2 coordination and 200ms timer | Select only when single-rail monitoring suffices and board space allows multiple ICs |
| TPS3808G18DBVR | Single-supply monitor with adjustable delay (via capacitor); no V2 input or threshold programming pins | Cannot monitor two supplies simultaneously; needs external resistor divider for each rail | Choose only for cost-sensitive single-rail designs where dual monitoring is handled externally |
Compared with MAX6816EUT+T and TPS3808G18DBVR, the LTC2904CDDB#TRMPBF uniquely integrates dual-rail monitoring, 27-programmable threshold/tolerance combinations, and fixed 200ms reset delay in one DFN-8 package - reducing BOM count, PCB area, and design validation effort for multi-rail systems.
Availability
LTC2904CDDB#TRMPBF is available at Aetrix Electronics and suitable for desktop computers, network servers, and handheld devices requiring stable component supply with guaranteed 0°C to 70°C operation, ±1.5% threshold accuracy, and compact DFN packaging.
Supply support for LTC2904CDDB#TRMPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its precision analog product lines, including high-accuracy power supervision ICs with industry-leading threshold stability and noise immunity.
The LTC2904CDDB#TRMPBF belongs to Linear's legacy LTC290x dual-supply monitor family, designed specifically for space-constrained, multi-rail embedded systems requiring deterministic reset behavior without external timing components.
FAQ
What is the operating temperature range for the LTC2904CDDB#TRMPBF?
The LTC2904CDDB#TRMPBF is rated for 0°C to 70°C ambient operation, as indicated by the "C" grade suffix in its part number. This commercial-grade specification ensures reliable performance in desktop, networking, and consumer electronics environments where ambient temperatures remain within this range. The device maintains ±1.5% threshold accuracy across this full span.
Does the LTC2904CDDB#TRMPBF require an external timing capacitor?
No, the LTC2904CDDB#TRMPBF does not require an external timing capacitor. It features a fixed 200ms reset timeout period implemented internally. This distinguishes it from the LTC2905 variant, which uses the TMR pin and an external capacitor for adjustable delay. The LTC2904CDDB#TRMPBF simplifies design by eliminating capacitor selection, placement, and tolerance concerns.
How many voltage threshold combinations does the LTC2904CDDB#TRMPBF support?
The LTC2904CDDB#TRMPBF supports nine distinct V1/V2 voltage combinations (e.g., 5.0V/3.3V, 3.3V/1.2V) selected via the S1 and S2 pins, plus three tolerance options (5%, 7.5%, 10%) set by the TOL pin - yielding 27 total configurations. All selections are made with simple connections (V1, GND, or open), requiring no external components.
What is the function of the exposed pad on the LTC2904CDDB#TRMPBF DFN package?
The exposed pad (Pin 9) on the LTC2904CDDB#TRMPBF DFN package is electrically and thermally connected to GND. It must be soldered to a PCB ground plane to ensure proper thermal dissipation and electrical stability. Leaving it unconnected degrades thermal performance and may compromise long-term reliability under sustained load conditions.
Can the LTC2904CDDB#TRMPBF monitor supplies below 1.0V?
No, the LTC2904CDDB#TRMPBF does not support monitoring supplies below 1.0V. Its specified V2 input options are 3.3V, 2.5V, 1.8V, 1.5V, 1.2V, and 1.0V; V1 options are 5V, 3.3V, and 2.5V. The device guarantees RST functionality only when V1 ≥ 1V or V2 ≥ 1V - inputs below 1.0V fall outside its validated operating range and are not supported.
LTC2904CDDB#TRMPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- 9 Selectable Threshold Combinations
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-DFN (3x2)
LTC2904CDDB#TRMPBF FAQ
1.How can I place an order for LTC2904CDDB#TRMPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2904CDDB#TRMPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2904CDDB#TRMPBF reliable?
The price and inventory of LTC2904CDDB#TRMPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2904CDDB#TRMPBF is usually 5 days.
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LTC2904CDDB#TRMPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2904CDDB#TRMPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2904CDDB#TRMPBF?
For technical support, including LTC2904CDDB#TRMPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2904CDDB#TRMPBF requirements.
6.How does Aetrix verify that LTC2904CDDB#TRMPBF is sourced from the original manufacturer or authorized distributors?
All LTC2904CDDB#TRMPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2904CDDB#TRMPBF meets industry standards.
7.What is the process for return or replacement of LTC2904CDDB#TRMPBF?
All LTC2904CDDB#TRMPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2904CDDB#TRMPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2904CDDB#TRMPBF part is unused and in its original packaging.
Return procedure for LTC2904CDDB#TRMPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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