Analog Devices Inc. LTC2905IDDB#TRPBF

Overview

LTC2905IDDB#TRPBF from Analog Devices (formerly Linear Technology) is a precision dual supply voltage monitor IC with adjustable reset timeout, open-drain RST output, ±1.5% threshold accuracy over –40°C to +85°C, and programmable 5%/7.5%/10% tolerance for V1 and V2 inputs. It supports 5V/3.3V, 3.3V/2.5V, and seven other dual-voltage combinations in embedded power sequencing for industrial controllers and network infrastructure.

For engineers reviewing the LTC2905IDDB#TRPBF datasheet, LTC2905IDDB#TRPBF pinout, LTC2905IDDB#TRPBF application, or LTC2905IDDB#TRPBF equivalent, key selection criteria include adjustable TMR capacitor-based reset delay (e.g., 200ms with 22nF), guaranteed RST operation down to V1 ≥ 1V or V2 ≥ 1V, three-state programming pins (S1/S2/TOL), and DFN-8 (3mm × 2mm) package compatibility with high-density PCB layouts.

Technical Context

The LTC2905IDDB#TRPBF uses an internal bandgap reference and resistor network to generate precise thresholds for two independent voltage inputs (V1 and V2), with trip points selected via three-state S1/S2/TOL pins. Its reset pulse generator is triggered only after both inputs exceed their programmed thresholds for the full TMR-set delay period.

Glitch immunity is achieved through comparator output integration (first-order low-pass filtering) plus the programmable timeout - suppressing transients shorter than t_RST while preserving ±1.5% threshold accuracy without hysteresis-induced error. The internal VCC is auto-selected as max(V1, V2), enabling operation even when one rail powers up first.

Key Specifications

Pinout & Package

8-lead plastic DFN package (3mm × 2mm), exposed pad = GND (Pin 9, soldered to PCB). Pin 1 marked with bar; top marking "LBCY" per ordering info.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-supply monitoring applications.

Compared with TPS3808G33DBVR and MAX6816EUT+T, the LTC2905IDDB#TRPBF uniquely supports 9 distinct V1–V2 combinations with ±1.5% accuracy and capacitor-adjustable reset timing - making it optimal for multi-rail systems requiring design reuse across voltage variants.

Availability

LTC2905IDDB#TRPBF is available at Aetrix Electronics and suitable for industrial PLCs, network servers, medical imaging subsystems, and automotive ADAS modules requiring stable component supply with extended temperature support (–40°C to +85°C).

Supply support for LTC2905IDDB#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains its high-precision analog IC portfolio, emphasizing reliability, accuracy, and robustness for mission-critical applications.

The LTC2905IDDB#TRPBF belongs to Linear's supervisor IC product line, designed specifically for high-accuracy, low-power dual-rail monitoring in space-constrained industrial and communications equipment where supply sequencing integrity is essential.

FAQ

What is the maximum reset timeout achievable with LTC2905IDDB#TRPBF?

The LTC2905IDDB#TRPBF reset timeout is determined by t_RST = 9 ms/nF × C_TMR. With a 1μF capacitor, t_RST reaches ~9 seconds. Practical limits are imposed by capacitor leakage - TMR charging current must exceed 2.1μA (typical), so low-leakage film or ceramic capacitors are required for timeouts beyond 1 second. The LTC2905IDDB#TRPBF datasheet confirms this scaling law applies across the full operating range.

Can LTC2905IDDB#TRPBF monitor asymmetric voltage pairs like 5V and 1.2V?

Yes, the LTC2905IDDB#TRPBF supports 5V/1.2V monitoring via S1=V1 and S2=GND (per Table 1). This configuration selects V1=5V and V2=1.2V thresholds, with independent 5%/7.5%/10% tolerance applied to both rails via the TOL pin. The LTC2905IDDB#TRPBF maintains ±1.5% accuracy for each rail across –40°C to +85°C, enabling precise brownout detection in mixed-voltage SoC power domains.

Does LTC2905IDDB#TRPBF require external pull-up resistors on the RST pin?

The LTC2905IDDB#TRPBF features a weak internal pull-up (~6μA to VCC) on RST, sufficient for non-critical rise times. However, an external pull-up (e.g., 10kΩ) is recommended when fast rise time (<1μs) or VOH > VCC is needed. At VCC = 1V, internal pull-up strength drops significantly, so a ≤100kΩ external resistor ensures reliable RST high-state assertion during low-voltage fault conditions. This behavior is explicitly characterized in the LTC2905IDDB#TRPBF Electrical Characteristics table.

How does LTC2905IDDB#TRPBF achieve ±1.5% threshold accuracy without hysteresis?

The LTC2905IDDB#TRPBF achieves ±1.5% accuracy by using a precision bandgap reference and laser-trimmed resistor network - avoiding hysteresis-induced threshold uncertainty. Glitch immunity comes from dual-stage filtering: comparator output integration (low-pass) plus the programmable t_RST timeout. This preserves absolute accuracy while rejecting transients shorter than t_RST, unlike hysteresis-based supervisors that trade accuracy for noise immunity. The LTC2905IDDB#TRPBF datasheet confirms this architecture in the Block Diagram and Applications Information sections.

Is the exposed pad on LTC2905IDDB#TRPBF's DFN package electrically connected?

Yes, the exposed pad (Pin 9) on the LTC2905IDDB#TRPBF DFN package is internally connected to GND and must be soldered to the PCB ground plane. Per the Package Description drawing, it is not optional - thermal resistance (θ_JA = 76°C/W) and electrical stability depend on this connection. The datasheet specifies "EXPOSED PAD IS GND (PIN 9), MUST BE SOLDERED TO PCB", and failure to do so risks thermal overload and reset timing drift. This requirement applies specifically to the LTC2905IDDB#TRPBF DFN variant.