Analog Devices Inc. LTC2910CGN#PBF
- Part No.:
- LTC2910CGN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC2910CGN#PBF.pdf
- Description:
- IC SUPERVISOR 8 CHANNEL 16SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:163
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC2910CGN#PBF from Analog Devices (acquired Linear Technology) is an octal-input voltage supervisor IC designed for simultaneous monitoring of up to eight positive or negative supply rails in power management systems. It features ±1.5% threshold accuracy over 0°C to 70°C, 50μA quiescent current, adjustable reset timeout (6–14 ms), and open-drain RST/RST outputs. It is used in desktop/notebook computers and network servers for reliable undervoltage detection and system reset coordination.
For engineers reviewing the LTC2910CGN#PBF datasheet, LTC2910CGN#PBF pinout, LTC2910CGN#PBF application, or LTC2910CGN#PBF equivalent, key selection criteria include input polarity configurability via SEL pin, buffered 1V reference output, glitch-immune comparator architecture, VCC shunt regulation capability up to 6.9V, and guaranteed operation down to VCC = 1V with valid reset assertion.
Technical Context
The LTC2910CGN#PBF integrates eight independent comparators each referenced to a precision 0.5V internal threshold, with input polarity selectable per pair via a three-state SEL pin (VCC/GND/open). Its architecture includes integrated glitch filtering on all inputs and a programmable reset timeout timer controlled by external capacitor on TMR pin.
It provides dual open-drain reset outputs (RST low-active, RST high-active), a buffered 1V reference (±15mV max deviation over temperature), and operates with VCC as direct supply (≤6V) or shunt-regulated input (>6V). UVLO activates at VCC = 2.0V (±0.1V), with 5–50mV hysteresis, ensuring robust power-on sequencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Vn Threshold | 500 mV ±1.5% - enables precise undervoltage trip point setting across all eight inputs |
| Quiescent Current | 50 μA typical - supports ultra-low-power system supervision without burdening standby supplies |
| Reset Timeout Range | 6–14 ms - adjustable via external capacitor on TMR pin for flexible reset pulse width control |
| Reference Output | 1.000 V ±15 mV - buffered 1V reference drives resistive dividers for negative rail monitoring |
| VCC Operating Range | 2.3 V to 6.0 V - direct-supply operation; internal 6.6 V shunt regulator allows safe use with higher voltages |
| Input Leakage | ±15 nA - minimizes error in high-impedance voltage divider networks |
| UVLO Threshold | 2.0 V ±0.1 V - ensures deterministic reset assertion during brown-out conditions |
Pinout & Package
Package: 16-lead plastic SSOP (GN16), 0.150-inch narrow body, 1.0 mm max height, exposed pad optional for thermal enhancement.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| V1–V6 | Positive voltage monitor inputs | Assert reset when voltage falls below 0.5V; tied to VCC if unused |
| V7, V8 | Polarity-configurable inputs | Monitor positive or negative rails depending on SEL state; require REF for negative configuration |
| SEL | Three-state polarity select | Connect to VCC/GND/open to configure V7/V8 as positive/positive, positive/negative, or negative/negative |
| DIS | Reset output disable | Pull high to inhibit RST/RST assertion except during VCC UVLO; weak internal 2μA pull-down |
| TMR | Reset timeout timing capacitor node | Connect CTMR ≥10 pF to GND for delay; tie to VCC to bypass timeout |
| RST | Open-drain active-low reset | Asserts low when any monitored rail fails; guaranteed operation down to VCC = 1V |
| RST | Open-drain active-high reset | Complementary to RST; pulled high during fault, low after timeout recovery |
| REF | Buffered 1V reference output | Sources/sinks ±1 mA; drives capacitive loads ≤1 nF; used as offset for negative rail sensing |
| VCC | Supply input / shunt regulator | Operates directly up to 6V; regulates internally above 6V with external current-limiting resistor |
| GND | Device ground reference | Common return for all analog and digital circuitry; connects to exposed pad in DFN variant |
Key Features
| Feature | Design Value |
|---|---|
| Octal input monitoring | Simultaneously supervises eight independent rails-six fixed positive, two polarity-selectable-reducing component count vs. discrete supervisors |
| ±1.5% threshold accuracy | Guaranteed over full 0°C to 70°C range eliminates need for calibration or margining in production systems |
| Glitch-immune comparator design | Integrated low-pass filtering prevents false resets from transient noise without adding hysteresis-induced trip-point error |
| Configurable reset timeout | External capacitor on TMR pin sets delay from 6 ms to >200 ms, enabling compliance with processor reset timing requirements |
| 1V buffered reference | Stable, low-impedance 1V output enables accurate negative-rail monitoring using simple resistor dividers without external references |
| VCC shunt regulation | Internal 6.6V shunt allows direct connection to 12V/24V/48V supplies with only a series current-limiting resistor-no LDO required |
Applications
| Desktop Computer Power Sequencing | Network Server Core Voltage Monitoring |
|---|---|
|
Use Scenario: Monitoring 12V, 5V, 3.3V, 2.5V, 1.8V, 1.2V, and dual 5V/3.3V rails during boot and runtime in ATX-compliant motherboards. IC Role / Device Role / Timing Role: Centralized octal supervisor coordinating power-good signaling and reset assertion across multiple VRMs and chipset domains. Use Value: Eliminates six discrete supervisors; ±1.5% threshold accuracy ensures reliable detection of 10% tolerance supplies without false trips. |
Use Scenario: Supervising core, I/O, memory, and auxiliary rails in 1U/2U rack-mount servers with redundant PSUs. IC Role / Device Role / Timing Role: Fault-detection hub triggering system-level reset and logging events via RST/RST outputs tied to BMC or CPLD. Use Value: Glitch filtering prevents spurious resets from PSU transients; adjustable timeout meets Intel IMVP or AMD SVI2 reset hold-time specs. |
| Industrial PLC Power Management | Medical Imaging System Supply Integrity |
|
Use Scenario: Monitoring isolated 24V, 5V, 3.3V, ±15V, and ±5V analog/digital supplies in programmable logic controllers operating at –40°C to +70°C. IC Role / Device Role / Timing Role: High-reliability voltage guardian interfacing with watchdog timers and safety microcontrollers. Use Value: Guaranteed operation down to VCC = 1V ensures reset assertion during deep brown-outs; SEL pin enables mixed positive/negative rail monitoring. |
Use Scenario: Ensuring integrity of critical imaging chain supplies (e.g., 1.2V FPGA core, 1.8V memory, 3.3V interface, –5V analog bias) in MRI/CT subsystems. IC Role / Device Role / Timing Role: Fail-safe supervisor feeding reset signals to FPGA configuration logic and ADC/DAC power sequencers. Use Value: Buffered 1V REF enables accurate –5V rail monitoring with <1% total error; 50μA ICC supports battery-backed backup modes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2914IGN#PBF | Quad UV/OV monitor with two negative inputs; includes OV detection capability not present in LTC2910CGN#PBF | Required where overvoltage protection is mandated (e.g., telecom power shelves); lacks octal channel count | Select when OV monitoring is essential and channel count ≤4 suffices; not drop-in due to different pinout and function set |
| LTC2908CMS8E#PBF | Six-supply monitor (four fixed, two adjustable); SOT-23-8 package; no negative rail support or buffered REF | Used in space-constrained designs needing fewer rails; unsuitable for mixed-polarity or REF-dependent circuits | Choose for compact 6-rail monitoring without negative supply or reference needs; incompatible pinout and missing SEL/TMR/REF functionality |
Compared with LTC2910CGN#PBF, LTC2914IGN#PBF adds overvoltage detection but reduces channel count and removes adjustable timeout, while LTC2908CMS8E#PBF sacrifices polarity flexibility, reference output, and timeout adjustability for smaller footprint-neither matches the LTC2910CGN#PBF's octal mixed-polarity supervision capability.
Availability
LTC2910CGN#PBF is available at Aetrix Electronics and suitable for desktop computers, network servers, and industrial PLCs requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for LTC2910CGN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed through acquisition of Linear Technology in 2017.
The LTC2910CGN#PBF belongs to ADI's precision power supervision product line, engineered for high-accuracy, low-power, multi-rail monitoring in computing, communications, and industrial infrastructure equipment.
FAQ
What is the operating temperature range of the LTC2910CGN#PBF?
The LTC2910CGN#PBF is rated for commercial temperature operation from 0°C to 70°C. This grade is specified for use in desktop computers, networking gear, and non-automotive industrial equipment where ambient conditions remain within this range. All electrical parameters-including ±1.5% threshold accuracy and 50μA quiescent current-are guaranteed across this full interval.
Can the LTC2910CGN#PBF monitor negative supply voltages?
Yes, the LTC2910CGN#PBF can monitor negative supplies using V7 and V8 inputs in conjunction with the buffered 1V REF output and the three-state SEL pin. When SEL is open or grounded, V7 and V8 are configured for negative monitoring-reset triggers when voltage exceeds 0.5V relative to REF. This enables accurate supervision of rails such as –5V or –3.3V without external op-amps or level shifters.
How is the reset timeout period set on the LTC2910CGN#PBF?
The reset timeout period on the LTC2910CGN#PBF is set by connecting an external capacitor (CTMR) between the TMR pin and GND. With CTMR = 1 nF, the timeout is 8.5 ms (6–14 ms range over temperature). The relationship is linear: tRST ≈ 8.5 ms/nF. Tying TMR to VCC disables the timeout, causing immediate RST/RST deassertion upon fault clearance.
Does the LTC2910CGN#PBF require external components for basic operation?
Yes-the LTC2910CGN#PBF requires at minimum a 0.1 μF bypass capacitor on VCC and external resistor dividers on each monitored voltage rail to scale inputs to the 0.5V threshold. For negative rail monitoring, it also requires connection of RA to REF and RB to the negative rail. No external components are needed for SEL, DIS, or REF if default configurations are used.
What is the purpose of the DIS pin on the LTC2910CGN#PBF?
The DIS pin on the LTC2910CGN#PBF disables RST and RST outputs under normal operation-pulling DIS high inhibits reset assertion regardless of input faults. However, during VCC undervoltage lockout (UVLO <2.0V), RST asserts low and RST asserts high even with DIS high. This allows fail-safe response to main supply failure while permitting controlled reset suppression during debug or maintenance.
LTC2910CGN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 8
- Voltage - Threshold:
- 8 Selectable Threshold Combinations
- Output:
- Open Drain or Open Collector
- Reset:
- Active High/Active Low
- Reset Timeout:
- 6ms Minimum
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SSOP
LTC2910CGN#PBF FAQ
1.How can I place an order for LTC2910CGN#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2910CGN#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2910CGN#PBF reliable?
The price and inventory of LTC2910CGN#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2910CGN#PBF is usually 5 days.
3.What payment methods are accepted for LTC2910CGN#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2910CGN#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2910CGN#PBF?
LTC2910CGN#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2910CGN#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2910CGN#PBF?
For technical support, including LTC2910CGN#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2910CGN#PBF requirements.
6.How does Aetrix verify that LTC2910CGN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2910CGN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2910CGN#PBF meets industry standards.
7.What is the process for return or replacement of LTC2910CGN#PBF?
All LTC2910CGN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2910CGN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2910CGN#PBF part is unused and in its original packaging.
Return procedure for LTC2910CGN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC2910CGN#PBF Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

